公开(公告)号：US06430635B1

公开(公告)日：2002-08-06

申请号：US09407113

申请日：1999-09-27

申请人： Young Ki Kwon ,  In Seong Hwang ,  Sung Hun Cho ,  Seung Hyun Lee ,  Won Seok Cho

发明人： Young Ki Kwon ,  In Seong Hwang ,  Sung Hun Cho ,  Seung Hyun Lee ,  Won Seok Cho

IPC分类号： G06F1300

CPC分类号： H04L12/40052 ,  H04L2012/5665 ,  H04N21/4108 ,  H04N21/43615 ,  H04N21/43632

摘要： A method for performing a protocol interfacing operation for a plurality of nodes in an IEEE1394 serial bus network. Upon initialization of an IEEE1394 serial bus due to node addition or deletion, each of the nodes formats a protocol identifier packet and sends it to the other nodes. A bus manager stores the protocol identifier packets of the nodes into a protocol map. Then, a source node sends a protocol query packet including a target node identifier to the bus manager to request the transfer of data. Upon receiving the protocol query packet from the source node, the bus manager retrieves a communication protocol from the protocol map and sends a protocol set packet including information about the retrieved communication protocol to the source node and a target node to perform the transfer of data between the source and target nodes through the communication protocol. Therefore, the data transfer can efficiently be performed with no necessity for checking protocols one by one.

摘要翻译： 一种用于对IEEE1394串行总线网络中的多个节点执行协议接口操作的方法。 由于节点添加或删除，在IEEE1394串行总线初始化时，每个节点格式化协议标识符分组，并将其发送到其他节点。 总线管理器将节点的协议标识分组存储到协议映射中。 然后，源节点向总线管理器发送包括目标节点标识符的协议查询分组，以请求传输数据。 在从源节点接收到协议查询分组时，总线管理器从协议映射中检索通信协议，并将包括关于检索到的通信协议的信息的协议集分组发送到源节点和目标节点，以执行数据之间的传输 源节点和目标节点通过通信协议。 因此，可以有效地执行数据传送，而不必一一检查协议。

公开(公告)号：US5940705A

公开(公告)日：1999-08-17

申请号：US974084

申请日：1997-11-19

申请人： Byoung-taek Lee ,  Cheol-seong Hwang

发明人： Byoung-taek Lee ,  Cheol-seong Hwang

IPC分类号： H01L21/8247 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/00 ,  H01L27/10 ,  H01L27/105 ,  H01L27/11 ,  H01L27/115 ,  H01L29/78 ,  H01L29/786 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L29/66825 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/11597 ,  H01L29/78391

摘要： Methods of forming floating-gate ferroelectric random-access-memory (FFRAM) devices include the steps of forming vertically integrated FFRAM unit cells having floating-gate transistors and access transistors positioned at different levels on a semiconductor substrate to increase the density at which the unit cells may be integrated. Preferred methods include the steps of forming a first transistor having opposing floating and control gate electrodes, at a surface of a semiconductor substrate, and then forming a first insulating layer having a first contact hole therein, on the first transistor. The first transistor comprises a layer of ferroelectric material between the floating and control gate electrodes, which can be polarized in respective first and second states to retain logic 1 and logic 0 data. Steps are then performed to form a first electrical interconnect (e.g., conductive plug) in the first contact hole and electrically coupled to the control gate electrode. Then, a series of steps are performed to form a vertically integrated second transistor on the first insulating layer. Here, the second transistor is formed as a field effect transistor having a drain region electrically coupled to the control gate of the first transistor by the first electrical interconnect. The steps of forming a second transistor may include the steps of forming a silicon-on-insulator (SOI) substrate on the first insulating layer, forming a gate electrode on the silicon portion of the SOI substrate, and then forming source, drain and channel regions in the silicon portion of the SOI substrate.

摘要翻译： 形成浮栅铁电随机存取存储器（FFRAM）器件的方法包括以下步骤：在半导体衬底上形成具有浮置栅极晶体管和位于不同电平的存取晶体管的垂直集成的FFRAM单元，以增加单元 单元可以被集成。 优选的方法包括在半导体衬底的表面上形成具有相对的浮动和控制栅电极的第一晶体管的步骤，然后在第一晶体管上形成其中具有第一接触孔的第一绝缘层。 第一晶体管包括在浮动栅极和控制栅电极之间的铁电材料层，其可以在相应的第一和第二状态下被极化以保持逻辑1和逻辑0数据。 然后执行步骤以在第一接触孔中形成第一电互连（例如，导电插塞）并电耦合到控制栅电极。 然后，执行一系列步骤以在第一绝缘层上形成垂直集成的第二晶体管。 这里，第二晶体管形成为具有通过第一电互连电耦合到第一晶体管的控制栅极的漏极区域的场效应晶体管。 形成第二晶体管的步骤可以包括在第一绝缘层上形成绝缘体上硅（SOI）衬底的步骤，在SOI衬底的硅部分上形成栅电极，然后形成源极，漏极和沟道 SOI衬底的硅部分的区域。

公开(公告)号：US5918118A

公开(公告)日：1999-06-29

申请号：US931821

申请日：1997-09-16

申请人： Jin-Won Kim ,  Cheal-Seong Hwang ,  Sang-In Lee

发明人： Jin-Won Kim ,  Cheal-Seong Hwang ,  Sang-In Lee

IPC分类号： H01L21/285 ,  H01L21/02 ,  H01L21/28 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L23/522 ,  H01L27/04 ,  H01L27/108 ,  H01L21/283 ,  H01L21/70

CPC分类号： H01L27/10852 ,  H01L21/76895 ,  H01L28/60

摘要： A method for forming a dynamic random access memory device includes the step of forming a memory cell access transistor on a semiconductor substrate wherein the memory cell access transistor includes a source/drain region at a surface of the semiconductor substrate. An insulating layer is formed on the semiconductor substrate and on the memory cell access transistor wherein the insulating layer has a contact hole therein exposing a portion of the source/drain region of the substrate. A first conductive layer is chemical vapor deposited on the exposed portion of the source/drain region of the substrate, and a second conductive layer is physical vapor deposited on the first conductive layer opposite the substrate. A dielectric layer is formed on the second conductive layer opposite the substrate, and a third conductive layer is formed on the dielectric layer opposite the substrate.

摘要翻译： 一种用于形成动态随机存取存储器件的方法包括在半导体衬底上形成存储单元存取晶体管的步骤，其中存储单元存取晶体管包括在半导体衬底的表面处的源/漏区。 绝缘层形成在半导体衬底和存储单元存取晶体管上，其中绝缘层具有其中暴露衬底的源/漏区的一部分的接触孔。 第一导电层被化学气相沉积在衬底的源极/漏极区域的暴露部分上，并且第二导电层物理气相沉积在与衬底相对的第一导电层上。 在与衬底相对的第二导电层上形成电介质层，并且在与衬底相对的电介质层上形成第三导电层。

公开(公告)号：US5834804A

公开(公告)日：1998-11-10

申请号：US951433

申请日：1997-10-16

申请人： Cheol-seong Hwang ,  Choong-ho Lee

发明人： Cheol-seong Hwang ,  Choong-ho Lee

IPC分类号： H01L21/8247 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L28/56 ,  H01L29/516

摘要： An MgTiO.sub.3 film is used as a diffusion-barrier layer and/or a buffer layer for a ferroelectric film such as a PZT film. The MgTiO.sub.3 films may be used in ferroelectric capacitors which can be included in FRAM devices, and in ferroelectric floating gate transistors which can be included in FFRAM devices. Associated fabrication methods are also provided.

摘要翻译： 使用MgTiO 3膜作为扩散阻挡层和/或用于铁电体膜如PZT膜的缓冲层。 MgTiO 3膜可用于可包含在FRAM器件中的铁电电容器中，以及可包含在FFRAM器件中的铁电浮栅晶体管中。 还提供了相关的制造方法。

公开(公告)号：US5568352A

公开(公告)日：1996-10-22

申请号：US558399

申请日：1995-11-16

申请人： Cheol-Seong Hwang

发明人： Cheol-Seong Hwang

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01G4/06 ,  H01G4/008 ,  H01G4/20 ,  H01G7/00

CPC分类号： H01L28/40 ,  Y10T29/435

摘要： A capacitor in a semiconductor device and a manufacturing method for the capacitor are provided using a triple film including a Ti layer, a TiN layer, and a Ta layer. The capacitor has a first insulating film formed on the surface of a semiconductor substrate, the first insulating film having a center hole and at least one step between the center hole and the rest of the first insulating film, a spacer formed on the inner wall of the contact hole, a first conductive layer filling the contact hole, a triple film formed on the center of the first insulating film, a second conductive layer formed on the triple film, a second insulating film formed on the resultant structure, and a third conductive layer formed on the second insulating film. The Ta layer is placed in between the second conductive layer and both the Ti layer and the TiN layer to prevent the production of a metal oxide and nitrogen gas from a reaction between oxygen and the Ti and TiN layers.

摘要翻译： 使用包括Ti层，TiN层和Ta层的三层膜，提供半导体器件中的电容器和电容器的制造方法。 所述电容器具有形成在半导体基板的表面上的第一绝缘膜，所述第一绝缘膜具有中心孔，在所述第一绝缘膜的中心孔与其余部分之间具有至少一个台阶， 接触孔，填充接触孔的第一导电层，形成在第一绝缘膜的中心上的三层膜，形成在三膜上的第二导电层，形成在所得结构上的第二绝缘膜，以及第三导电层 层形成在第二绝缘膜上。 Ta层被放置在第二导电层与Ti层和TiN层之间，以防止氧与Ti和TiN层之间的反应产生金属氧化物和氮气。

公开(公告)号：US5307273A

公开(公告)日：1994-04-26

申请号：US750403

申请日：1991-08-27

申请人： Ki Tae Oh ,  Jin Seong Hwang

发明人： Ki Tae Oh ,  Jin Seong Hwang

IPC分类号： A47L9/28 ,  A47L11/40 ,  G01B17/00 ,  G01N29/04 ,  G01N29/07 ,  G01N29/11 ,  G01S7/539 ,  G01V1/00 ,  G05D1/02 ,  G06F13/10 ,  G06G7/161

CPC分类号： A47L11/4011 ,  A47L11/4061 ,  G01N29/07 ,  G01N29/11 ,  G01S7/539 ,  G05D1/0214 ,  G05D1/0255 ,  A47L2201/04 ,  G01N2291/02854 ,  G01N2291/044 ,  G05D2201/0203 ,  Y10S367/903

摘要： Apparatus and method for determining the condition of the floor to be cleaned by a cleaning robot. The apparatus comprises an ultrasonic wave signal transmitting circuit for transmitting an ultrasonic wave signal to an ultrasonic wave signal transmitter under the control of a microcomputer, a receiving amplifying unit for amplifying the ultrasonic wave signal transmitted from the ultrasonic wave signal transmitter and received in a ultrasonic wave signal receiver, a receiving demodulating unit for smoothing the output signal from the receiving amplifying unit to demodulate it and then apply it to the microcomputer. According to the control of the microcomputer, the ultrasonic wave signal is transmitted for a predetermined period. The period from the time when the ultrasonic wave signal is transmitted to the time when the ultrasonic wave signal is received in the ultrasonic wave signal receiver is measured. Then, the distance between the position of the ultrasonic wave signal receiver and the floor to be cleaned is calculated from the measured period. Accordingly, it can be determined whether the floor to be cleaned is a normal floor, a floor covered with a carpet, or stairs, thereby enabling correct recognition of the condition of the floor to be cleaned, without being adversely affected from environment.

摘要翻译： 用于确定由清洁机器人清洁的地板的状况的装置和方法。 该装置包括：超声波信号发送电路，用于在微计算机的控制下向超声波信号发送器发送超声波信号;接收放大单元，用于放大从超声波信号发送器发送的超声波信号，并以超声波 波信号接收机，用于平滑来自接收放大单元的输出信号进行解调，然后将其应用于微计算机的接收解调单元。 根据微型计算机的控制，超声波信号被传送一段预定的时间。 测量从超声波信号发送时到超声波信号接收机中接收超声波信号时的时间。 然后，根据测量周期计算超声波信号接收器的位置与要清洁的地板之间的距离。 因此，可以确定要清洁的地板是否为普通地板，地毯被地毯覆盖或楼梯，从而能够正确识别要清洁的地板的状况，而不会受到环境的不利影响。

公开(公告)号：US08860127B2

公开(公告)日：2014-10-14

申请号：US13605550

申请日：2012-09-06

申请人： Heung-Jae Cho ,  Eui-Seong Hwang ,  Eun-Shil Park

发明人： Heung-Jae Cho ,  Eui-Seong Hwang ,  Eun-Shil Park

IPC分类号： H01L21/28 ,  H01L29/78

CPC分类号： H01L29/66666 ,  H01L21/28026 ,  H01L27/10814 ,  H01L27/10873 ,  H01L29/402 ,  H01L29/407 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/7827

摘要： A method for fabricating vertical channel transistors includes forming a plurality of pillars which have laterally opposing both sidewalls, over a substrate; forming a gate dielectric layer on both sidewalls of the pillars; forming first gate electrodes which cover any one sidewalls of the pillars and shield gate electrodes which cover the other sidewalls of the pillars and have a height lower than the first gate electrodes, over the gate dielectric layer; and forming second gate electrodes which are connected with upper portions of sidewalls of the first gate electrodes.

摘要翻译： 一种用于制造垂直沟道晶体管的方法，包括在衬底上形成横向相对的两个侧壁的多个柱; 在支柱的两个侧壁上形成栅介电层; 形成覆盖所述柱的任何一个侧壁的第一栅电极和覆盖所述柱的其它侧壁并且具有低于所述第一栅电极的高度的屏蔽栅电极; 以及形成与所述第一栅电极的侧壁的上部连接的第二栅电极。

公开(公告)号：US20130320433A1

公开(公告)日：2013-12-05

申请号：US13605550

申请日：2012-09-06

申请人： Heung-Jae CHO ,  Eui-Seong Hwang ,  Eun-Shil Park

发明人： Heung-Jae CHO ,  Eui-Seong Hwang ,  Eun-Shil Park

IPC分类号： H01L21/28 ,  H01L29/78

CPC分类号： H01L29/66666 ,  H01L21/28026 ,  H01L27/10814 ,  H01L27/10873 ,  H01L29/402 ,  H01L29/407 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/7827

摘要： A method for fabricating vertical channel transistors includes forming a plurality of pillars which have laterally opposing both sidewalls, over a substrate; forming a gate dielectric layer on both sidewalls of the pillars; forming first gate electrodes which cover any one sidewalls of the pillars and shield gate electrodes which cover the other sidewalls of the pillars and have a height lower than the first gate electrodes, over the gate dielectric layer; and forming second gate electrodes which are connected with upper portions of sidewalls of the first gate electrodes.

公开(公告)号：US20110051801A1

公开(公告)日：2011-03-03

申请号：US12812890

申请日：2009-01-28

申请人： In-Seong Hwang ,  Hoo-Jong Kim

发明人： In-Seong Hwang ,  Hoo-Jong Kim

IPC分类号： H04N7/26

CPC分类号： H04N19/14 ,  H04N19/107 ,  H04N19/109 ,  H04N19/11 ,  H04N19/147 ,  H04N19/176 ,  H04N19/61

摘要： A method and apparatus for deciding an encoding mode are disclosed. The encoding mode decision apparatus comprises a temporal complexity calculator to calculate a temporal complexity of a macroblock and a mode decider to elect the encoding mode utilizing the temporal complexity. The disclosure calculates the temporal and spatial complexes for the macroblocks more accurately as well as elects the optimal encoding mode using the same resulting in a reduction of the calculation complexity when applying the rate-distortion technique along with an improvement of its processing speed.

摘要翻译： 公开了一种用于决定编码模式的方法和装置。 编码模式决定装置包括时间复杂度计算器，用于计算宏块的时间复杂度和模式决定器，以利用时间复杂度选择编码模式。 本公开更准确地计算宏块的时间和空间复合物，并且使用相同的方法选择最佳编码模式，导致在应用速率失真技术时降低计算复杂度以及其处理速度的提高。

公开(公告)号：US20100102984A1

公开(公告)日：2010-04-29

申请号：US12615845

申请日：2009-11-10

申请人： IN-SEONG HWANG ,  KIM HOOJONG

发明人： IN-SEONG HWANG ,  KIM HOOJONG

IPC分类号： H04B1/20

CPC分类号： H04N7/173 ,  H04N5/4401 ,  H04N5/4403 ,  H04N7/142 ,  H04N21/4126 ,  H04N21/42204 ,  H04N21/4788 ,  H04N2005/4407 ,  H04N2005/4414 ,  H04N2005/4428

摘要： The present invention relates to a remote controller and a communication-capable digital broadcasting receiver for voice or image communication, a system including the remote controller and the digital broadcasting receiver, and a method thereof.

摘要翻译： 本发明涉及一种用于语音或图像通信的遥控器和可通信的数字广播接收机，包括遥控器和数字广播接收机的系统及其方法。