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公开(公告)号：US5276407A
公开(公告)日：1994-01-04
申请号：US900917
申请日：1992-06-18
申请人： Carver A. Mead , Federico Faggin
发明人： Carver A. Mead , Federico Faggin
IPC分类号： H01L27/146 , H03F3/08
CPC分类号： H01L27/14681
摘要： A plurality of integrating photosensors is disposed in an array of rows and columns, with a given row select line connected to the gates of P-channel MOS transistors associated with that given row and a given column sense line connected to the drains of the P-channel MOS transistors associated with that given column. A sense amplifier is associated with each column. An integrating sense amplifier according to the present invention includes an amplifying element having an inverting input and a non-inverting input. The non-inverting input is connected to a source of reference voltage the inverting input is connected to a sense line. A P-channel balance transistor is connected between the inverting input and the output of the amplifying element and a capacitor is also connected between the inverting input and output of the amplifying element. A capacitor, preferably a varactor element, is connected between the output and the inverting input of the amplifying element. An exponential feedback element may be provided in the sense amplifiers for signal compression at high light levels.
摘要翻译： 多个积分光电传感器被布置成行和列的阵列，其中给定的行选择线连接到与给定行相关联的P沟道MOS晶体管的栅极，以及连接到P沟道的漏极的给定的列感测线， 与给定列相关的通道MOS晶体管。 读出放大器与每列相关联。 根据本发明的积分读出放大器包括具有反相输入和非反相输入的放大元件。 反相输入连接到参考电压源，反相输入连接到感测线。 P沟道平衡晶体管连接在反相输入和放大元件的输出之间，电容器也连接在放大元件的反相输入和输出之间。 电容器，优选变容二极管元件，连接在放大元件的输出和反相输入端之间。 可以在读出放大器中提供指数反馈元件，用于在高光级下进行信号压缩。
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公开(公告)号：US5243554A
公开(公告)日：1993-09-07
申请号：US961785
申请日：1992-10-15
CPC分类号： G11C11/5621 , G05F1/468 , G05F3/24 , G11C11/56 , G11C27/005 , G11C5/147 , G11C16/30 , G11C2211/5634 , G11C7/16
摘要： A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.
摘要翻译： 用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。 提供电子注入电路用于将电子注入到上面，并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。 跟随放大器连接到每个浮动栅极存储装置并驱动模拟输出电压总线。 电容器连接到每个模拟输出存储总线。 每个模拟输出电压总线和公共监视器/动态负载总线之间连接一个模拟传输门。 每个模拟传输门由选通信号驱动。
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公开(公告)号：US5165054A
公开(公告)日：1992-11-17
申请号：US629470
申请日：1990-12-18
IPC分类号： H03F3/30
CPC分类号： H03F3/3022 , H03F3/3001 , H03F2203/30006 , H03F2203/30009 , H03F2203/30084 , H03F2203/30117
摘要： A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
摘要翻译： 线性电压 - 电流转换器（LVCC）电路包括两个晶体管，一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨，并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器（LCVC）电路类似于LVCC电路，只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管，输出电压是排水管的电压。
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公开(公告)号：US5120996A
公开(公告)日：1992-06-09
申请号：US535283
申请日：1990-06-06
CPC分类号： G11C27/024 , G06N3/063 , G11C11/54
摘要： An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic cicuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage vector stored in a row or column of the array and the stored vector closest to the applied input vector may be identified and further processed.
摘要翻译： 公开了一种具有连接到自适应放大器的采样/保持放大器的电子电路。 多个这样的电子线路可以被配置成行和列的阵列。 可以将输入电压矢量与存储在阵列的行或列中的模拟电压矢量进行比较，并且可以识别并进一步处理最接近所施加的输入向量的存储向量。
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公开(公告)号：US5119038A
公开(公告)日：1992-06-02
申请号：US650577
申请日：1991-02-04
CPC分类号： H03F1/303 , G06N3/063 , H01L27/0629 , H03F1/0261 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： An MOS current mirror includes a floating node onto which and from which electrons may be transported by control signals and electrical semiconductor structures in order to adapt the current mirror to supply a desired output current when a particular input calibration current is present.
摘要翻译： MOS电流镜包括浮动节点，在该浮动节点上，可以通过控制信号和电半导体结构从中传输电子，以便在存在特定输入校准电流时使电流镜适应于提供期望的输出电流。
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公开(公告)号：US5099156A
公开(公告)日：1992-03-24
申请号：US591728
申请日：1990-10-02
申请人： Tobias Delbruck , Carver A. Mead
发明人： Tobias Delbruck , Carver A. Mead
IPC分类号： G06G7/19
CPC分类号： G06G7/1928
摘要： A first and a second MOS transistor of the same conductivity type are connected in series between a load and a fixed voltage source. The gates of the first and second MOS transistors are connected to sources of input voltage which are of a magnitude smaller than the threshold voltages of the two MOS transistors. The first MOS transistor located next to the load is kept in saturation. A related circuit includes a first and a second MOS transistor of the same conductivity type are connected in series between a load and a fixed voltage source. The first MOS transistor located next to the load is kept in saturation. The gates of the first and second MOS transistors are connected to the gates of third and fourth diode-connected MOS transistors of the same conductivity type as the first and second MOS transistors. The third MOS transistor is connected between a first input current node and fixed voltage source. The fourth MOS transistor is connected between a second input current node and a fixed voltage source. The third an fourth MOS transistors may alternatively be connected to first and second input transistors and a bias transistor arranged as in a differential amplifier.
摘要翻译： 相同导电类型的第一和第二MOS晶体管串联连接在负载和固定电压源之间。 第一和第二MOS晶体管的栅极连接到比两个MOS晶体管的阈值电压小的输入电压源。 位于负载附近的第一个MOS晶体管保持饱和。 相关电路包括相同导电类型的第一和第二MOS晶体管串联连接在负载和固定电压源之间。 位于负载旁边的第一个MOS晶体管保持饱和。 第一和第二MOS晶体管的栅极连接到与第一和第二MOS晶体管相同导电类型的第三和第二二极管连接的MOS晶体管的栅极。 第三MOS晶体管连接在第一输入电流节点和固定电压源之间。 第四MOS晶体管连接在第二输入电流节点和固定电压源之间。 第三个第四MOS晶体管可以替代地连接到第一和第二输入晶体管以及与差分放大器一样布置的偏置晶体管。
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公开(公告)号：US5083044A
公开(公告)日：1992-01-21
申请号：US357520
申请日：1989-05-25
摘要： An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic circuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage vector stored in a row or column of the array and the stored vector closest to the applied input vector may be identified and further processed.
摘要翻译： 公开了一种具有连接到自适应放大器的采样/保持放大器的电子电路。 多个这样的电子电路可以被配置成行和列的阵列。 可以将输入电压矢量与存储在阵列的行或列中的模拟电压矢量进行比较，并且可以识别并进一步处理最接近所施加的输入向量的存储向量。
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公开(公告)号：US4953928A
公开(公告)日：1990-09-04
申请号：US363678
申请日：1989-06-09
IPC分类号： H01L29/788 , H01L29/861
CPC分类号： H01L29/7885 , H01L29/7887 , H01L29/8616
摘要： A semiconductor structure for long-term learning includes a p-type silicon substrate or well having first and second spaced apart n-type regions formed therein. A polysilicon floating gate is separated from the surface of the silicon substrate by a layer of gate oxide. One edge of the polysilicon floating gate is aligned with the edge of the first n-type region such that the polysilicon floating gate does not appreciably overly the n-type region. The second n-type region lies beyond the edge of the polysilicon floating gate. The first n-type region, the silicon substrate, and the second n-type region form the collector, base, and emitter, respectively, of a lateral bipolar transistor.An alternate embodiment of a semiconductor long-term learning structure includes an n-type silicon substrate having a p-well region formed therein. An n-type region is formed within the well region. A polysilicon floating gate is separated from the surface of the silicon substrate by a gate oxide and is positioned above the well region. One edge of the polysilicon floating gate is aligned with the edge of the n-type region within the well region such that the polysilicon floating gate does not appreciably overly the n-type region. The substrate, the well, and the n-type region, respectively, form the emitter, base, and collector of a bipolar transistor.
摘要翻译： 用于长期学习的半导体结构包括在其中形成有第一和第二间隔开的n型区的p型硅衬底或阱。 多晶硅浮栅通过一层栅极氧化物与硅衬底的表面分离。 多晶硅浮动栅极的一个边缘与第一n型区域的边缘对准，使得多晶硅浮置栅极不明显地超过n型区域。 第二n型区域位于多晶硅浮栅的边缘之上。 第一n型区域，硅衬底和第二n型区域分别形成横向双极晶体管的集电极，基极和发射极。 半导体长期学习结构的替代实施例包括其中形成有p阱区的n型硅衬底。 在阱区内形成n型区域。 多晶硅浮置栅极通过栅极氧化物与硅衬底的表面分离并且位于阱区域之上。 多晶硅浮置栅极的一个边缘与阱区域内的n型区域的边缘对齐，使得多晶硅浮栅不明显地超过n型区域。 衬底，阱和n型区域分别形成双极晶体管的发射极，基极和集电极。
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公开(公告)号：US4786818A
公开(公告)日：1988-11-22
申请号：US118264
申请日：1987-11-09
CPC分类号： H04N3/15
摘要： An integrated sensor and analog processor for visual images is produced from an array of photoreceptor signals that are the space-time derivative of the photoreceptor outputs. Each photoreceptor output V.sub.R is first processed by an integrator having a predetermined time constant using a differential transconductance amplifier driving an integrating capacitor, and feeding the output signals V.sub.H back to the negative input, thereby generating a time integrated signal for each pixel of the array. The output terminal of the integrating amplifier is connected to a node that is coupled to the outputs of similar integrators of neighboring pixels by resistive connections thereby forming a spatially smoothed version of the image. At each node a differential amplifier takes the difference between the node potential and local receptor potential, whereby an output representing a first temporal derivative and second spatial derivative is computed.
摘要翻译： 用于视觉图像的集成传感器和模拟处理器由感光体信号阵列产生，感光体信号是感光体输出的时空导数。 首先使用驱动积分电容器的差分跨导放大器，由具有预定时间常数的积分器对每个光感受器输出VR进行处理，并将输出信号VH馈送回负输入，从而为阵列的每个像素生成时间积分信号。 积分放大器的输出端子连接到通过电阻连接耦合到相邻像素的类似积分器的输出的节点，从而形成图像的空间平滑版本。 在每个节点处，差分放大器获得节点电势和局部受体电位之间的差异，由此计算表示第一时间导数和第二空间导数的输出。
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公开(公告)号：US4099230A
公开(公告)日：1978-07-04
申请号：US601280
申请日：1975-08-04
申请人： Carver A. Mead
发明人： Carver A. Mead
摘要： A method and means for implementing the control structure of a computer comprising, for example the basic constructs of repetition, conditional execution, and nesting whereby, at any point, a machine language program can be decompiled into the English language source that produced it. The program is loaded into the memory of the machine in a manner to be location independent, so that each segment of a program may be debugged individually, if necessary, without affecting the balance of the program.
摘要翻译： 一种用于实现计算机的控制结构的方法和装置，包括例如重复的基本构造，条件执行和嵌套，由此，在任何时候，机器语言程序可以被反编译成产生它的英语语言源。 程序以与位置无关的方式加载到机器的存储器中，从而如果需要，可以单独调试程序的每个段，而不影响程序的平衡。
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