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    UCP4
    52.
    发明授权
    UCP4 有权

    公开(公告)号：US08067229B2

    公开(公告)日：2011-11-29

    申请号：US11265966

    申请日：2005-11-03

    Applicant: Sean Adams ,  James Pan ,  Alan Zhong

    Inventor： Sean Adams ,  James Pan ,  Alan Zhong

    IPC: C12N15/12 ,  C12N15/63 ,  C12N5/10 ,  C12N5/16

    CPC classification number: C07K14/4702 ,  A61K38/00 ,  A61K48/00 ,  C07K14/47 ,  C07K2319/00

    Abstract: The present invention is directed to novel polypeptides having homology to certain human uncoupling proteins (“UCPs”) and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention, and methods for producing the polypeptides of the present invention.

    Abstract translation: 本发明涉及与某些人解偶联蛋白（“UCP”）和编码那些多肽的核酸分子具有同源性的新型多肽。 本文还提供了包含那些核酸序列的载体和宿主细胞，包含与异源多肽序列融合的本发明多肽的嵌合多肽分子，与本发明的多肽结合的抗体，以及本发明多肽的制备方法 发明。

    Prediction-based adaptive content broadcasting over a network
    54.
    发明授权
    Prediction-based adaptive content broadcasting over a network 有权
    通过网络进行基于预测的自适应内容广播

    公开(公告)号：US08001217B1

    公开(公告)日：2011-08-16

    申请号：US11249195

    申请日：2005-10-13

    Applicant: James Pan ,  Claudio Lima ,  James Black

    Inventor： James Pan ,  Claudio Lima ,  James Black

    IPC: G06F15/16

    CPC classification number: H04W4/08 ,  H04W4/18 ,  H04W8/18 ,  H04W28/06 ,  H04W72/04 ,  H04W88/182

    Abstract: A system, a method and computer-readable media for distributing content to client devices over a network. Various items of content are stored in the network or available through the network such that a client device may request to receive an item of content over the network. The method selects items of content by anticipating which of the items users will request. The selected items of content are transmitted over the network in a group delivery to multiple client devices.

    Abstract translation: 一种用于通过网络向客户端设备分发内容的系统，方法和计算机可读介质。 各种内容存储在网络中或通过网络可用，使得客户端设备可以通过网络请求接收内容项目。 该方法通过预期用户将要请求哪些项目来选择内容项。 所选择的内容项目通过网络以组传递方式发送到多个客户端设备。

    Structure and Method for Forming a Thick Bottom Dielectric (TBD) for Trench-Gate Devices
    55.
    发明申请
    Structure and Method for Forming a Thick Bottom Dielectric (TBD) for Trench-Gate Devices 有权
    用于形成用于沟槽栅极器件的厚底电介质（TBD）的结构和方法

    公开(公告)号：US20100320534A1

    公开(公告)日：2010-12-23

    申请号：US12870600

    申请日：2010-08-27

    Applicant: James Pan ,  Christopher Lawrence Rexer

    Inventor： James Pan ,  Christopher Lawrence Rexer

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/8725

    Abstract: A semiconductor structure which includes a shielded gate FET is formed as follows. A plurality of trenches is formed in a semiconductor region using a mask. The mask includes (i) a first insulating layer over a surface of the semiconductor region, (ii) a first oxidation barrier layer over the first insulating layer, and (iii) a second insulating layer over the first oxidation barrier layer. A shield dielectric is formed extending along at least lower sidewalls of each trench. A thick bottom dielectric (TBD) is formed along the bottom of each trench. The first oxidation barrier layer prevents formation of a dielectric layer along the surface of the semiconductor region during formation of the TBD. A shield electrode is formed in a bottom portion of each trench. A gate electrode is formed over the shield electrode in each trench.

    Abstract translation: 包括屏蔽栅极的半导体结构如下形成。 使用掩模在半导体区域中形成多个沟槽。 掩模包括（i）半导体区域的表面上的第一绝缘层，（ii）第一绝缘层上的第一氧化阻挡层，以及（iii）第一氧化阻挡层上的第二绝缘层。 形成在每个沟槽的至少下侧壁延伸的屏蔽电介质。 沿每个沟槽的底部形成厚底部电介质（TBD）。 第一氧化阻挡层防止在形成TBD期间沿着半导体区域的表面形成电介质层。 屏蔽电极形成在每个沟槽的底部。 在每个沟槽中的屏蔽电极之上形成栅电极。

    Structures and Methods for Reducing Dopant Out-diffusion from Implant Regions in Power Devices
    57.
    发明申请
    Structures and Methods for Reducing Dopant Out-diffusion from Implant Regions in Power Devices 有权
    用于降低功率器件中植入区域的掺杂物扩散的结构和方法

    公开(公告)号：US20100065905A1

    公开(公告)日：2010-03-18

    申请号：US12212489

    申请日：2008-09-17

    Applicant: James Pan

    Inventor： James Pan

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L29/7802 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/0856 ,  H01L29/1095 ,  H01L29/161 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813

    Abstract: A semiconductor structure comprises a drift region of a first conductivity type in a semiconductor region. A well region of a second conductivity type is over the drift region. A source region of the first conductivity type is in an upper portion of the well region. A heavy body region of the second conductivity type extends in the well region. The heavy body region has a higher doping concentration than the well region. A first diffusion barrier region at least partially surrounds the heavy body region. A gate electrode is insulated from the semiconductor region by a gate dielectric.

    Abstract translation: 半导体结构包括半导体区域中的第一导电类型的漂移区域。 第二导电类型的阱区域在漂移区域之上。 第一导电类型的源极区位于阱区的上部。 第二导电类型的重体区域在阱区域中延伸。 重体区域的掺杂浓度高于阱区域。 第一扩散阻挡区域至少部分地围绕重体区域。 栅电极通过栅极电介质与半导体区域绝缘​​。

    Technique for Controlling Trench Profile in Semiconductor Structures
    59.
    发明申请
    Technique for Controlling Trench Profile in Semiconductor Structures 有权
    控制半导体结构中沟槽剖面的技术

    公开(公告)号：US20090269896A1

    公开(公告)日：2009-10-29

    申请号：US12109302

    申请日：2008-04-24

    Applicant: Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

    Inventor： Hui Chen ,  Qi Wang ,  Briant Harward ,  James Pan

    IPC: H01L21/336

    CPC classification number: H01L21/3065 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827

    Abstract: A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.

    Abstract translation: 一种形成半导体结构的方法包括以下步骤。 在半导体区域中使用掩模层形成沟槽，使得沟槽具有第一深度，沿其底部的第一宽度和具有第一斜率的侧壁。 去除掩模层，并且执行斜面蚀刻以使沟槽的侧壁逐渐变细，使得侧壁具有小于第一斜率的第二斜率。

    Multi-operational mode transistor with multiple-channel device structure
    60.
    发明授权
    Multi-operational mode transistor with multiple-channel device structure 失效
    具有多通道器件结构的多工作晶体管

    公开(公告)号：US07544572B2

    公开(公告)日：2009-06-09

    申请号：US11289682

    申请日：2005-11-30

    Applicant: James Pan ,  John Pellerin

    Inventor： James Pan ,  John Pellerin

    IPC: H01L21/336

    CPC classification number: H01L29/7838 ,  H01L29/66628 ,  H01L29/7834

    Abstract: A multiple operating mode transistor is provided in which multiple channels having different respective operational characteristics are employed. Multiple channels have threshold voltages that are independently adjustable. The independent adjustment of the threshold voltage includes providing at least one of different respective doping concentrations in the different channels, different respective gate dielectric thicknesses for the different gate dielectrics separating the channels, and different respective silicon channel thicknesses for the different channels.

    Abstract translation: 提供了一种多工作模式晶体管，其中采用具有不同相应操作特性的多个通道。 多个通道具有可独立调节的阈值电压。 阈值电压的独立调整包括在不同通道中提供不同的相应掺杂浓度中的至少一个，用于不同栅极电介质分离沟道的各自的栅介质厚度以及用于不同通道的不同的相应的硅沟道厚度。

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