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    Anisotropic conductive sheet, production process, contact structure, electronic device and inspection apparatus for operation test
    52.
    发明授权
    Anisotropic conductive sheet, production process, contact structure, electronic device and inspection apparatus for operation test 失效
    各向异性导电片，生产工艺，接触结构，电子仪器和检测仪器进行运行试验

    公开(公告)号：US07267559B2

    公开(公告)日：2007-09-11

    申请号：US10141778

    申请日：2002-05-10

    申请人： Takafumi Hashitani ,  Shigeyuki Maruyama

    发明人： Takafumi Hashitani ,  Shigeyuki Maruyama

    IPC分类号： H01R4/58

    CPC分类号： G01R1/06755 ,  G01R1/07314 ,  G01R1/07378 ,  G01R3/00

    摘要： An anisotropic conductive sheet comprising an insulating base material and a plurality of conductive passages embedded at predetermined positions in the insulating base material, penetrating the insulating base material in the thickness direction. The conductive passage comprises a matrix consisting of non-silicone material or silicone material having rubber elasticity, the matrix material being filled into through-holes formed at a predetermined position in the base material and then hardened, and a conductive filler dispersed in the matrix at an amount capable of exhibiting conductivity at all times. A surface layer of conductive material is capable of functioning as a contact and ensuring an electrical connection by piercing a surface layer of an opponent when the surface layer is used as a contact, such as a layer of fine conductive particles is further provided on at least one of the end faces of the conductive passage. An anisotropic conductive sheet of the present invention can be advantageously used in an electronic device or inspection apparatus, used for an operation test, as a contactor.

    摘要翻译： 一种各向异性导电片，其包括绝缘基材和嵌入绝缘基材中的预定位置的多个导电通道，其在厚度方向上穿透绝缘基材。 导电通道包括由非硅酮材料或具有橡胶弹性的硅酮材料构成的基体，将基质材料填充到形成在基材中的预定位置上的通孔中，然后硬化，并将分散在基体中的导电填料 能够始终显示导电性的量。 导电材料的表面层能够起到接触的作用，并且当表面层用作接触时，通过刺穿对方的表面层来确保电连接，例如至少进一步提供细导电颗粒层 导电通路的端面之一。 本发明的各向异性导电片可以有利地用于用作操作试验的电子装置或检查装置中作为接触器。

    Device testing contactor, method of producing the same, and device testing carrier
    53.
    发明授权
    Device testing contactor, method of producing the same, and device testing carrier 有权
    设备测试接触器，其制造方法和设备测试载体

    公开(公告)号：US07196530B2

    公开(公告)日：2007-03-27

    申请号：US10670377

    申请日：2003-09-26

    申请人： Makoto Haseyama ,  Shigeyuki Maruyama

    发明人： Makoto Haseyama ,  Shigeyuki Maruyama

    IPC分类号： G01R31/02 ,  H01R9/00

    CPC分类号： G01R1/0433 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49208 ,  Y10T29/4922

    摘要： A contactor used for testing a semiconductor device is provided. The semiconductor device testing contactor is electrically connected to electrodes of a semiconductor device to be tested. Such a contactor includes a wiring board and a first reinforcing member for reinforcing the wiring board. The contactor has a flexible base film and device connecting pads to be electrically connected to the electrodes of the semiconductor device. The first reinforcing member is disposed on the surface opposite to the semiconductor device connecting surface of the wiring board. The wiring board and the first reinforcing member are collectively bonded.

    摘要翻译： 提供了用于测试半导体器件的接触器。 半导体器件测试接触器电连接到要测试的半导体器件的电极。 这种接触器包括布线板和用于加强布线板的第一加强件。 接触器具有柔性基膜和与半导体器件的电极电连接的器件连接焊盘。 第一加强构件设置在与布线板的半导体器件连接表面相对的表面上。 接线板和第一加强件共同接合。

    Wafer-level package with test terminals
    56.
    发明授权
    Wafer-level package with test terminals 失效
    带测试端子的晶圆级封装

    公开(公告)号：US06762431B2

    公开(公告)日：2004-07-13

    申请号：US09803013

    申请日：2001-03-12

    申请人： Shigeyuki Maruyama

    发明人： Shigeyuki Maruyama

    IPC分类号： H01L2348

    CPC分类号： H01L22/32 ,  G01R31/2831 ,  G01R31/2884 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14

    摘要： A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.

    摘要翻译： 晶片级封装包括具有至少一个半导体芯片电路形成区域的半导体晶片，每个半导体芯片电路形成区域各自包括半导体芯片电路，每个半导体芯片电路分别具有测试芯片端子和非测试芯片端子，至少一个外部连接端子，至少一个再分布迹线 半导体晶片，至少一个测试构件和绝缘材料。 再分配迹线的第一端连接到测试芯片端子之一，并且所述再分布迹线的第二端延伸到与芯片端子偏移的位置。 测试构件设置在半导体芯片电路形成区域的外部区域中，再分布迹线的第二端连接到测试构件。

    Contactor for semiconductor devices, a testing apparatus using such contactor, a testing method using such contactor, and a method of cleaning such contactor
    57.
    发明授权
    Contactor for semiconductor devices, a testing apparatus using such contactor, a testing method using such contactor, and a method of cleaning such contactor 有权
    用于半导体器件的接触器，使用这种接触器的测试装置，使用这种接触器的测试方法以及清洁这种接触器的方法

    公开(公告)号：US06466046B1

    公开(公告)日：2002-10-15

    申请号：US09362111

    申请日：1999-07-28

    申请人： Shigeyuki Maruyama ,  Futoshi Fukaya ,  Makoto Haseyama

    发明人： Shigeyuki Maruyama ,  Futoshi Fukaya ,  Makoto Haseyama

    IPC分类号： G01R3102

    CPC分类号： H01L21/6838 ,  G01R1/07314 ,  G01R31/2831 ,  G01R31/2886 ,  H01L21/67126 ,  H01L21/68735 ,  H01L21/68785

    摘要： A contactor for semiconductor devices includes a base unit for holding a semiconductor device provided with a plurality of terminals and a wiring substrate provided with contact electrodes at positions corresponding to at least some of the terminals. The contact electrodes and the terminals are electrically connected when the wiring substrate is held on the base unit. The contactor further includes a position maintaining force applying mechanism for applying a position maintaining force between the base unit and the wiring substrate and a contact pressure applying mechanism for applying a contact pressure between the semiconductor device and the wiring substrate. The position maintaining force applying mechanism and the contact pressure applying mechanism are operable in an independent manner.

    摘要翻译： 半导体器件的接触器包括用于保持设置有多个端子的半导体器件的基座单元和在与至少一些端子对应的位置处设置有接触电极的布线基板。 当布线基板被保持在基座单元上时，接触电极和端子电连接。 接触器还包括用于在基座单元和布线基板之间施加位置保持力的位置保持力施加机构和用于在半导体器件和布线基板之间施加接触压力的接触压力施加机构。 位置保持力施加机构和接触压力施加机构以独立的方式操作。

    Probe card with rigid base having apertures for testing semiconductor device, and semiconductor device test method using probe card
    58.
    发明授权
    Probe card with rigid base having apertures for testing semiconductor device, and semiconductor device test method using probe card 有权
    具有用于测试半导体器件的孔的具有刚性基座的探针卡，以及使用探针卡的半导体器件测试方法

    公开(公告)号：US06433563B1

    公开(公告)日：2002-08-13

    申请号：US09417706

    申请日：1999-10-13

    申请人： Shigeyuki Maruyama

    发明人： Shigeyuki Maruyama

    IPC分类号： G01R3102

    CPC分类号： G01R1/0408 ,  G01R1/07314 ,  G01R31/2831

    摘要： The present invention relates to the testing method of a probe card and semiconductor device to conduct the testing to each chip in the wafer condition where a plurality of chips and CSPs (Chip Size Packages) are formed. The probe card is characterized by including a flexible contact board, a plurality of contact electrode groups provided in a predetermined layout on the contact board, a rigid base provided on the contact board between the contact electrode groups to have an aperture to expose the contact board of the area where the contact electrode is formed and wiring provided on the contact board and connected to the contact electrode. The advantages of the probe card is that it can always attain good contact condition of each chip and electrode pad of CSP on the occasion of testing the chip and CSP in the wafer condition.

    摘要翻译： 本发明涉及探针卡和半导体器件的测试方法，用于在形成多个芯片和CSP（芯片尺寸封装）的晶片状态下对每个芯片进行测试。 探针卡的特征在于包括柔性接触板，以接触板上的预定布置设置的多个接触电极组，设置在接触电极组之间的接触板上的刚性基座，以具有露出接触板的孔 形成接触电极的区域和设置在接触板上并连接到接触电极的布线。 探针卡的优点是在晶片状态下测试芯片和CSP时，可以始终获得CSP每个芯片和电极焊盘良好的接触条件。

    Test carrier for semiconductor integrated circuit and method of testing semiconductor integrated circuit
    60.
    发明授权
    Test carrier for semiconductor integrated circuit and method of testing semiconductor integrated circuit 失效
    半导体集成电路测试载体和半导体集成电路测试方法

    公开(公告)号：US5828224A

    公开(公告)日：1998-10-27

    申请号：US686052

    申请日：1996-07-24

    申请人： Shigeyuki Maruyama

    发明人： Shigeyuki Maruyama

    IPC分类号： G01R1/04 ,  G01R31/28 ,  G01R31/02

    CPC分类号： G01R1/0483 ,  G01R31/2886 ,  G01R31/2893

    摘要： A holding apparatus of a semiconductor device had a configuration for putting a semiconductor device as a chip or a packaged semiconductor device between a first substrate and a second substrate and fitting magnets to the first substrate and magnetic pieces to the second substrate respectively, and the first substrate and the second substrate are fixed by attraction acted between the magnets and the magnetic pieces.

    摘要翻译： 半导体装置的保持装置具有将半导体器件作为芯片或封装的半导体器件放置在第一基板和第二基板之间并且将磁体分别配合到第一基板和磁片到第二基板的配置，并且第一 基板和第二基板通过作用在磁体和磁片之间的吸引来固定。