公开(公告)号：US20120061663A1

公开(公告)日：2012-03-15

申请号：US13226713

申请日：2011-09-07

申请人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

发明人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

IPC分类号： H01L29/12 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/04 ,  H01L29/24 ,  H01L29/78603

摘要： An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al2O3, α-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or α-Fe2O3) is used.

摘要翻译： 本发明的目的是提供一种具有稳定的电气特性和高可靠性的氧化物半导体膜的半导体装置。 通过在绝缘表面上形成厚度为1nm至10nm的第一材料膜（具有六方晶体结构的膜）形成第一和第二材料膜的叠层，并形成具有六方晶系结构的第二材料膜（ 使用第一材料膜作为核的结晶氧化物半导体膜）。 作为第一材料膜，具有纤锌矿晶体结构的材料膜（例如氮化镓或氮化铝）或具有刚玉晶体结构的材料膜（α-Al 2 O 3，α-Ga 2 O 3，In 2 O 3，Ti 2 O 3，V 2 O 3，Cr 2 O 3，或 α-Fe 2 O 3）。

公开(公告)号：US20110318875A1

公开(公告)日：2011-12-29

申请号：US13230905

申请日：2011-09-13

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： H01L21/34

CPC分类号： H01L29/66772 ,  H01L29/6675 ,  H01L29/78618 ,  H01L29/7869

摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US20110272699A1

公开(公告)日：2011-11-10

申请号：US13186170

申请日：2011-07-19

申请人： Kengo AKIMOTO ,  Hotaka MARUYAMA

发明人： Kengo AKIMOTO ,  Hotaka MARUYAMA

IPC分类号： H01L29/786 ,  H01L21/283 ,  H01L21/336

CPC分类号： H01L21/02672 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/2026 ,  H01L21/3221 ,  H01L27/124 ,  H01L27/1277 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78678

摘要： A gate electrode is formed by forming a first conductive layer containing aluminum as its main component over a substrate, forming a second conductive layer made from a material different from that used for forming the first conductive layer over the first conductive layer; and patterning the first conductive layer and the second conductive layer. Further, the first conductive layer includes one or more selected from carbon, chromium, tantalum, tungsten, molybdenum, titanium, silicon, and nickel. And the second conductive layer includes one or more selected from chromium, tantalum, tungsten, molybdenum, titanium, silicon, and nickel, or nitride of these materials.

摘要翻译： 通过在衬底上形成以铝作为主要成分的第一导电层形成栅电极，形成由不同于在第一导电层上形成第一导电层的材料制成的材料制成的第二导电层; 以及图案化第一导电层和第二导电层。 此外，第一导电层包括选自碳，铬，钽，钨，钼，钛，硅和镍中的一种或多种。 并且第二导电层包括选自铬，钽，钨，钼，钛，硅和镍中的一种或多种，​​或这些材料的氮化物。

公开(公告)号：US20110210396A1

公开(公告)日：2011-09-01

申请号：US13105505

申请日：2011-05-11

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC分类号： H01L29/78

CPC分类号： H01L29/78621 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/66757 ,  H01L2029/7863

摘要： A semiconductor device includes a semiconductor layer overlapping with a gate electrode and having an impurity region outside a region which overlaps with the gate electrode; a first conductive layer which is provided on a side provided with the gate electrode of the semiconductor layer and partially in contact with the impurity region; an insulating layer provided over the gate electrode and the first conductive layer; and a second conductive layer which is formed in the insulating layer and in contact with the first conductive layer through an opening at least part of which overlaps with the first conductive layer.

摘要翻译： 半导体器件包括与栅电极重叠并且在与栅电极重叠的区域之外具有杂质区域的半导体层; 第一导电层，其设置在设置有半导体层的栅电极并且部分地与杂质区接触的一侧; 设置在所述栅电极和所述第一导电层上的绝缘层; 以及第二导电层，其形成在所述绝缘层中并且通过其至少一部分与所述第一导电层重叠的开口与所述第一导电层接触。

公开(公告)号：US20110210325A1

公开(公告)日：2011-09-01

申请号：US12871148

申请日：2010-08-30

申请人： Masayuki SAKAKURA ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA

发明人： Masayuki SAKAKURA ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/124 ,  G02F1/134309 ,  G02F1/13454 ,  G02F1/1368 ,  G02F2202/10 ,  H01L27/1225 ,  H01L27/1255

摘要： The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

摘要翻译： 半导体器件包括驱动器电路部分，其包括驱动器电路和包括像素的像素部分。 像素包括具有透光性的栅极电极层，栅极绝缘层，源极电极层和漏极电极层，其各自具有设置在栅极绝缘层上的透光性，覆盖顶表面的氧化物半导体层和 源极电极层和漏极电极层的侧面，并且在栅电极层之间设置有栅极绝缘层，导电层设置在氧化物半导体层的一部分上，并且具有比源电极层和漏极 电极层和与氧化物半导体层的一部分接触的氧化物绝缘层。

公开(公告)号：US20110062436A1

公开(公告)日：2011-03-17

申请号：US12880343

申请日：2010-09-13

申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。

公开(公告)号：US20110049510A1

公开(公告)日：2011-03-03

申请号：US12861190

申请日：2010-08-23

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC分类号： H01L33/08 ,  H01L33/16 ,  H01L21/336

CPC分类号： H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

摘要翻译： 本发明的目的是提供具有优异显示特性的显示装置，其中使用具有对应于各个电路的特性的不同结构的晶体管形成设置在一个基板上的像素电路和驱动电路。 驱动器电路部分包括驱动电路晶体管，其中使用金属膜形成栅电极层，源电极层和漏电极层，并且使用氧化物半导体形成沟道层。 像素部分包括其中使用氧化物导体形成栅电极层，源电极层和漏电极层的像素晶体管，并且使用氧化物半导体形成半导体层。 像素晶体管使用透光材料形成，因此可以制造具有较高开口率的显示装置。

公开(公告)号：US20100279474A1

公开(公告)日：2010-11-04

申请号：US12768205

申请日：2010-04-27

申请人： Kengo AKIMOTO ,  Daisuke KAWAE

发明人： Kengo AKIMOTO ,  Daisuke KAWAE

IPC分类号： H01L21/336

CPC分类号： H01L27/1225 ,  H01L27/1214 ,  H01L29/7869

摘要： A formation of a gate electrode provided over an oxide semiconductor layer of a thin film transistor is performed together with a patterning of the oxide semiconductor layer.

摘要翻译： 在薄膜晶体管的氧化物半导体层上设置的栅电极的形成与氧化物半导体层的图案化一起进行。

公开(公告)号：US20100252826A1

公开(公告)日：2010-10-07

申请号：US12570498

申请日：2009-09-30

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/124 ,  G09G3/3233 ,  G09G2310/0286 ,  G09G2310/0297 ,  H01L21/02565 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/12 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518

摘要： With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. The increase in the numbers of gate lines and signal lines makes it difficult to mount an IC chip having a driver circuit for driving the gate line and the signal line by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit driving the pixel portion are provided over the same substrate. The pixel portion and at least a part of the driver circuit are formed using thin film transistors in each of which an oxide semiconductor is used. Both the pixel portion and the driver circuit are provided over the same substrate, whereby manufacturing costs are reduced.

摘要翻译： 随着显示装置的定义的增加，像素的数量增加，因此栅极线和信号线的数量增加。 栅极线和信号线的数量的增加使得难以安装具有用于通过接合等驱动栅极线和信号线的驱动电路的IC芯片，这导致制造成本的增加。 驱动像素部的像素部和驱动电路设置在同一基板上。 像素部分和驱动电路的至少一部分使用薄膜晶体管形成，其中每个使用氧化物半导体。 像素部分和驱动电路均设置在相同的基板上，由此降低了制造成本。

公开(公告)号：US20100117075A1

公开(公告)日：2010-05-13

申请号：US12612700

申请日：2009-11-05

申请人： Kengo AKIMOTO ,  Shunpei YAMAZAKI

发明人： Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC分类号： H01L29/26

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

摘要翻译： 本发明的目的是防止诸如水分和氧气的杂质混入氧化物半导体中并抑制其中使用氧化物半导体的半导体器件的半导体特性的变化。 另一个目的是提供一种具有高可靠性的半导体器件。 提供在具有绝缘表面的衬底上的栅极绝缘膜，设置在栅极绝缘膜上的源极和漏极，设置在源电极和漏极上的第一氧化物半导体层，以及源极和漏极区 设置在源电极和漏电极之间以及第一氧化物半导体层。 提供与第一氧化物半导体层接触的阻挡膜。