公开(公告)号：US20110123936A1

公开(公告)日：2011-05-26

申请号：US13022560

申请日：2011-02-07

申请人： Masafumi HORI ,  Michihiro Mita ,  Kouichi Fujiwara ,  Katsuhiko Hieda ,  Yoshikazu Yamaguchi ,  Tomohiro Kakizawa

发明人： Masafumi HORI ,  Michihiro Mita ,  Kouichi Fujiwara ,  Katsuhiko Hieda ,  Yoshikazu Yamaguchi ,  Tomohiro Kakizawa

IPC分类号： G03F7/20 ,  C08L61/28 ,  C08L33/26 ,  C08L41/00

CPC分类号： H01L21/0273 ,  G03F7/0035 ,  G03F7/0392 ,  G03F7/0397 ,  G03F7/2041

摘要： A resist pattern coating agent includes a hydroxyl group-containing resin, a solvent, and at least two compounds including at least two groups shown by a following formula (1), compounds including a group shown by a following formula (2), and compounds including a group shown by a following formula (4).

摘要翻译： 抗蚀剂图案涂布剂包括含羟基的树脂，溶剂和至少两种包含由下式（1）表示的至少两个基团的化合物，包括由下式（2）表示的基团的化合物和化合物 包括由下式（4）表示的组。

公开(公告)号：US20100159710A1

公开(公告)日：2010-06-24

申请号：US12659071

申请日：2010-02-24

申请人： Osamu Arisumi ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda

发明人： Osamu Arisumi ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda

IPC分类号： H01L21/469

CPC分类号： B05B9/04 ,  B05B9/047 ,  B05C11/08 ,  B05C11/10

摘要： A semiconductor manufacturing apparatus comprises a discharge portion discharging a coating liquid onto a substrate; a gas supply tube supplying an inert gas into a liquid container that contains the coating liquid, and pressurizing an interior of the liquid container; a coating liquid supply tube airtightly supplying the coating liquid from the liquid container to the discharge portion using pressurization from the gas supply tube; a first connecting portion capable of attaching and detaching the liquid container to and from the coating liquid supply tube; a second connecting portion capable of attaching and detaching the liquid container to and from the gas supply tube; and a solvent supply tube supplying a solvent, which can dissolve the coating liquid, to the first connecting portion.

摘要翻译： 半导体制造装置包括将涂布液排出到基板上的排出部; 气体供给管，将惰性气体供给到容纳所述涂布液的液体容器内，对所述液体容器的内部进行加压; 涂料液体供给管通过来自气体供给管的加压将涂布液从液体容器密封地供给到排出部; 第一连接部分，其能够将液体容器附接到涂布液供应管和从涂布液供应管分离; 第二连接部分，其能够将液体容器附接到气体供应管和从气体供应管排出; 以及将能够溶解涂布液的溶剂供给到第一连接部的溶剂供给管。

公开(公告)号：US20100055869A1

公开(公告)日：2010-03-04

申请号：US12588087

申请日：2009-10-02

申请人： Osamu Arisumi ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda ,  Yoshitaka Tsunashima

发明人： Osamu Arisumi ,  Masahiro Kiyotoshi ,  Katsuhiko Hieda ,  Yoshitaka Tsunashima

IPC分类号： H01L21/762

CPC分类号： H01L27/11521 ,  H01L27/11524

摘要： A method of manufacturing a semiconductor device comprises forming a trench in a semiconductor substrate, forming a first insulating film having a first recessed portion in the trench, forming a coating film so as to fill the first recessed portion therewith, transforming the coating film into a second insulating film, planarizing the second insulating film to expose the first insulating film and the second insulating film, removing at least the second insulating film from the first recessed portion to moderate an aspect ratio for the first recessed portion formed in the trench, thereby forming a second recessed portion therein, and forming a third insulating film on a surface of the semiconductor substrate so as to fill the second recessed portion therewith.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底中形成沟槽，在沟槽中形成具有第一凹陷部分的第一绝缘膜，形成涂膜以便将其涂覆在第一凹部中，将涂膜转变为 第二绝缘膜，平坦化第二绝缘膜以暴露第一绝缘膜和第二绝缘膜，至少从第一凹部去除第二绝缘膜，以调节形成在沟槽中的第一凹部的纵横比，由此形成 在其中形成第二凹部，在半导体衬底的表面上形成第三绝缘膜，以便填充第二凹部。

公开(公告)号：US20080129970A1

公开(公告)日：2008-06-05

申请号：US11795809

申请日：2006-01-20

申请人： Taiichi Furukawa ,  Katsuhiko Hieda ,  Yakashi Miyamatsu ,  Yong Wang ,  Kinji Yamada

发明人： Taiichi Furukawa ,  Katsuhiko Hieda ,  Yakashi Miyamatsu ,  Yong Wang ,  Kinji Yamada

IPC分类号： G03B27/42 ,  H01L21/027 ,  G03F7/038 ,  G03B27/52 ,  G03F7/20

CPC分类号： G03F7/70341

摘要： An immersion exposure system 1 performs an exposure process through a liquid 301 provided between an optical element of a projection optical means 121 and a substrate 111. The immersion exposure system 1 includes a liquid supply section 80 which supplies the liquid 301, an exposure section to which the liquid 301 (301b) supplied from the liquid supply section 80 is continuously introduced along a specific direction and which performs an exposure process in a state in which a space between the optical element of the projection optical means 121 and the substrate 111 is filled with the liquid 301, a liquid recovery section 90 which recovers the liquid 301 (301a) passed through the exposure section 110 at a symmetrical position against the substrate 111, and a liquid recycling section 20 which recycles the liquid 301 (301c) recovered by the liquid recovery section 90. The properties of the immersion exposure liquid can be stabilized when applying an immersion method, whereby exposure can be advantageously and continuously performed, and running cost can be reduced.

摘要翻译： 浸没曝光系统1通过设置在投影光学装置121的光学元件和基板111之间的液体301进行曝光处理。 浸没曝光系统1包括供给液体301的液体供给部80，从液体供给部80供给的液体301（301b）沿特定方向连续导入的曝光部，并进行曝光处理 投影光学装置121的光学元件和基板111之间的空间被液体301填充的状态，使液体301（301a）以对称的方式通过曝光部110的液体回收部90 与液体回收部90回收的液体301（301c）的液体再循环部20。 浸渍曝光液体的性质可以通过浸渍法稳定化，可以有利且连续地进行曝光，能够降低运转成本。

公开(公告)号：US07224019B2

公开(公告)日：2007-05-29

申请号：US11064453

申请日：2005-02-24

申请人： Katsuhiko Hieda ,  Daisuke Hagishima

发明人： Katsuhiko Hieda ,  Daisuke Hagishima

IPC分类号： H01L27/12 ,  G11C11/34

CPC分类号： H01L27/115 ,  G11C16/0483 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42332 ,  H01L29/7851 ,  H01L29/7881

摘要： A semiconductor device comprises a semiconductor substrate, an electrically rewritable semiconductor memory cell provided on the semiconductor substrate, the memory cell comprising an island semiconductor portion provided on the surface of the semiconductor substrate or above the semiconductor substrate, a first insulating film provided on a top surface of the island semiconductor portion, a second insulating film provided on a side surface of the island semiconductor portion and being smaller in thickness than the first insulating film, and a charge storage layer provided on the side surface of the island semiconductor portion with the second insulating film interposed therebetween and on a side surface of the first insulating film, a third insulating film provided on the charge storage layer, and a control gate electrode provided on the third insulating film.

摘要翻译： 半导体器件包括半导体衬底，设置在半导体衬底上的电可重写半导体存储单元，所述存储单元包括设置在半导体衬底的表面上或半导体衬底上的岛状半导体部分，设置在顶部上的第一绝缘膜 岛半导体部分的表面，设置在岛状半导体部分的侧表面上并且厚度小于第一绝缘膜的第二绝缘膜，以及设置在岛半导体部分的侧表面上的电荷存储层，第二绝缘膜具有第二绝缘膜 绝缘膜和第一绝缘膜的侧面，设置在电荷存储层上的第三绝缘膜和设置在第三绝缘膜上的控制栅电极。

公开(公告)号：US07105397B2

公开(公告)日：2006-09-12

申请号：US10804159

申请日：2004-03-19

申请人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

发明人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

IPC分类号： H01L21/8238

CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/76229

摘要： According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectric film on the semiconductor substrate so as to fill the step and planarize an entire surface; annealing the dielectric film; etching back the dielectric film such that a surface of the dielectric film is positioned between upper and lower surfaces of the mask material; and removing the mask material to expose a surface of the projection of the semiconductor substrate.

摘要翻译： 根据本发明，提供了一种半导体器件制造方法，其具有在半导体衬底的表面部分中形成掩模材料，并且通过使用掩模材料形成具有突起的台阶; 在所述半导体衬底上形成电介质膜，以填充所述台阶并使整个表面平坦化; 电介质膜退火; 蚀刻介电膜，使得电介质膜的表面位于掩模材料的上表面和下表面之间; 以及去除所述掩模材料以暴露所述半导体衬底的所述突起的表面。

公开(公告)号：US07060559B2

公开(公告)日：2006-06-13

申请号：US10352083

申请日：2003-01-28

申请人： Yoshio Ozawa ,  Katsuhiko Hieda ,  Atsuko Kawasaki

发明人： Yoshio Ozawa ,  Katsuhiko Hieda ,  Atsuko Kawasaki

IPC分类号： H01L21/336 ,  H01L21/76

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L29/42324

摘要： In a method of manufacturing a semiconductor device having a nonvolatile semiconductor memory element with a two-layered gate structure in which a floating gate and control gate are stacked, a polysilicon layer serving as the floating gate is stacked on a silicon substrate via a tunnel insulating film. Then, the silicon layer, tunnel insulating film, and substrate are selectively etched to form an element isolation trench. A nitride film is formed on the sidewall surface of the silicon layer exposed into the element isolation trench. An oxide film is buried in the element isolation trench. A conductive film serving as the control gate is stacked on the oxide film and silicon layer via an electrode insulating film. The conductive film, electrode insulating film, and silicon layer are selectively etched to form the control gate and floating gate.

摘要翻译： 在制造半导体器件的方法中，该半导体器件具有堆叠浮置栅极和控制栅极的双层栅极结构的非易失性半导体存储元件，用作浮置栅极的多晶硅层通过隧道绝缘层叠在硅衬底上 电影。 然后，选择性地蚀刻硅层，隧道绝缘膜和衬底以形成元件隔离沟槽。 在露出到元件隔离沟槽中的硅层的侧壁表面上形成氮化物膜。 氧化膜被埋在元件隔离槽中。 用作控制栅极的导电膜通过电极绝缘膜堆叠在氧化膜和硅层上。 选择性地蚀刻导电膜，电极绝缘膜和硅层以形成控制栅极和浮动栅极。

公开(公告)号：US20050116300A1

公开(公告)日：2005-06-02

申请号：US10804159

申请日：2004-03-19

申请人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

发明人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

IPC分类号： H01L21/76 ,  H01L21/312 ,  H01L21/314 ,  H01L21/316 ,  H01L21/335 ,  H01L21/762 ,  H01L27/08

CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/76229

摘要： According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectric film on the semiconductor substrate so as to fill the step and planarize an entire surface; annealing the dielectric film; etching back the dielectric film such that a surface of the dielectric film is positioned between upper and lower surfaces of the mask material; and removing the mask material to expose a surface of the projection of the semiconductor substrate.

摘要翻译： 根据本发明，提供了一种半导体器件制造方法，其具有在半导体衬底的表面部分中形成掩模材料，并且通过使用掩模材料形成具有突起的台阶; 在所述半导体衬底上形成电介质膜，以填充所述台阶并使整个表面平坦化; 电介质膜退火; 蚀刻介电膜，使得电介质膜的表面位于掩模材料的上表面和下表面之间; 以及去除所述掩模材料以暴露所述半导体衬底的所述突起的表面。

公开(公告)号：US06849894B2

公开(公告)日：2005-02-01

申请号：US10317063

申请日：2002-12-12

申请人： Jun Lin ,  Toshiya Suzuki ,  Katsuhiko Hieda

发明人： Jun Lin ,  Toshiya Suzuki ,  Katsuhiko Hieda

IPC分类号： H01L21/322 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/94

CPC分类号： H01L27/10852 ,  H01L21/31604 ,  H01L27/10894 ,  H01L28/40 ,  H01L28/55 ,  H01L28/90

摘要： On a semiconductor substrate, a transistor and a capacitor electrically connected to the transistor are formed, the capacitor having two electrodes made of metal and a capacitor dielectric layer between the two electrodes made of oxide dielectric material. A temporary protective film is formed over the capacitor, the temporary protective film covering the capacitor. The semiconductor substrate with the temporary protective film is subjected to a heat treatment in a reducing atmosphere. The temporary protective film is removed. The semiconductor substrate with the temporary protective film removed is subjected to a heat treatment in an inert gas atmosphere or in a vacuum state. A protective film is formed over the capacitor, the protective film covering the capacitor. With these processes, leak current of the capacitor can be reduced.

摘要翻译： 在半导体衬底上，形成与晶体管电连接的晶体管和电容器，该电容器具有由金属制成的两个电极和由氧化物介电材料制成的两个电极之间的电容器电介质层。 在电容器上形成临时保护膜，临时保护膜覆盖电容器。 具有临时保护膜的半导体衬底在还原气氛中进行热处理。 移除临时保护膜。 将除去了临时保护膜的半导体基板在惰性气体气氛或真空状态下进行热处理。 在电容器上形成保护膜，保护膜覆盖电容器。 通过这些处理，可以减小电容器的漏电流。

公开(公告)号：US06600166B2

公开(公告)日：2003-07-29

申请号：US09910919

申请日：2001-07-24

申请人： Takashi Sato ,  Katsuhiko Hieda

发明人： Takashi Sato ,  Katsuhiko Hieda

IPC分类号： G01N2186

CPC分类号： G03F9/7026 ,  G03F7/70333 ,  G03F7/70358 ,  G03F7/70425 ,  G03F7/70466

摘要： Disclosed is a scanning exposure method, in which, when a pattern formed on a mask is transferred onto a wafer via an optical projection, the projecting region of the mask is limited by a slit, and the mask and the wafer are scanned in synchronism with the slit fixed so as to transfer the entire pattern region of the mask onto the wafer. In the scanning exposure method of the present invention, the exposure of the entire mask by the scanning of mask and the wafer is carried out twice by changing the exposure conditions. The first exposure and the second exposure are made opposite to each other in the scanning direction of the mask and the wafer so as to improve the pattern transfer accuracy.