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公开(公告)号:US20240176571A1
公开(公告)日:2024-05-30
申请号:US18432639
申请日:2024-02-05
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yoshiharu HIRAKATA , Shunpei YAMAZAKI
IPC: G06F3/14 , G06F1/16 , G06F3/041 , G09G5/14 , H10K59/121 , H10K59/131 , H10K59/40 , H10K77/10 , G02F1/1333
CPC classification number: G06F3/1446 , G06F1/1652 , G06F3/0412 , G09G5/14 , H10K59/1213 , H10K59/131 , H10K59/40 , H10K77/111 , G02F1/133305 , G09G2300/02 , G09G2330/022 , G09G2380/02
Abstract: An electronic device including a housing, a display panel with a flexible substrate, and a flexible printed circuit, in which the housing comprises a flat surface and a side surface comprising a curved region, the display panel comprises a first region that overlaps with the flat surface and a second region that overlaps with the side surface, the display panel comprises a convex portion that comprises a region overlapping with a flexible printed circuit, and the display panel comprises a display portion in the first region and the second region.
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公开(公告)号:US20240170667A1
公开(公告)日:2024-05-23
申请号:US18550769
申请日:2022-03-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Tetsuya KAKEHATA , Yohei MOMMA , Yumiko YONEDA , Kazutaka KURIKI , Tatsuyoshi TAKAHASHI , Kunihiro FUKUSHIMA
IPC: H01M4/525 , B60L50/64 , H01M4/02 , H01M4/131 , H01M50/109
CPC classification number: H01M4/525 , H01M4/131 , H01M50/109 , B60L50/64 , H01M2004/028 , H01M2220/20
Abstract: A battery in which a decrease in discharge capacity retention rate in charge and discharge cycle tests is inhibited is provided. The battery includes a positive electrode and a negative electrode. The positive electrode is used as a positive electrode of a test battery in which a negative electrode includes a lithium metal. When a test of 50 repetitions of a cycle of charge and discharge in which, after constant current charge is performed at a charge rate of 1 C (1 C=200 mA/g) until a voltage of 4.6 V is reached, constant voltage charge is performed at a voltage of 4.6 V until the charge rate reaches 0.1 C, and constant current discharge is then performed at a discharge rate of 1 C until a voltage of 2.5 V is reached is performed in a 25° C. environment or a 45° C. environment and discharge capacity is measured in each cycle, a discharge capacity value measured in a 50th cycle accounts for higher than or equal to 90% and lower than 100% of a maximum discharge capacity value in all 50 cycles.
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公开(公告)号:US20240155870A1
公开(公告)日:2024-05-09
申请号:US18280517
申请日:2022-03-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Ryota HODO , Yasuhiro JINBO , Kenichi OKAZAKI
CPC classification number: H10K59/1201 , H10K71/10 , H10K71/231 , H10K71/40
Abstract: Manufacturing equipment in which processes from processing to sealing of an organic compound film can be successively performed is provided. A patterning process of a light-emitting device and a sealing process that is performed to prevent the surface and side surface of an organic layer from being exposed to the air can be performed successively, whereby a minute light-emitting device with high luminance and high reliability can be formed. Moreover, the manufacturing equipment can be incorporated in in-line manufacturing equipment where apparatuses are arranged in the order of processes for a light-emitting device, resulting in high throughput manufacturing.
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公开(公告)号:US20240154039A1
公开(公告)日:2024-05-09
申请号:US18403791
申请日:2024-01-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Katsuaki TOCHIBAYASHI , Ryota HODO , Kentaro SUGAYA , Naoto YAMADE
IPC: H01L29/786 , H01L29/24 , H01L29/66 , H10B12/00
CPC classification number: H01L29/7869 , H01L29/24 , H01L29/66742 , H10B12/05 , H10B12/31
Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
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公开(公告)号:US20240143109A1
公开(公告)日:2024-05-02
申请号:US18408766
申请日:2024-01-10
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Kensuke YOSHIZUMI
CPC classification number: G06F3/041661 , G02F1/133305 , G06F1/1616 , G06F1/1626 , G06F1/1637 , G06F1/1643 , G06F1/1647 , G06F1/1649 , G06F1/1654 , G06F1/1669 , G06F3/013 , G06F3/041 , G06F3/0412 , G09G3/035 , G09G3/2092 , G02F2203/02 , G06F2203/04103 , G09G2330/021 , G09G2330/023 , G09G2354/00 , G09G2356/00 , G09G2380/14
Abstract: A convenient electronic device or the like is provided. The power consumption of an electronic device or the like is reduced. An electronic device or the like having high visibility regardless of the brightness of external light is provided. An electronic device or the like that can display both a smooth moving image and an eye-friendly still image is provided. Such an electronic device is an electronic device including a first display portion, a second display portion, and a control portion. The control portion is configured to make the first display portion and the second display portion individually display two or more of a first image, a second image, and a third image at a time. The first image is displayed with reflected light, the second image is displayed with emitted light, and the third image is displayed with light including both reflected light and emitted light.
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56.
公开(公告)号:US20240138223A1
公开(公告)日:2024-04-25
申请号:US18277791
申请日:2022-02-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kenichi OKAZAKI , Daiki NAKAMURA , Rai SATO
CPC classification number: H10K59/38 , H10K59/1201 , H10K71/60 , H10K2102/103
Abstract: A high-definition or high-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, and a second insulating layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. Each of an end portion of the first pixel electrode and an end portion of the second pixel electrode is covered with the first insulating layer. The second insulating layer is positioned over the first insulating layer. The second insulating layer covers each of a side surface of the first light-emitting layer and a side surface of the second light-emitting layer.
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公开(公告)号:US20240122028A1
公开(公告)日:2024-04-11
申请号:US18274810
申请日:2022-02-07
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Hisao IKEDA , Tatsuya ONUKI , Shunpei YAMAZAKI
CPC classification number: H10K59/65 , A61B3/005 , A61B3/12 , A61B3/14 , H10K59/90 , H10K59/95 , H01L24/05
Abstract: An object of one embodiment of the present invention is to provide a novel display device or a display system. Another object of one embodiment of the present invention is to provide a display device or a display system which can be manufactured at low cost and can provide various functions to a user. A pixel includes light-emitting elements whose emission colors are different from each other, a light-emitting element IR, a light-receiving element PS, and an infrared light sensor IRS. An image of a fundus of an eye is captured using the light-emitting element emitting an infrared light as a light source, and imaging is performed by the light-receiving element IRS. A substrate of a display panel is manufactured using a single crystal Si substrate capable of microfabrication and higher integration.
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58.
公开(公告)号:US20240121990A1
公开(公告)日:2024-04-11
申请号:US18262408
申请日:2022-01-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Satoshi SEO
IPC: H10K59/122 , H10K59/80
CPC classification number: H10K59/122 , H10K59/80515 , H10K59/35
Abstract: A light-emitting apparatus can be provided at low cost. The light-emitting apparatus includes a plurality of partitions formed over an insulating surface and extending in a first direction, a plurality of pixel electrodes each having an island shape formed over the insulating surface, an EL layer formed over the pixel electrodes, and a second electrode formed over the EL layer. The partition has an insulating property, the pixel electrodes that are aligned in the first direction are positioned column by column between adjacent partitions in the plurality of partitions, and the EL layer is in contact with the insulating surface between the pixel electrodes adjacent to each other in the first direction in the pixel electrodes aligned in the first direction.
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公开(公告)号:US20240120339A1
公开(公告)日:2024-04-11
申请号:US18537929
申请日:2023-12-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI
IPC: H01L27/105 , G11C11/405 , G11C16/04 , H01L21/02 , H01L21/46 , H01L21/8258 , H01L27/12 , H01L29/06 , H01L29/786 , H10B41/10 , H10B41/20 , H10B41/30 , H10B41/35 , H10B41/70
CPC classification number: H01L27/105 , G11C11/405 , G11C16/0433 , H01L21/02664 , H01L21/46 , H01L21/8258 , H01L27/1225 , H01L29/06 , H01L29/7869 , H01L29/78693 , H10B41/10 , H10B41/20 , H10B41/30 , H10B41/35 , H10B41/70 , H01L27/0207
Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
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60.
公开(公告)号:US20240113138A1
公开(公告)日:2024-04-04
申请号:US18473750
申请日:2023-09-25
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hajime KIMURA , Kentaro HAYASHI , Shunpei YAMAZAKI
IPC: H01L27/12
CPC classification number: H01L27/1255 , H01L27/1225 , H01L27/1259
Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, a transistor, and a first insulating layer. The capacitor includes first and second conductive layers and a second insulating layer. The second insulating layer is in contact with a side surface of the first conductive layer, and the second conductive layer covers at least part of the side surface of the first conductive layer with the second insulating layer therebetween. The transistor includes third to fifth conductive layers, a semiconductor layer, and a third insulating layer. The third conductive layer is in contact with a top surface of the first conductive layer. The first insulating layer is provided over the third conductive layer, and the fourth conductive layer is provided over the first insulating layer. The first insulating layer and the fourth conductive layer include an opening portion reaching the third conductive layer. The semiconductor layer is in contact with the third and fourth conductive layers. The semiconductor layer includes a region positioned inside the opening portion. Over the semiconductor layer, the third insulating layer and the fifth conductive layer are provided in this order so as to each include a region positioned inside the opening portion.
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