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103 条记录 (耗时 0.036 秒)

    Semiconductor device
    52.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09379181B2

    公开(公告)日：2016-06-28

    申请号：US14258251

    申请日：2014-04-22

    申请人： Masahiro Sugimoto

    发明人： Masahiro Sugimoto

    IPC分类号： H01L29/66 ,  H01L29/76 ,  H01L27/16 ,  H01L29/94 ,  H01L27/06 ,  H01L29/06 ,  H01L29/78 ,  H01L29/32 ,  H01L29/40 ,  H01L29/423 ,  H01L29/739 ,  H01L29/16

    CPC分类号： H01L29/0653 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/32 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/7397 ,  H01L29/7804

    摘要： A semiconductor device is provided with a semiconductor substrate in which a power semiconductor element part and a temperature sensing diode part are provided. The temperature sensing diode part includes a first semiconductor region, a second semiconductor region, a first base region, and a first drift region. In the semiconductor substrate, an isolation trench is formed, which passes through the first base region, extends to the first drift region, and surrounds an outer periphery of the temperature sensing diode part. At least a part of one of side walls of the isolation trench is in contact with the power semiconductor element part, and the other side wall of the isolation trench is in contact with the temperature sensing diode part.

    摘要翻译： 半导体器件设置有半导体衬底，其中提供功率半导体元件部分和温度感测二极管部分。 温度感测二极管部分包括第一半导体区域，第二半导体区域，第一基极区域和第一漂移区域。 在半导体衬底中，形成隔离沟槽，其通过第一基极区域延伸到第一漂移区域并且包围温度感测二极管部件的外周。 隔离沟槽的一个侧壁的至少一部分与功率半导体元件部分接触，并且隔离沟槽的另一个侧壁与温度感测二极管部分接触。

    Recording apparatus
    53.
    发明授权
    Recording apparatus 有权
    记录装置

    公开(公告)号：US09242470B2

    公开(公告)日：2016-01-26

    申请号：US12946733

    申请日：2010-11-15

    申请人： Seiji Suzuki ,  Yuji Kanome ,  Hiroyuki Tanaka ,  Yoshiaki Suzuki ,  Masahiro Sugimoto ,  Susumu Hirosawa ,  Takeaki Nakano

    发明人： Seiji Suzuki ,  Yuji Kanome ,  Hiroyuki Tanaka ,  Yoshiaki Suzuki ,  Masahiro Sugimoto ,  Susumu Hirosawa ,  Takeaki Nakano

    IPC分类号： B41J2/165

    CPC分类号： B41J2/16532 ,  B41J2/16541 ,  B41J2/16544 ,  B41J2/16547 ,  B41J2/16585

    摘要： An apparatus includes a recording head arranged so as to oppose a sheet moving in a first direction, in which a plurality of first nozzle chips and a plurality of second nozzle chips each having a nozzle array are arranged as different arrays in a second direction crossing the first direction, and in which the first nozzle chips and the second nozzle chips adjacent to each other are shifted from each other in the second direction, a first suction unit opposed to the first nozzle chips and configured to suction ink from a part of the nozzle arrays included in the first nozzle chips, a second suction unit opposed to the second nozzle chips and configured to suction ink from a part of the nozzle arrays included in the second nozzle chips, a suction holder configured to retain the first suction unit and the second suction unit, and a movement mechanism configured to cause relative movement between the recording head and the suction holder in the second direction, wherein the first suction unit and the second suction unit are shifted from each other in the second direction in correspondence with the shift between the first nozzle chips and the second nozzle chips.

    摘要翻译： 一种设备包括：记录头，其布置成与沿第一方向移动的片材相对，其中多个第一喷嘴芯片和多个具有喷嘴阵列的第二喷嘴芯片沿与第二方向交叉的第二方向排列成不同的阵列 第一方向，并且其中彼此相邻的第一喷嘴芯片和第二喷嘴芯片沿第二方向彼此偏移;第一抽吸单元，与第一喷嘴芯片相对并且构造成从喷嘴的一部分吸取墨水 包括在第一喷嘴芯片中的阵列，与第二喷嘴芯片相对并且被配置为从包括在第二喷嘴芯片中的喷嘴阵列的一部分吸入墨水的第二抽吸单元，构造成保持第一抽吸单元和第二抽吸单元 抽吸单元和移动机构，其构造成在第二方向上在记录头和吸持保持器之间产生相对运动，其中第一抽吸 单元和第二抽吸单元相对于第一喷嘴芯片和第二喷嘴芯片之间的移动在第二方向上彼此偏移。

    Nitride semiconductor device including gate insulating portion containing AIN
    57.
    发明授权
    Nitride semiconductor device including gate insulating portion containing AIN 有权
    氮化物半导体器件包括含有AIN的栅极绝缘部分

    公开(公告)号：US08222675B2

    公开(公告)日：2012-07-17

    申请号：US12544451

    申请日：2009-08-20

    申请人： Masahiro Sugimoto ,  Hiroyuki Ueda ,  Tsutomu Uesugi ,  Masakazu Kanechika ,  Tetsu Kachi

    发明人： Masahiro Sugimoto ,  Hiroyuki Ueda ,  Tsutomu Uesugi ,  Masakazu Kanechika ,  Tetsu Kachi

    IPC分类号： H01L29/778

    CPC分类号： H01L29/2003 ,  H01L21/28264 ,  H01L29/41766 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7787 ,  H01L29/7788

    摘要： A nitride semiconductor device 2 comprises a nitride semiconductor layer 10. A gate insulating film 16 is formed on the surface of the nitride semiconductor layer 10. The gate insulating film 16 includes a portion composed of an aluminum nitride film 15 and a portion composed of an insulating material 14 that contains at least one of oxygen or silicon. A region W2 of the nitride semiconductor layer 10 facing the aluminum nitride film 15 is included in a region W1 of the nitride semiconductor layer 10 facing a gate electrode 18. The nitride semiconductor device 2 may further comprise a nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may be stacked on the surface of the nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may have a larger band gap than that of the nitride semiconductor lower layer 8 and have a heterojunction formed there between.

    摘要翻译： 氮化物半导体器件2包括氮化物半导体层10.栅极绝缘膜16形成在氮化物半导体层10的表面上。栅极绝缘膜16包括由氮化铝膜15构成的部分和由 包含氧或硅中的至少一种的绝缘材料14。 面向氮化铝膜15的氮化物半导体层10的区域W2包含在氮化物半导体层10的面向栅极电极18的区域W1中。氮化物半导体器件2还可以包括氮化物半导体下层8.氮化物半导体层 半导体层10可以堆叠在氮化物半导体下层8的表面上。氮化物半导体层10可以具有比氮化物半导体下层8更大的带隙，并且在其间形成异质结。

    OHMIC ELECTRODE AND METHOD OF FORMING THE SAME
    58.
    发明申请
    OHMIC ELECTRODE AND METHOD OF FORMING THE SAME 有权
    OHMIC电极及其形成方法

    公开(公告)号：US20120132927A1

    公开(公告)日：2012-05-31

    申请号：US13384850

    申请日：2010-08-04

    申请人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

    发明人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

    IPC分类号： H01L29/161 ,  H01L21/28

    CPC分类号： H01L29/7802 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/78

    摘要： An ohmic electrode for a p-type SiC semiconductor, and a method of forming the ohmic electrode. The ohmic electrode has an ohmic electrode layer, which has an amorphous structure and which is made of a Ti(1−x−y)Si(s)C(y) ternary film of which a composition ratio is within a composition range that is surrounded by two lines and two curves expressed by an expression x=0 (0.35≦y≦0.5), an expression y=−1.120x+0.5200 (0.1667≦x≦0.375), an expression y=1.778(x−0.375)2+0.1 (0≦x≦0.375) and an expression y=−2.504x2−0.5828x+0.5 (0≦x≦0.1667) and that excludes the line expressed by the expression x=0. The ohmic layer is directly laminated on a surface of a p-type SiC semiconductor.

    摘要翻译： 用于p型SiC半导体的欧姆电极，以及形成欧姆电极的方法。 欧姆电极具有欧姆电极层，其具有非晶结构，其由组成比在组成范围内的Ti（1-x-y）Si（s）C（y）三元膜制成 由表达式x = 0（0.35＆nlE; y＆nlE; 0.5）表示的两条线和两条曲线包围，表达式y = -1.120x + 0.5200（0.1667＆nlE; x＆amp; nlE; 0.375），表达式y = 1.778（x-0.375 ）2 + 0.1（0＆nlE; x＆nlE; 0.375），并且表达式y = -2.504x2-0.5828x + 0.5（0＆nlE; x＆nlE; 0.1667），并且排除由表达式x = 0表示的行。 欧姆层直接层压在p型SiC半导体的表面上。

    Semiconductor device
    59.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08110870B2

    公开(公告)日：2012-02-07

    申请号：US12502251

    申请日：2009-07-14

    申请人： Masahiro Sugimoto ,  Tsutomu Uesugi ,  Masakazu Kanechika ,  Tetsu Kachi

    发明人： Masahiro Sugimoto ,  Tsutomu Uesugi ,  Masakazu Kanechika ,  Tetsu Kachi

    IPC分类号： H01L29/66

    CPC分类号： H01L29/8122 ,  H01L29/0623 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/1037 ,  H01L29/1075 ,  H01L29/1079 ,  H01L29/42316 ,  H01L29/7828 ,  H01L29/7832 ,  H01L29/7838 ,  H01L29/812

    摘要： A semiconductor device has a semiconductor substrate having a surface layer and a p-type semiconductor region, wherein the surface layer includes a contact region, a channel region and a drift region, the channel region is adjacent to and in contact with the contact region, the drift region is adjacent to and in contact with the channel region and includes n-type impurities at least in part, and the p-type semiconductor region is in contact with the drift region and at least a portion of a rear surface of the channel region, a main electrode disposed on the surface layer and electrically connected to the contact region, a gate electrode disposed on the surface layer and extending from above a portion of the contact region to above at least a portion of the drift region via above the channel region, and an insulating layer covering at least the portion of the contact region and not covering at least the portion of the drift region. The gate electrode and the contact region are insulated by the insulating layer, and the gate electrode and the drift region are in direct contact to form a Schottky junction.

    摘要翻译： 半导体器件具有具有表面层和p型半导体区域的半导体衬底，其中表面层包括接触区域，沟道区域和漂移区域，沟道区域与接触区域相邻并与其接触， 漂移区域与沟道区域相邻并且与沟道区域接触并且至少部分地包括n型杂质，并且p型半导体区域与漂移区域和沟道的后表面的至少一部分接触 区域，设置在所述表面层上并电连接到所述接触区域的主电极，设置在所述表面层上并且从所述接触区域的一部分的上方延伸到所述漂移区域的至少一部分之上的栅电极， 以及至少覆盖所述接触区域的部分并且至少覆盖所述漂移区域的部分的绝缘层。 栅极电极和接触区域被绝缘层绝缘，栅电极和漂移区域直接接触形成肖特基结。

    OHMIC ELECTRODE AND METHOD OF FORMING THE SAME
    60.
    发明申请
    OHMIC ELECTRODE AND METHOD OF FORMING THE SAME 审中-公开
    OHMIC电极及其形成方法

    公开(公告)号：US20110287626A1

    公开(公告)日：2011-11-24

    申请号：US13146208

    申请日：2010-01-29

    申请人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

    发明人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

    IPC分类号： H01L21/283

    CPC分类号： H01L29/45 ,  H01L21/0485 ,  H01L29/1608

    摘要： The invention provides an ohmic electrode of a p-type SiC semiconductor element, which includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The invention also provides a method of forming an ohmic electrode of a p-type SiC semiconductor element. The ohmic electrode includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The method includes forming a ternary mixed film that includes Ti, Si, and C in a manner such that an atomic composition ratio, Ti:Si:C is 3:1:2, on a surface of a p-type SiC semiconductor to produce a laminated film; and annealing the produced laminated film under vacuum or under an inert gas atmosphere.

    摘要翻译： 本发明提供了一种p型SiC半导体元件的欧姆电极，其包括由Ti 3 SiC 2制成的欧姆电极层，其直接形成在p型SiC半导体的表面上。 本发明还提供了形成p型SiC半导体元件的欧姆电极的方法。 欧姆电极包括由Ti 3 SiC 2制成并且直接形成在p型SiC半导体的表面上的欧姆电极层。 该方法包括以使得在p型SiC半导体的表面上的原子组成比Ti:Si:C为3:1:2的方式形成包括Ti，Si和C的三元混合膜，以产生 层压膜; 并在真空或惰性气体气氛下退火生产的层压膜。