公开(公告)号：US06869301B2

公开(公告)日：2005-03-22

申请号：US10805258

申请日：2004-03-22

申请人： Shinji Shimizu ,  Masahiro Tanaka

发明人： Shinji Shimizu ,  Masahiro Tanaka

IPC分类号： H01R13/639 ,  H01R13/627 ,  H01R13/64 ,  H01R13/62

CPC分类号： H01R13/6276

摘要： An electrical connector (11) comprises an insulating housing (13), a plurality of contact elements (10) provided in a widthwise direction of the insulating housing, at least one guide portion 917) provided at a position where no contact element is present and guiding the connector to a position for plugging with a mating electrical connector (12), and a lock portion (18) provided at a top of the guide portion. The lock portion has a shape of a substantially sphere or a shape of a polyhedron having a top view of a substantially circle and locks a plugging condition between the electrical connectors.

摘要翻译： 电连接器（11）包括绝缘壳体（13），在绝缘壳体的宽度方向上设置的多个接触元件（10），设置在不存在接触元件的位置处的至少一个引导部分917） 将连接器引导到用于与配对电连接器（12）堵塞的位置，以及设置在引导部分顶部的锁定部分（18）。 锁定部分具有基本为球形或多面体形状的形状，其具有大致圆形的顶视图并锁定电连接器之间的堵塞状态。

公开(公告)号：US06352762B1

公开(公告)日：2002-03-05

申请号：US09242828

申请日：1999-02-24

申请人： Shinji Shimizu ,  Masahiro Yanagida ,  Makio Tominaga ,  Makoto Ichiki

发明人： Shinji Shimizu ,  Masahiro Yanagida ,  Makio Tominaga ,  Makoto Ichiki

IPC分类号： B32B2734

CPC分类号： C08J7/047 ,  C08J2377/00 ,  C08J2463/00 ,  C08J2475/00 ,  C09D175/04 ,  Y10T428/25 ,  Y10T428/259 ,  Y10T428/27 ,  Y10T428/2896 ,  Y10T428/31562 ,  Y10T428/31573 ,  C08L63/00

摘要： An easily adhesive polyamide film has been created from unstretched or uniaxially stretched non-heated polyamide film coated with a water-base coating mixture, whose main constituents are (A) water polyurethane resin containing acetylene glycol in which each carbon atom immediately adjacent to the triple-bonded carbon atom is replaced with a hydroxyl group and a methyl group, and/or an ethylene oxide addition product of the acetylene glycol; (B) a water-soluble polyepoxy compound; and (C) particles with an average diameter between 0.001 and 1.0 &mgr;m, of which the solid-content weight ratio is 98-30/2-70/0.1-10, the coating amount after stretching is between 0.005 and 0.030 g/m2, and the film is stretched in at least one direction and then heated. This newly invented film possesses good blocking resistance and excellent adhesiveness with print ink, laminate, and other coating mixtures, and is especially suitable for boiling sterilization, retort sterilization, and packaging of liquids.

摘要翻译： 已经由涂覆有水性涂料混合物的未拉伸或单轴拉伸的未加热的聚酰胺薄膜产生了易粘合的聚酰胺薄膜，其主要成分是（A）含有乙炔二醇的水性聚氨酯树脂，其中紧邻三元组的每个碳原子 连接的碳原子被羟基和甲基取代，和/或乙炔二醇的环氧乙烷加成产物; （B）水溶性聚环氧化合物; 和（C）平均直径为0.001〜1.0μm的颗粒，其固含量重量比为98-30 / 2-70 / 0.1-10，拉伸后的涂布量为0.005〜0.030g / m 2， 并且将膜在至少一个方向上拉伸，然后加热。 这种新发明的薄膜具有良好的抗粘连性和与印刷油墨，层压板和其它涂料混合物的优异粘合性，特别适用于沸腾灭菌，蒸煮灭菌和液体包装。

公开(公告)号：US6007376A

公开(公告)日：1999-12-28

申请号：US60995

申请日：1998-04-16

申请人： Shinji Shimizu

发明人： Shinji Shimizu

IPC分类号： H01R43/02 ,  H05K3/34 ,  H01R13/73

CPC分类号： H01R43/0256 ,  H01R12/707 ,  H05K3/3447 ,  H05K2201/10189 ,  H05K2201/10598 ,  H05K2201/1084 ,  Y10T29/49144

摘要： A circuit board electrical connector for a circuit board having an attachment opening, which comprises a housing; an attachment leg having a metallic surface and projecting downwardly from the housing into the attachment opening; and a solder retention area in the attachment leg so that solder flows into an upper portion of the attaching opening.

摘要翻译： 一种用于具有附接开口的电路板的电路板电连接器，其包括壳体; 附接腿具有金属表面并从壳体向下突出到附接开口中; 以及附着腿中的焊料保持区域，使得焊料流入安装开口的上部。

公开(公告)号：US5870492A

公开(公告)日：1999-02-09

申请号：US894147

申请日：1992-06-04

申请人： Shinji Shimizu ,  Masao Kumagishi

发明人： Shinji Shimizu ,  Masao Kumagishi

IPC分类号： G06K9/03 ,  G06K9/22 ,  G09G1/06

CPC分类号： G06K9/033 ,  G06K9/00402

摘要： An inscribed character is recognized with a device including a memory for storing signals representing the shapes of plural inscribed characters, a sensor for the shapes of inscribed characters, a comparator for the stored signals and signals from the sensor, and a display. The comparator compares a signal representing the sensed shape of the inscribed character and the stored signals representing the shapes of plural characters likely to be inscribed to derive signals representing plural selected candidate characters similar in shape to the inscribed character. In response to the signals representing plural selected candidate characters similar in shape to the inscribed character the plural candidate characters are displayed on a first region of the display abutting a second region where there is a representation of the inscribed character. One of the displayed plural candidate characters that is the intended character for the inscribed character is selected by an operator pressing a stylus against the intended character. A signal indicative of which of the displayed candidate character is the selected character is derived and causes the selected character to replace the inscribed character.

摘要翻译： 使用包括用于存储表示多个内切字符的形状的信号的存储器，用于形成内切字符的形状的传感器，用于存储的信号的比较器和来自传感器的信号的显示器来识别刻录字符。 比较器比较表示所识别的内切字符的形状的信号和表示可能内切的多个字符的形状的所存储的信号，以导出表示形状类似于刻录字符的多个选定候选字符的信号。 响应于表示与内切字符相似形状的多个所选候选字符的信号，在显示器的第一区域上显示多个候选字符，该第一区域邻接具有内接字符的表示的第二区域。 通过操作者按照针对目标字符的触控笔来选择作为内切字符的预期字符的所显示的多个候选字符中的一个。 导出指示所显示的候选人物中的哪一个是所选择的角色的信号，并且使所选择的角色替换所述内接角色。

公开(公告)号：US5835135A

公开(公告)日：1998-11-10

申请号：US610233

申请日：1996-03-04

申请人： Kenji Hamaguri ,  Shinji Shimizu

发明人： Kenji Hamaguri ,  Shinji Shimizu

IPC分类号： H01J9/42 ,  H04N17/04 ,  H01J9/44

CPC分类号： H01J9/42 ,  H04N17/04

摘要： A measuring device for measuring a glow center of a display device is provided with: an image pickup device which includes a sensing surface defined by a plurality of photoelectric conversion elements arranged in a two-dimensional manner at a specified pitch and picks up a light image to produce image data; an optical system which transmits a light image displayed on a display device to the sensing surface of the image pickup device; an optical system controller which controls the optical system to transmit the light image to the sensing surface in such a manner that the maximum spatial frequency of the light image at the sensing surface of the image pickup device is smaller than the reciprocal of the pitch of the photoelectric conversion element arrangement; and a calculator which calculates a glow center of the light image on the display device based on image data produced by the image pickup device.

摘要翻译： 用于测量显示装置的发光中心的测量装置设置有：图像拾取装置，其包括由以规定间距以二维方式布置的多个光电转换元件限定的感测表面，并拾取光图像 产生图像数据; 光学系统，其将显示在显示装置上的光图像传送到图像拾取装置的感测表面; 光学系统控制器，其控制光学系统将光图像传输到感测表面，使得图像拾取装置的感测表面处的光图像的最大空间频率小于图像拾取装置的感测表面的倒数 光电转换元件布置; 以及计算器，其基于由图像拾取装置产生的图像数据来计算显示装置上的光图像的发光中心。

公开(公告)号：US5153685A

公开(公告)日：1992-10-06

申请号：US246514

申请日：1988-09-19

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/105 ,  H01L27/108

CPC分类号： H01L27/105 ,  H01L27/10808

摘要： A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. In a fifth aspect, the capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure. In sixth and seventh aspects, wiring is provided. In the sixth aspect, an aluminum wiring layer and a protective (and/or barrier) layer are formed by sputtering in the same vacuum sputtering chamber without breaking the vacuum between forming the layers; in the seventh aspect, a refractory metal, or a refractory metal silicide QSI.sub.x, where Q is a refractory metal and 0

摘要翻译： 公开了一种具有开关MISFET的半导体集成电路器件和形成在诸如DRAM的半导体衬底之上的电容器元件。 在本发明的第一方面中，电容器元件连接的开关MISFET的半导体区域的杂质浓度小于外围电路的MISFET的半导体区域的杂质浓度。 在第二方面，Y选择信号线与电容器元件的下电极层重叠。 在第三方面中，通过用于沟道阻挡区域的杂质的扩散，形成至少在电容器元件连接的开关MISFET的半导体区域下方的势垒层。 在第四方面中，电容器元件的电介质膜与其上的电容器电极层共同扩展。 在第五方面中，电容器电介质膜是其上具有氧化硅层的氮化硅膜，通过在高压下氧化氮化硅的表面层而形成氧化硅层。 在第六和第七方面中，提供了布线。 在第六方面中，在相同的真空溅射室中通过溅射形成铝布线层和保护（和/或阻挡层），而不破坏形成层之间的真空; 在第七方面中，将含有添加元素（例如Cu）的铝配线用作难熔金属或难熔金属硅化物QSIx（其中Q为难熔金属且0

公开(公告)号：US5025301A

公开(公告)日：1991-06-18

申请号：US343879

申请日：1989-04-25

申请人： Shinji Shimizu

发明人： Shinji Shimizu

IPC分类号： H01L27/10 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11

CPC分类号： H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L27/105 ,  Y10S257/90

摘要： A semiconductor integrated circuit device having first and second field-effect transistors, wherein the gate electrode of the first field-effect transistor is defined by a first-level conductor layer, while a wiring which is connected to the source or drain region of the first field-effect transistor is defined by a second-level conductor layer, and the gate electrode of the second field-effect transistor is defined by a combination of the first- and second-level conductor layers which are stacked one upon the other. Further, the respective gate electrodes of the first and second field-effect transistors are formed through respective gate insulator films which are formed on the principal surface of a semiconductor substrate in the same manufacturing step. By virtue of the above-described means, it is possible to reduce the area required for connection between the source or drain region of the first field-effect transistor and the wiring and to thereby increase the scale of integration of the device. In addition, it is possible to lower the resistance of the gate electrode of the second field-effect transistor and to thereby increase the operating speed of the device. Since the first and second field-effect transistors can be formed on a semiconductor substrate having no damage generated thereto, it is possible to increase the dielectric strength of the gate insulator film and to thereby improve the electrical reliability of the device.

公开(公告)号：US4926222A

公开(公告)日：1990-05-15

申请号：US545767

申请日：1983-10-26

申请人： Yasunobu Kosa ,  Shinji Shimizu

发明人： Yasunobu Kosa ,  Shinji Shimizu

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/28211 ,  H01L21/28273 ,  H01L29/511 ,  H01L29/7886

摘要： A semiconductor memory device and a method of manufacturing the device wherein a field insulation is formed in a surface of a semiconductor body except for the source, drain and channel regions, a first floating gate is self-aligned to the channel region, a second gate insulated from the first floating gate covers the first floating gate and the first insulator having a width substantially same as the length of the channel region between the source and the drain regions.

公开(公告)号：US4651406A

公开(公告)日：1987-03-24

申请号：US873056

申请日：1986-06-04

申请人： Shinji Shimizu ,  Kazuhiro Komori ,  Yasunobu Kosa ,  June Sugiura

发明人： Shinji Shimizu ,  Kazuhiro Komori ,  Yasunobu Kosa ,  June Sugiura

IPC分类号： H01L21/28 ,  H01L21/32 ,  H01L21/82 ,  H01L21/8247 ,  H01L27/105 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L21/425

CPC分类号： H01L27/11526 ,  H01L21/28273 ,  H01L21/32 ,  H01L21/82 ,  H01L27/105 ,  H01L27/11546 ,  H01L29/42364

摘要： A semiconductor integrated circuit device and a method of manufacturing the same, wherein an MIS type memory transistor of a two-layered gate electrode structure is formed on the surface of a semiconductor substrate, and an MIS type transistor for a low voltage having a comparatively thin gate oxide film and an MIS type transistor for a high voltage having a comparatively thick gate oxide film are formed around the memory transistor.

摘要翻译： 一种半导体集成电路器件及其制造方法，其中在半导体衬底的表面上形成有两层栅电极结构的MIS型存储晶体管，以及具有相对较薄的低电压的MIS型晶体管 在存储晶体管的周围形成栅氧化膜和具有较厚栅极氧化膜的高压用MIS型晶体管。

公开(公告)号：US3999208A

公开(公告)日：1976-12-21

申请号：US595437

申请日：1975-07-14

申请人： Shinji Shimizu

发明人： Shinji Shimizu

IPC分类号： G11C19/28 ,  H01L29/10 ,  H01L29/78

CPC分类号： G11C19/282 ,  H01L29/1062

摘要： A charge transfer semiconductor device includes charge transfer passages which are formed in the interior of a semiconductor substrate and between adjacent gate electrodes, so that when a control voltage is applied to the gate electrode, charges to be transferred are moved principally through the charge transfer passage, whereby the charges are prevented from being trapped between the gate electrodes.

摘要翻译： 电荷转移半导体器件包括形成在半导体衬底的内部和相邻栅电极之间的电荷转移通道，使得当控制电压施加到栅电极时，要转移的电荷主要通过电荷转移通道 从而防止电荷被捕获在栅电极之间。