Device configured to avoid threshold voltage shift in a dielectric film
    51.
    发明授权
    Device configured to avoid threshold voltage shift in a dielectric film 失效
    器件被配置为避免电介质膜中的阈值电压偏移

    公开(公告)号:US06462394B1

    公开(公告)日:2002-10-08

    申请号:US09312373

    申请日:1999-05-13

    IPC分类号: H01L2900

    摘要: A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.

    摘要翻译: 提供了一种制造具有降低的阈值电压偏移的集成电路的方法。 在半导体衬底上形成非导电区域,在半导体衬底上形成有源区域。 有源区由非导电区分开。 势垒层和电介质层沉积在非导电区域上并在有源区上方。 对集成电路施加热量,导致阻挡层退火。

    Barrier layer fabrication methods
    52.
    发明授权
    Barrier layer fabrication methods 有权
    阻隔层制造方法

    公开(公告)号:US06426306B1

    公开(公告)日:2002-07-30

    申请号:US09713845

    申请日:2000-11-15

    IPC分类号: H01L2131

    摘要: A process for forming a storage capacitor for a semiconductor assembly, by forming a first storage electrode having a top surface consisting of titanium nitride; forming a barrier layer directly on the titanium nitride, the barrier layer (a material containing any one of amorphous silicon, tantalum, titanium, or strontium) being of sufficient thickness to substantially limit the oxidation of the titanium nitride when the semiconductor assembly is subjected to an oxidizing agent (either an oxidizing agent or an nitridizing agent); converting a portion of the barrier layer to a dielectric compound; depositing a storage cell dielectric directly on the dielectric compound, the storage cell dielectric being of the same chemical makeup as the dielectric compound and thereby using the dielectric compound as a nucleation surface; and forming a second capacitor electrode on the storage cell dielectric.

    摘要翻译: 一种用于形成半导体组件的存储电容器的方法,其特征在于,形成具有由氮化钛组成的顶表面的第一存储电极; 在氮化钛上直接形成阻挡层,阻挡层(含有非晶硅,钽,钛或锶中的任何一种的材料)具有足够的厚度,以在半导体组件经受时基本上限制氮化钛的氧化 氧化剂(氧化剂或氮化剂); 将阻挡层的一部分转变为电介质化合物; 将存储单元电介质直接沉积在电介质化合物上,储能单元电介质具有与电介质化合物相同的化学组成,从而使用电介质化合物作为成核面; 以及在所述存储单元电介质上形成第二电容器电极。

    Methods of forming capacitors and related integrated circuitry
    53.
    发明授权
    Methods of forming capacitors and related integrated circuitry 失效
    形成电容器和相关集成电路的方法

    公开(公告)号:US06404005B1

    公开(公告)日:2002-06-11

    申请号:US09823133

    申请日:2001-03-29

    IPC分类号: H01L21108

    摘要: Capacitor constructions and methods of forming the same are described. In one implementation, a capacitor container is formed over a substrate and includes an internal surface and an external surface. At least some of the external surface is provided to be rougher than at least some of the internal container surface. A capacitor dielectric layer and an outer capacitor plate layer are formed over at least portions of the internal and the external surfaces of the capacitor container. In another implementation, a layer comprising roughened polysilicon is formed over at least some of the external container surface but not over any of the internal container surface. In a preferred aspect, the roughened external surface or roughened polysilicon comprises hemispherical grain polysilicon.

    摘要翻译: 描述了电容器结构及其形成方法。 在一个实施方案中,电容器容器形成在衬底上并且包括内表面和外表面。 至少一些外表面被提供为比内部容器表面中的至少一些更粗糙。 在电容器容器的内表面和外表面的至少一部分上形成电容器介电层和外电容器板层。 在另一个实施方案中,包含粗糙多晶硅的层形成在至少一些外部容器表面上,但不在任何内部容器表面上。 在优选的方面,粗糙化的外表面或粗糙多晶硅包括半球形晶粒多晶硅。

    Integrated circuitry and methods of forming circuitry
    54.
    发明授权
    Integrated circuitry and methods of forming circuitry 失效
    集成电路和形成电路的方法

    公开(公告)号:US06333225B1

    公开(公告)日:2001-12-25

    申请号:US09378433

    申请日:1999-08-20

    IPC分类号: H01L218242

    摘要: In one aspect, the invention includes a method of forming circuitry comprising: a) forming a capacitor electrode over one region of a substrate: b) forming a capacitor dielectric layer proximate the electrode; c) forming a conductive diffusion barrier layer, the conductive diffusion barrier layer being between the electrode and the capacitor dielectric layer; d) forming a conductive plug over another region of the substrate, the conductive plug comprising a same material as the conductive diffusion barrier layer; and e) at least a portion of the conductive plug being formed simultaneously with the conductive diffusion barrier layer. In another aspect, the invention includes an integrated circuit comprising a capacitor and a conductive plug, the conductive plug and capacitor comprising a first common and continuous layer. In yet another aspect, the invention includes a circuit construction comprising: a) a substrate having a memory array region and a peripheral region that is peripheral to the memory array region; b) a capacitor construction over the memory array region of the substrate, the capacitor construction comprising a storage node, a capacitor dielectric layer and a cell plate layer; the capacitor dielectric layer being between the storage node and the cell plate layer; and c) an electrical interconnect over the peripheral region, the interconnect being electrically connected to the cell plate layer and extending between the cell plate layer and the substrate.

    摘要翻译: 一方面,本发明包括形成电路的方法,包括:a)在衬底的一个区域上形成电容器电极:b)在电极附近形成电容器电介质层; c)形成导电扩散阻挡层,所述导电扩散阻挡层位于所述电极和所述电容器介电层之间; d)在所述衬底的另一区域上形成导电插塞,所述导电插塞包括与所述导电扩散阻挡层相同的材料; 以及e)所述导电插塞的至少一部分与所述导电扩散阻挡层同时形成。 另一方面,本发明包括一种包括电容器和导电插头的集成电路,所述导电插头和电容器包括第一公共连续层和连续层。 在另一方面,本发明包括一种电路结构,包括:a)具有存储器阵列区域和外围区域的衬底,所述外围区域是存储器阵列区域的周边; b)在衬底的存储器阵列区域上的电容器结构,所述电容器结构包括存储节点,电容器介电层和电池板层; 所述电容器介电层位于所述存储节点和所述单元板层之间; 以及c)在所述外围区域上的电互连,所述互连电连接到所述单元板层并且在所述单元板层和所述衬底之间延伸。

    Apparatus for forming a high dielectric film
    55.
    发明授权
    Apparatus for forming a high dielectric film 失效
    用于形成高介电膜的装置

    公开(公告)号:US06325017B1

    公开(公告)日:2001-12-04

    申请号:US09382507

    申请日:1999-08-25

    IPC分类号: C23C1600

    摘要: An apparatus for forming a high dielectric oxide film includes a controllable atomic oxygen source and a vaporized precursor source. A deposition chamber for receiving the atomic oxygen from the atomic oxygen source and vaporized precursor from the vaporized precursor source is used for deposition of the high dielectric oxide film on a surface of a structure located therein. The apparatus further includes a detection mechanism for detecting a characteristic of the deposition of the high dielectric oxide film on the surface of the structure. The controllable atomic oxygen source is controlled as a function of the detected characteristic.

    摘要翻译: 用于形成高电介质氧化物膜的装置包括可控的原子氧源和蒸发的前体源。 用于从原子氧源接收原子氧并从蒸发的前体源蒸发的前体的沉积室用于在位于其中的结构的表面上沉积高电介质氧化物膜。 该装置还包括用于检测在该结构的表面上沉积高介电氧化物膜的特性的检测机构。 可控原子氧源作为检测特性的函数进行控制。

    Method for efficient manufacturing of integrated circuits
    56.
    发明授权
    Method for efficient manufacturing of integrated circuits 失效
    集成电路高效制造方法

    公开(公告)号:US06298470B1

    公开(公告)日:2001-10-02

    申请号:US09292215

    申请日:1999-04-15

    IPC分类号: G06F1750

    CPC分类号: G03F7/70625 H01L22/20

    摘要: This invention pertains to a method for the systematic development of integrated chip technology. The method may include obtaining empirical data of parameters for an existing integrated circuit manufacturing process and extrapolating the known data to a new technology to assess potential yields of the new technology from the known process. Further, process variables of the new process may be adjusted based upon the empirical data in order to optimize the yields of the new technology. A logic based computing system such as a fuzzy logic or neural-network system may be utilized. The computing system may also be utilized to improve the yields of an existing manufacturing process by adjust process variables within downstream process tools based upon data collected in upstream process for a particular semiconductor substrate or lot.

    摘要翻译: 本发明涉及集成芯片技术的系统开发的方法。 该方法可以包括获得用于现有集成电路制造过程的参数的经验数据,并将已知数据外插到新技术,以从已知过程评估新技术的潜在产量。 此外,可以基于经验数据来调整新过程的过程变量,以便优化新技术的收益率。 可以使用诸如模糊逻辑或神经网络系统的基于逻辑的计算系统。 还可以使用计算系统来通过基于在特定半导体衬底或批次的上游工艺中收集的数据来调整下游工艺工具内的工艺变量来提高现有制造工艺的产量。

    Semiconductor circuit components and capacitors
    57.
    发明授权
    Semiconductor circuit components and capacitors 有权
    半导体电路元件和电容器

    公开(公告)号:US06282080B1

    公开(公告)日:2001-08-28

    申请号:US09229518

    申请日:1999-01-13

    IPC分类号: H01G406

    摘要: The invention pertains to semiconductor circuit components and capacitors. In another aspect, the invention includes a capacitor including: a) a first capacitor plate; b) a first tantalum-comprising layer over the first capacitor plate; c) a second tantalum-comprising layer over the first tantalum-comprising layer, the second tantalum-comprising layer having nitrogen; and d) a second capacitor plate over the second tantalum-comprising layer. In another aspect, the invention includes a component having: a) a first tantalum-comprising layer; and b) a second tantalum-comprising layer over the first tantalum-comprising layer, the second tantalum-comprising layer having nitrogen.

    摘要翻译: 本发明涉及半导体电路部件和电容器。 在另一方面,本发明包括一种电容器,包括:a)第一电容器板; b)在第一电容器板上的第一钽包层; c)在所述第一含钽层上的第二含钽层,所述第二含钽层具有氮; 以及d)在所述第二含钽层上的第二电容器板。 在另一方面,本发明包括具有以下成分的组分:a)第一含钽层; 以及b)在所述第一含钽层上的第二含钽层,所述第二含钽层具有氮。

    Apparatus for forming materials
    58.
    发明授权
    Apparatus for forming materials 有权
    用于形成材料的设备

    公开(公告)号:US06281511B1

    公开(公告)日:2001-08-28

    申请号:US09642399

    申请日:2000-08-18

    IPC分类号: A61N800

    摘要: A semiconductor fabrication apparatus and methods for processing materials on a semiconductor wafer are disclosed. The fabrication apparatus is a processing chamber comprising: an ultraviolet radiation source and an infrared radiation source, the radiation sources symmetrically arranged such that radiation is substantially uniform throughout the chamber and the radiation sources being capable of being used as a film deposition radiation source or a film annealing radiation source or both; an ultraviolet radiation sensor and an infrared radiation sensor to provide a feedback loop to the ultraviolet radiation source and to the infrared radiation source, respectively, so that a desired level of ultraviolet radiation and infrared radiation is maintained inside the chamber. An exemplary method to utilize the semiconductor fabrication apparatus comprises processing a material on a semiconductor assembly during semiconductor fabrication, by the steps of: precleaning a semiconductor assembly in ultraviolet radiation, the step of precleaning performed prior to the step of forming; forming a film in ultraviolet radiation and infared radiation; annealing the film ultraviolet light radiation and infrared radiation; wherein the ultraviolet radiation and the infrared radiation are supplied by independently operable ultraviolet and infrared radiation sources within the same processing chamber.

    摘要翻译: 公开了一种用于在半导体晶片上处理材料的半导体制造装置和方法。 该制造装置是一种处理室,包括:紫外线辐射源和红外线辐射源,辐射源对称地布置成使得辐射在整个腔室中基本均匀,并且辐射源能够用作成膜辐射源或 膜退火辐射源或两者; 紫外线辐射传感器和红外辐射传感器,以分别向紫外线辐射源和红外线辐射源提供反馈回路,使得在腔室内保持期望的紫外线辐射和红外辐射水平。 利用半导体制造装置的示例性方法包括:在半导体制造期间,通过以下步骤处理半导体组件上的材料:在紫外线辐射下预清洗半导体组件,在成形步骤之前执行预清洗步骤; 在紫外线辐射和辐射下形成膜; 退火膜紫外光辐射和红外辐射; 其中紫外线辐射和红外辐射由相同处理室内的独立可操作的紫外线和红外线辐射源提供。

    Using implants to lower anneal temperatures
    59.
    发明授权
    Using implants to lower anneal temperatures 有权
    使用植入物降低退火温度

    公开(公告)号:US06262485B1

    公开(公告)日:2001-07-17

    申请号:US09258465

    申请日:1999-02-26

    IPC分类号: H01L2348

    CPC分类号: H01L21/28518

    摘要: A method for lowering the anneal temperature required to form a multi-component material, such as refractory metal silicide. A shallow layer of titanium is implanted in the bottom of the contact area after the contact area is defined. Titanium is then deposited over the contact area and annealed, forming titanium silicide. A second embodiment comprises depositing titanium over a defined contact area. Silicon is then implanted in the deposited titanium layer and annealed, forming titanium silicide. A third embodiment comprises combining the methods of the first and second embodiments. In further embodiment, nitrogen, cobalt, cesium, hydrogen, fluorine, and deuterium are also implanted at selected times.

    摘要翻译: 降低形成诸如难熔金属硅化物的多组分材料所需的退火温度的方法。 在定义接触区域之后,在接触区域的底部注入浅层的钛。 然后将钛沉积在接触区域上并退火,形成硅化钛。 第二实施例包括在限定的接触区域上沉积钛。 然后将硅注入沉积的钛层并退火,形成硅化钛。 第三实施例包括组合第一和第二实施例的方法。 在进一步的实施方案中,氮,钴,铯,氢,氟和氘也在选定的时间被植入。