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158 条记录 (耗时 0.045 秒)

    Semiconductor memory device and method of arranging signal and power lines thereof
    51.
    发明申请
    Semiconductor memory device and method of arranging signal and power lines thereof 有权
    半导体存储器件及其信号和电源线的布置方法

    公开(公告)号：US20050286285A1

    公开(公告)日：2005-12-29

    申请号：US11134855

    申请日：2005-05-19

    申请人： Jae-Young Lee ,  Joon-Hyuk Kwon ,  Chi-Wook Kim ,  Sung-Hoon Kim ,  Youn-Sik Park

    发明人： Jae-Young Lee ,  Joon-Hyuk Kwon ,  Chi-Wook Kim ,  Sung-Hoon Kim ,  Youn-Sik Park

    IPC分类号： G11C5/06 ,  G11C5/14 ,  G11C11/4074

    CPC分类号： G11C5/14 ,  G11C5/063 ,  G11C11/4074

    摘要： Method and apparatus for use, e.g., with Synchronous Dynamic Random Access Memory (SDRAM) circuits are disclosed. In one described embodiment, three metal layers are deposited and patterned in turn overlying a memory array portion of an SDRAM. Relatively wide power conductors are routed on a third metal layer, allowing power conductors to be reduced in size, or in some cases eliminated, on first and second metal layers. The relatively wide power conductors thus can provide a more stable power supply to the memory array, and also free some space on first and/or second metal for routing of additional and/or more widely spaced signal conductors. Other embodiments are described and claimed.

    摘要翻译： 公开了使用例如同步动态随机存取存储器（SDRAM）电路的方法和装置。 在一个所描述的实施例中，沉积三层金属层并依次叠置在SDRAM的存储器阵列部分上。 相对宽的电力导体在第三金属层上布线，允许在第一和第二金属层上的电力导体的尺寸减小或在某些情况下被消除。 因此，相对宽的电力导体可以向存储器阵列提供更稳定的电源，并且还释放第一和/或第二金属上的一些空间，用于路由额外的和/或更广泛间隔的信号导体。 描述和要求保护其他实施例。

    NTSC and PAL compatible digital encoder
    53.
    发明授权
    NTSC and PAL compatible digital encoder 失效
    NTSC和PAL兼容数字编码器

    公开(公告)号：US5301015A

    公开(公告)日：1994-04-05

    申请号：US980276

    申请日：1992-11-23

    申请人： Sung-Hoon Kim

    发明人： Sung-Hoon Kim

    IPC分类号： H04N9/45 ,  H04N9/455 ,  H04N9/64 ,  H04N9/65 ,  H04N11/14 ,  H04N11/16 ,  H04N9/66

    CPC分类号： H04N9/455 ,  H04N11/143 ,  H04N11/146 ,  H04N11/162 ,  H04N11/165 ,  H04N9/642

    摘要： A digital encoder for use in both NTSC and PAL systems includes a demultiplexer for separating a time-division color difference signal R-Y/B-Y into color difference signals R-Y and B-Y. The separated color difference signals R-Y and B-Y are converted by a sub-carrier frequency converter into a sub-carrier frequency, and a digital modulator determines levels and phases of the converted color difference signals. A burst generating circuit generates a burst signal after determining a level and phase of the burst signal, and a chroma encoder produces a chroma signal by mixing an output of the digital modulator with the burst signal.

    摘要翻译： 用于NTSC和PAL系统的数字编码器包括用于将时分色差信号R-Y / B-Y分离成色差信号R-Y和B-Y的解复用器。 分离的色差信号R-Y和B-Y由副载波频率转换器转换成副载波频率，并且数字调制器确定转换的色差信号的电平和相位。 突发发生电路在确定突发信号的电平和相位之后产生突发信号，并且色度编码器通过将数字调制器的输出与突发信号混合来产生色度信号。

    Semiconductor memory device and power line arrangement method thereof
    57.
    发明授权
    Semiconductor memory device and power line arrangement method thereof 有权
    半导体存储器件及其电源线布置方法

    公开(公告)号：US08541893B2

    公开(公告)日：2013-09-24

    申请号：US11229257

    申请日：2005-09-16

    申请人： Sung-Hoon Kim ,  Young-Chul Cho ,  Kwang-Il Park ,  Seong-Jin Jang

    发明人： Sung-Hoon Kim ,  Young-Chul Cho ,  Kwang-Il Park ,  Seong-Jin Jang

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor memory device and a power line arrangement method are disclosed. The semiconductor memory device includes a plurality of pads, each pad including an upper pad and a lower pad arranged below the upper pad, wherein pad power lines are arranged below the lower pads of the plurality of pads in a direction of crossing the pads to interconnect the pads that transmit the same level of electrical power among the plurality of pads.

    摘要翻译： 公开了半导体存储器件和电源线布置方法。 所述半导体存储器件包括多个焊盘，每个焊盘包括布置在所述上​​焊盘下方的上焊盘和下焊盘，其中焊盘电源线布置在所述多个焊盘的下焊盘的下方，该焊盘跨越所述焊盘以互连 所述焊盘在所述多个焊盘之间传输相同水平的电力。

    Nonvolatile memory device for reducing interference between word lines and operation method thereof
    58.
    发明授权
    Nonvolatile memory device for reducing interference between word lines and operation method thereof 失效
    用于减少字线之间的干扰的非易失性存储器件及其操作方法

    公开(公告)号：US08488386B2

    公开(公告)日：2013-07-16

    申请号：US13044683

    申请日：2011-03-10

    申请人： Sung-Hoon Kim ,  Jai-Hyuk Song ,  Yong-Joon Choi

    发明人： Sung-Hoon Kim ,  Jai-Hyuk Song ,  Yong-Joon Choi

    IPC分类号： G11C11/34

    CPC分类号： G11C16/3418 ,  G11C16/10 ,  G11C16/28

    摘要： Provided are a nonvolatile memory device and a method of operating the same. The nonvolatile memory device in accordance with an embodiment of the inventive concept may include a string select line; a ground select line; a dummy word line adjacent to the ground select line; a first word line adjacent to the dummy word line; and a second word line disposed between the string select line and the first word line. The nonvolatile memory device is configured to apply a voltage to the dummy word line. When programming a memory cell connected to the first word line, a first dummy word line voltage lower than a voltage applied to the second word line is applied to the dummy word line. When programming a memory cell connected to the second word line, a second dummy word line voltage between a voltage applied to the first word line and the first dummy word line voltage is applied to the dummy word line. Accordingly, when a program operation is performed, a charge loss of a memory cell connected to a word line adjacent to a dummy word line can be reduced by changing a voltage applied to the dummy word line according to a select word line.

    摘要翻译： 提供一种非易失性存储器件及其操作方法。 根据本发明构思的实施例的非易失性存储器件可以包括串选择线; 地选线; 与地面选择线相邻的虚拟字线; 与虚拟字线相邻的第一字线; 以及设置在所述串选择线和所述第一字线之间的第二字线。 非易失性存储器件被配置为向虚拟字线施加电压。 当编程连接到第一字线的存储单元时，低于施加到第二字线的电压的第一虚拟字线电压被施加到虚拟字线。 当编程连接到第二字线的存储单元时，施加到第一字线的电压和第一虚拟字线电压之间的第二虚拟字线电压被施加到伪字线。 因此，当执行编程操作时，可以通过根据选择字线改变施加到虚拟字线的电压来减少连接到与虚拟字线相邻的字线的存储单元的电荷损失。

    Semiconductor device pad having the same voltage level as that of a semiconductor substrate
    59.
    发明授权
    Semiconductor device pad having the same voltage level as that of a semiconductor substrate 有权
    半导体器件衬垫具有与半导体衬底相同的电压电平

    公开(公告)号：US08330230B2

    公开(公告)日：2012-12-11

    申请号：US11828536

    申请日：2007-07-26

    申请人： Sung-Hoon Kim ,  Joung-Yeal Kim

    发明人： Sung-Hoon Kim ,  Joung-Yeal Kim

    IPC分类号： H01L29/76 ,  H01L29/94

    CPC分类号： H01L24/05 ,  H01L2224/04042 ,  H01L2224/05 ,  H01L2224/05554 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079

    摘要： A semiconductor device pad is configured to have the same voltage level as that of a semiconductor substrate. The pad includes a semiconductor substrate having a junction area doped with a high concentration of impurity ions, a polylayer portion at least a portion of which is electrically connected to the junction area and a metal layer portion electrically connected to the polylayer portion and receiving a voltage externally applied. The metal layer is configured to transfer the received voltage to the semiconductor substrate.

    摘要翻译： 半导体器件衬底被配置为具有与半导体衬底相同的电压电平。 焊盘包括具有掺杂有高浓度杂质离子的结区域的半导体衬底，至少一部分电连接到接合区域的多层部分和与多层部分电连接并接收电压的金属层部分 外用。 金属层被配置为将接收的电压传送到半导体衬底。