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51.发明授权公开(公告)号：US09541577B2
公开(公告)日：2017-01-10
申请号：US14147868
申请日：2014-01-06
发明人： Satoshi Hasegawa , Shigeto Akahori , Shinya Maita , Hitoshi Saito , Yoko Yamaji
CPC分类号： G01R1/06777 , G01R31/2621 , G01R31/2637
摘要： Provided is a current application device capable of applying a test current of a magnitude necessary for testing of a semiconductor element without any trouble. A current application device 1 is configured to have a contacting section having a plurality of projections 21 for contacting a contact region 24 inside an active region 23 of a semiconductor element 22 and applying the test current thereto, and a pressing section 3 which presses the contacting section 2 against the semiconductor element 22 such that each projection 21 contacts the contact region 24. A plurality of the projections 21 are arranged such that an arrangement density of outside projections 21 is larger than the arrangement density of inside projections 21.
摘要翻译： 本发明提供能够无故障地施加半导体元件的测试所需要的大小的测试电流的电流施加装置。 当前的施加装置1被配置为具有接触部分，该接触部分具有多个突起21，用于接触半导体元件22的有源区23内部的接触区域24并向其施加测试电流;以及按压部分3， 部分2相对于半导体元件22，使得每个突起21接触接触区域24.多个突起21布置成使得外部突起21的布置密度大于内部突起21的布置密度。
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公开(公告)号：US09188626B2
公开(公告)日：2015-11-17
申请号：US13723474
申请日：2012-12-21
申请人： SK hynix Inc.
发明人： Chul Kim , Jong Chern Lee
CPC分类号： G01R31/2637 , G01R31/2853 , G01R31/318513 , G11C29/022 , G11C29/025 , G11C29/1201 , G11C29/48
摘要： A semiconductor apparatus includes a test voltage application unit, a first pad and a second pad. The test voltage application unit is configured to apply a test voltage to first and second TSVs in response to a test mode signal. The first pad is configured to output a first test signal outputted from the first TSV. And the second pad is configured to output a second test signal outputted from the second TSV.
摘要翻译： 半导体装置包括测试电压施加单元，第一焊盘和第二焊盘。 测试电压施加单元被配置为响应于测试模式信号将测试电压施加到第一和第二TSV。 第一焊盘被配置为输出从第一TSV输出的第一测试信号。 并且第二焊盘被配置为输出从第二TSV输出的第二测试信号。
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公开(公告)号：US20150219711A1
公开(公告)日：2015-08-06
申请号：US14611642
申请日：2015-02-02
发明人： Yoko SUMIYOSHI
IPC分类号： G01R31/26
CPC分类号： G01R31/2635 , G01R31/2637
摘要： An apparatus is provided to determine deterioration of a photocoupler. The apparatus includes a detecting unit and a determining unit. The detecting unit receives an electric pulse signal outputted from the photocoupler. The amplitude of the outputted pulse signal depends on that of an electric AC voltage applied to the photocoupler. The detecting unit detects a duty ratio of the pulse signal. The determining unit determines whether or not the duty ratio is less than a threshold given for the determination. The determining unit also determines that the photocoupler has deteriorated in performance thereof more than a usable level if it is determined that the duty ratio is less than the threshold given for the determination.
摘要翻译： 提供了一种用于确定光电耦合器的劣化的装置。 该装置包括检测单元和确定单元。 检测单元接收从光电耦合器输出的电脉冲信号。 输出的脉冲信号的幅度取决于施加到光电耦合器的交流电压的幅度。 检测单元检测脉冲信号的占空比。 确定单元确定占空比是否小于为确定给出的阈值。 如果确定占空比小于为确定给出的阈值，则确定单元还确定光耦合器的性能劣化超过可用电平。
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54.发明申请公开(公告)号：US20140193928A1
公开(公告)日：2014-07-10
申请号：US14147868
申请日：2014-01-06
发明人： Satoshi Hasegawa , Shigeto Akahori , Shinya Maita , Hitoshi Saito , Yoko Yamaji
CPC分类号： G01R1/06777 , G01R31/2621 , G01R31/2637
摘要： Provided is a current application device capable of applying a test current of a magnitude necessary for testing of a semiconductor element without any trouble. A current application device 1 is configured to have a contacting section having a plurality of projections 21 for contacting a contact region 24 inside an active region 23 of a semiconductor element 22 and applying the test current thereto, and a pressing section 3 which presses the contacting section 2 against the semiconductor element 22 such that each projection 21 contacts the contact region 24. A plurality of the projections 21 are arranged such that an arrangement density of outside projections 21 is larger than the arrangement density of inside projections 21.
摘要翻译： 本发明提供能够无故障地施加半导体元件的测试所需要的大小的测试电流的电流施加装置。 当前的施加装置1被配置为具有接触部分，该接触部分具有多个突起21，用于接触半导体元件22的有源区23内部的接触区域24并向其施加测试电流;以及按压部分3， 部分2相对于半导体元件22，使得每个突起21接触接触区域24.多个突起21布置成使得外部突起21的布置密度大于内部突起21的布置密度。
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55.发明授权公开(公告)号：US08395371B2
公开(公告)日：2013-03-12
申请号：US12242790
申请日：2008-09-30
申请人： Alok Govil
发明人： Alok Govil
CPC分类号： G01R31/2637 , G09G3/006 , G09G3/3466 , G09G2320/0693
摘要： Various methods are described to characterize interferometric modulators or similar devices. Measured voltages across interferometric modulators may be used to characterize transition voltages of the interferometric modulators. Measured currents may be analyzed by integration of measured current to provide an indication of a dynamic response of the interferometric modulator. Frequency analysis may be used to provide an indication of a hysteresis window of the interferometric modulator or mechanical properties of the interferometric modulator. Capacitance may be determined through signal correlation, and spread-spectrum analysis may be used to minimize the effect of noise or interference on measurements of various interferometric modulator parameters.
摘要翻译： 描述了各种方法来表征干涉式调制器或类似装置。 干涉式调制器的测量电压可用于表征干涉式调制器的转换电压。 可以通过积分测量的电流来分析测量的电流，以提供干涉式调制器的动态响应的指示。 可以使用频率分析来提供干涉式调制器的滞后窗口或干涉式调制器的机械特性的指示。 可以通过信号相关来确定电容，并且可以使用扩频分析来最小化噪声或干扰对各种干涉式调制器参数的测量的影响。
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公开(公告)号：US20120019263A1
公开(公告)日：2012-01-26
申请号：US12839532
申请日：2010-07-20
IPC分类号： G01R27/26
CPC分类号： G01R27/2605 , G01R31/2637
摘要： Circuitry and methods for measuring capacitive mismatch with improved precision. The capacitors under measurement are connected in series in a voltage divider, with the node common to both capacitors connected to the gate of a source follower transistor. In one disclosed embodiment of the invention, a ramped voltage is applied to the drain of the source follower transistor simultaneously with the ramped voltage applied to the voltage divider; the slope of the ramped drain voltage is at the nominal slope of the voltage at the common node of the voltage divider. In another embodiment, a second transistor in saturation has its gate coupled to the source of the source follower device, and its source connected to the drain of the source follower device in series with a constant voltage drop. The drain-to-source voltage of the source follower device is thus held constant in each embodiment, improving precision of the measurement.
摘要翻译： 用于测量电容失配的电路和方法，提高精度。 测量的电容器串联连接在分压器中，两个电容器的公共端连接到源极跟随器晶体管的栅极。 在本发明的一个公开的实施例中，斜坡电压与施加到分压器的斜坡电压同时施加到源极跟随器晶体管的漏极; 斜坡漏极电压的斜率为分压器公共节点处电压的额定斜率。 在另一个实施例中，饱和的第二晶体管的栅极耦合到源极跟随器件的源极，并且其源极与恒定的电压降串联连接到源极跟随器件的漏极。 因此，在每个实施例中，源极跟随器件的漏极 - 源极电压保持恒定，从而提高了测量的精度。
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公开(公告)号：US20110279135A1
公开(公告)日：2011-11-17
申请号：US12781441
申请日：2010-05-17
IPC分类号： G01R27/08
CPC分类号： G01R31/2637 , G11C13/0002 , G11C13/0007 , G11C13/0038 , G11C13/0064 , G11C13/0069 , G11C2013/0066
摘要： Methods and apparatus pertaining to memory resistors are provided. Electronic circuitry determines energy for changing a non-volatile resistance of a memristor from a present value to a target value. An electric charge corresponding to the energy is stored. An electric pulse is applied to the memristor using the stored charge. The newly adjusted resistance of the memristor is sensed and compared to the target value. Additional electric pulses can be applied in accordance with the comparison. Memristor adjustment by way of feedback control is thus contemplated by the present teachings.
摘要翻译： 提供了与存储电阻有关的方法和装置。 电子电路确定用于将忆阻器的非易失性电阻从当前值改变为目标值的能量。 存储对应于能量的电荷。 使用存储的电荷将电脉冲施加到忆阻器。 忆阻器的新调节电阻被感测并与目标值进行比较。 根据比较可以应用额外的电脉冲。 因此通过反馈控制进行的忆阻器调节由本教导设想。
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公开(公告)号：US20110012619A1
公开(公告)日：2011-01-20
申请号：US12502640
申请日：2009-07-14
CPC分类号： G01R31/2637 , G01R27/2688
摘要： An apparatus for measuring component performance including a feed line having an input port and an output port, a first resonator connected to the feed line, and a first Josephson junction device connected to the first resonator and to ground.
摘要翻译： 一种用于测量部件性能的装置，包括具有输入端口和输出端口的馈线，连接到馈线的第一谐振器和连接到第一谐振器并接地的第一约瑟夫逊结器件。
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公开(公告)号：US20100013505A1
公开(公告)日：2010-01-21
申请号：US12441555
申请日：2007-11-05
申请人： Kiyoshi Takekoshi
发明人： Kiyoshi Takekoshi
IPC分类号： G01R31/02
CPC分类号： G01R31/2887 , G01R1/07314 , G01R1/07357 , G01R31/2637
摘要： The present invention is provided to quickly and efficiently inspect a plurality of CCD sensors. In the present invention, a plurality of openings is formed in a circuit board of a probe card. A plurality of vertical-type probe pins is connected to a lower surface of the circuit board. A guide board is installed at the lower surface of the circuit board, and respective probe pins are inserted into respective guide holes of the guide board. The guide board is made of a transparent glass board. During an inspection, inspection light emitted from a test head passes through the openings of the circuit board and the guide board, so that it is irradiated onto the plurality of CCD sensors on the substrate. Since the plurality of probe pins can be arranged at a narrow pitch without blocking the inspection light, adjacent CCD sensors on the substrate can be inspected simultaneously.
摘要翻译： 提供本发明以快速有效地检查多个CCD传感器。 在本发明中，在探针卡的电路基板上形成有多个开口部。 多个垂直型探针连接到电路板的下表面。 引导板安装在电路板的下表面，相应的探针插入引导板的相应引导孔中。 导板由透明玻璃板制成。 在检查期间，从测试头发出的检查光通过电路板和引导板的开口，使其照射到基板上的多个CCD传感器上。 由于可以以窄的间距布置多个探针，而不会阻挡检查光，因此可以同时检查基板上的相邻的CCD传感器。
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公开(公告)号：US20090326844A1
公开(公告)日：2009-12-31
申请号：US12467740
申请日：2009-05-18
申请人： Cheng-Yung Teng , Li-Jieu Hsu
发明人： Cheng-Yung Teng , Li-Jieu Hsu
CPC分类号： G01R27/2605 , G01R31/2637 , G01R31/3167 , G01R31/31924
摘要： A circuit testing apparatus for testing capacitance of a capacitor of a device under test is provided. The circuit testing apparatus includes a measuring module, a first converting module, a processing module and a second converting module. The measuring module provides a testing signal, and determines the capacitance of the capacitor according to a signal measuring result of the testing signal. The first converting module is coupled to the measuring module for converting the testing signal to generate a testing input signal. The processing module is coupled to the first converting module and the device under test for transmitting the testing input signal to the capacitor, and amplifies an output signal generated by the capacitor to generate an amplified signal. The second converting module is coupled to the processing module and the measuring module for converting the amplified signal to generate the signal measuring result.
摘要翻译： 提供了一种用于测试被测器件电容器电容的电路测试装置。 电路测试装置包括测量模块，第一转换模块，处理模块和第二转换模块。 测量模块提供测试信号，并根据测试信号的信号测量结果确定电容器的电容。 第一转换模块耦合到测量模块，用于转换测试信号以产生测试输入信号。 处理模块耦合到第一转换模块和被测设备，用于将测试输入信号传送到电容器，并且放大由电容器产生的输出信号以产生放大信号。 第二转换模块耦合到处理模块和测量模块，用于转换放大的信号以产生信号测量结果。
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