公开(公告)号：US5970122A

公开(公告)日：1999-10-19

申请号：US686080

申请日：1996-07-24

Applicant: Thomas F. LaPorta ,  Krishan Kumar Sabnani ,  Thomas Yat Chung Woo

Inventor： Thomas F. LaPorta ,  Krishan Kumar Sabnani ,  Thomas Yat Chung Woo

IPC: H04M3/53 ,  H04M7/12 ,  H04W4/12 ,  H04W84/02 ,  H04W92/02 ,  H04M1/64 ,  H04M1/60 ,  H04M3/42 ,  H04Q7/00

CPC classification number: H04W4/12 ,  H04M3/5307 ,  H04M2203/4581 ,  H04M7/12 ,  H04W84/022 ,  H04W92/02

Abstract: A two-way wireless messaging system includes a messaging network having at least one user agent corresponding to a subscriber of a two-way wireless messaging service. The subscriber receives messages from the messaging network along a first communication channel. The user agent includes a plurality of messages stored therein wherein a predetermined message is stored in the user agent and forwarded to a desired destination in response to an originating message code that is received from a two-way messaging device of the subscriber along a second communication return channel. The originating message code can be expanded by the user agent. The messages stored by the user agent can be modified so that different messages can be forwarded to the predetermined destination. The user agent also maintains location information of the two-way messaging device of the subscriber.

Abstract translation: 双向无线消息收发系统包括具有与双向无线消息收发服务的用户对应的至少一个用户代理的消息传递网络。 订户从第一通信信道从消息传递网络接收消息。 用户代理包括存储在其中的多个消息，其中预定消息被存储在用户代理中并且响应于沿着第二通信从订户的双向消息收发设备接收到的始发消息代码被转发到期望的目的地 返回频道。 发起的消息代码可以由用户代理扩展。 可以修改由用户代理存储的消息，使得不同的消息可以转发到预定的目的地。 用户代理还维护订户的双向消息收发设备的位置信息。

公开(公告)号：US5969857A

公开(公告)日：1999-10-19

申请号：US148635

申请日：1998-09-04

Applicant: Chung-woo Byun

Inventor： Chung-woo Byun

IPC: G12B5/00 ,  G01N21/15 ,  G02B21/24 ,  G02B21/26 ,  G02B27/00 ,  G05D3/00 ,  H01L21/66

CPC classification number: G02B21/26 ,  G02B27/0006

Abstract: A microscope stage assembly prevents particles generated by the meshing of gears of the assembly from dispersing onto the hands of an operator. The assembly includes a stage, a drive system for the stage which is made up of X- and Y-axis drive pinions meshing with X- and Y-axis racks, respectively, and control knobs which are manipulated by an operator to rotate the drive pinions. In one embodiment, a particle collection tray is positioned between the gears and the control knobs to catch any particles falling from the gears before the particles reach the hands of the operator. In another embodiment, a vacuum system includes vacuum lines which open to the sides of the racks meshing with the drive pinions. Any particles produced by the meshing of the gears are removed from the area of the microscope via the vacuum lines. Thus, if the operator is taking part in a process that is sensitive to particle contamination, such as a semiconductor manufacturing process, the operator will not bring particles from the microscope with him when entering the clean room after having used the microscope to examine products being made in the clean room.

Abstract translation: 显微镜台组件防止由组件的齿轮的啮合产生的颗粒分散到操作者的手上。 组件包括一个舞台，一个舞台的驱动系统，分别由与X轴和Y轴架相啮合的X轴和Y轴驱动小齿轮组成，以及由操作者操纵以旋转驱动器的控制旋钮 小齿轮 在一个实施例中，颗粒收集托盘位于齿轮和控制旋钮之间，以在颗粒到达操作者的手之前抓住从齿轮落下的任何颗粒。 在另一个实施例中，真空系统包括通向与驱动小齿轮啮合的齿条侧面的真空线。 通过齿轮的啮合产生的任何颗粒通过真空管线从显微镜的区域去除。 因此，如果操作者参与对诸如半导体制造工艺的颗粒污染敏感的过程，则在使用显微镜检查产品之后，操作者在进入洁净室时不会将微粒从显微镜带到 在洁净室内制作。

公开(公告)号：US08535547B2

公开(公告)日：2013-09-17

申请号：US12010195

申请日：2008-01-22

Applicant: Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

Inventor： Chung-Woo Cho ,  Soon-Jin Cho ,  Byung-Bae Seo ,  Ki-Young Yoo ,  Seok-Hwan Ahn

IPC: H01B13/00

CPC classification number: H05K3/0008 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4644 ,  H05K3/4679 ,  H05K2201/0108 ,  H05K2201/09918

Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.

公开(公告)号：US07864769B1

公开(公告)日：2011-01-04

申请号：US12193508

申请日：2008-08-18

Applicant: Hsien-Chung Woo ,  Dennis C. Ferguson ,  Lawrence Hui

Inventor： Hsien-Chung Woo ,  Dennis C. Ferguson ,  Lawrence Hui

IPC: H04L12/28

CPC classification number: H04L12/1854 ,  H04L45/00

Abstract: Techniques are described to replicate multicast packets in accordance with a hierarchical data structure. For example, upon receiving a multicast packet, a packet-forwarding engine may communicate the packet to packet-forwarding engines corresponding to starting nodes of the hierarchical data structure. The packet-forwarding engines corresponding to starting nodes of the hierarchical data structure may replicate the multicast packet for local interface cards, and forward the replicated packets to the network. Furthermore, the packet-forwarding engines may replicate the packet for packet-forwarding engines corresponding to downstream nodes. In this manner, the packet replication process is distributed throughout the router decreasing the complexity of necessary replication hardware. Furthermore, the packet replication process is highly scalable resulting in a latency of one fabric hop when the number of packet-forwarding engines doubles. Also, when the hierarchical data structure has more than one starting node, the packet replication process is less susceptible to a single point failure.

Abstract translation: 描述了根据分层数据结构复制多播分组的技术。 例如，在接收到组播分组时，分组转发引擎可以将分组传送到与分层数据结构的起始节点相对应的分组转发引擎。 与分级数据结构的起始节点相对应的分组转发引擎可以复制本地接口卡的组播数据包，并将复制的分组转发到网络。 此外，分组转发引擎可以对与下游节点相对应的分组转发引擎复制分组。 以这种方式，分组复制过程分布在整个路由器中，从而降低必要复制硬件的复杂度。 此外，分组复制过程是高度可扩展的，导致当分组转发引擎的数量加倍时，一个结构跳跃的延迟。 此外，当分层数据结构具有多个起始节点时，分组复制过程对单点故障较不敏感。

公开(公告)号：US20100296347A1

公开(公告)日：2010-11-25

申请号：US12662989

申请日：2010-05-14

Applicant: Yoon-dong Park ,  Jo-won Lee ,  Chung-woo Kim ,  Eun-hong Lee ,  Sun-ae Seo ,  Woo-joo Kim ,  Hee-soon Chae ,  Soo-doo Chae ,  I-hun Song

Inventor： Yoon-dong Park ,  Jo-won Lee ,  Chung-woo Kim ,  Eun-hong Lee ,  Sun-ae Seo ,  Woo-joo Kim ,  Hee-soon Chae ,  Soo-doo Chae ,  I-hun Song

IPC: G11C16/04

CPC classification number: G11C11/5621 ,  H01L27/0688 ,  H01L27/11521 ,  H01L27/11551

Abstract: Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous.

Abstract translation: 提供了一种互补的非易失性存储器件，其操作和制造方法，逻辑器件和具有该非易失性存储器件的半导体器件及其读取电路。 互补非易失性存储器件包括顺序堆叠并具有互补关系的第一非易失性存储器和第二非易失性存储器。 第一和第二非易失性存储器被布置成使得其上表面相邻。

公开(公告)号：US07817220B2

公开(公告)日：2010-10-19

申请号：US11932324

申请日：2007-10-31

Applicant: Chung Woo Suh ,  Young Bee Chu ,  Ik Soo Lee

Inventor： Chung Woo Suh ,  Young Bee Chu ,  Ik Soo Lee

IPC: G02F1/1333

CPC classification number: G02B6/0088 ,  G02F1/133615 ,  H05K1/189 ,  H05K2201/10136

Abstract: A liquid crystal display having a receiving member, and a backlight unit wherein the receiving member includes a mold frame having a part mounting unit that has a predetermined receiving space, and a chassis fastened to the mold frame which includes a reinforcing tab in contact with and reinforcing the part mounting unit.

Abstract translation: 具有接收构件的液晶显示器和背光单元，其中所述接收构件包括具有具有预定接收空间的部件安装单元的模架，以及固定到所述模框的底架，所述底架包括与所述模框相接触的 加强部件安装单元。

公开(公告)号：US07670916B2

公开(公告)日：2010-03-02

申请号：US12417432

申请日：2009-04-02

Applicant: Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Kweon Baek ,  Sang-Moo Choi

Inventor： Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Kweon Baek ,  Sang-Moo Choi

IPC: H01L21/336 ,  H01L29/76

CPC classification number: H01L29/66833 ,  H01L21/28282 ,  H01L29/0843 ,  H01L29/167 ,  H01L29/792

Abstract: A semiconductor memory device includes a first dopant area and a second dopant area in a semiconductor substrate, the first dopant area and the second dopant area doped with one selected from the group consisting of Sb, Ga, and Bi. The semiconductor memory device includes an insulating layer disposed in contact with the first dopant area and the second dopant area, and a gate electrode layer disposed in contact with the insulating layer.

Abstract translation: 半导体存储器件包括在半导体衬底中的第一掺杂区域和第二掺杂剂区域，掺杂有Sb，Ga和Bi组成的组的第一掺杂区域和第二掺杂剂区域。 半导体存储器件包括与第一掺杂剂区域和第二掺杂剂区域接触设置的绝缘层和与绝缘层接触设置的栅极电极层。

公开(公告)号：US20090010058A1

公开(公告)日：2009-01-08

申请号：US12209735

申请日：2008-09-12

Applicant: Soo-doo CHAE ,  Moon-kyung Kim ,  Jo-won Lee ,  Chung-woo Kim

Inventor： Soo-doo CHAE ,  Moon-kyung Kim ,  Jo-won Lee ,  Chung-woo Kim

IPC: G11C16/04 ,  G11C16/06

CPC classification number: G11C16/0475 ,  H01L21/28282 ,  H01L29/66833 ,  H01L29/7923

Abstract: A multi-bit non-volatile memory device and methods of operating and fabricating the same may be provided. The memory device may include a channel region formed in a semiconductor substrate, and a source and drain that form a Schottky contact with the channel region. Also, a central gate electrode may be located on a portion of the channel region, and first and second sidewall gate electrodes may be formed on the channel region along the outer sides of the central gate electrode. First and second storage nodes may be formed between the channel region and the sidewall gate electrodes.

Abstract translation: 可以提供多位非易失性存储器件及其操作和制造方法。 存储器件可以包括形成在半导体衬底中的沟道区，以及与沟道区形成肖特基接触的源极和漏极。 此外，中心栅电极可以位于沟道区的一部分上，并且第一和第二侧壁栅极可以沿着中心栅电极的外侧形成在沟道区上。 第一和第二存储节点可以形成在沟道区和侧壁栅电极之间。

公开(公告)号：US07456468B2

公开(公告)日：2008-11-25

申请号：US11335431

申请日：2006-01-18

Applicant: Sang-Hun Jeon ,  Sung-Kyu Choi ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Ho Park ,  Jeong-Hee Han ,  Sang-Moo Choi

Inventor： Sang-Hun Jeon ,  Sung-Kyu Choi ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Ho Park ,  Jeong-Hee Han ,  Sang-Moo Choi

IPC: H01L29/792

CPC classification number: H01L21/02148 ,  H01L21/02156 ,  H01L21/02159 ,  H01L21/28282 ,  H01L21/31604 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/792

Abstract: A semiconductor memory device a first dopant area and a second dopant area, the first dopant area and the second dopant area disposed in a semiconductor substrate, an insulating layer disposed in contact with the first dopant area and the second dopant area, the insulating layer including a material selected from the group consisting of Hf, Zr, Y, and Ln, and a gate electrode layer disposed on the insulating layer.

Abstract translation: 半导体存储器件，第一掺杂剂区域和第二掺杂剂区域，设置在半导体衬底中的第一掺杂区域和第二掺杂剂区域，与第一掺杂区域和第二掺杂剂区域接触设置的绝缘层，绝缘层包括 选自Hf，Zr，Y和Ln的材料以及设置在绝缘层上的栅电极层。

公开(公告)号：US20080128757A1

公开(公告)日：2008-06-05

申请号：US11999135

申请日：2007-12-04

Applicant: Soo-Doo Chae ,  Chung-Woo Kim ,  Chan-Jin Park ,  Jeong-Hee Han ,  Byung-Gook Park ,  Il-Han Park

Inventor： Soo-Doo Chae ,  Chung-Woo Kim ,  Chan-Jin Park ,  Jeong-Hee Han ,  Byung-Gook Park ,  Il-Han Park

IPC: G11C11/407 ,  H01L29/788

CPC classification number: H01L27/115 ,  G11C16/0416 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/66825 ,  H01L29/7881

Abstract: A flash memory device can include a semiconductor pin protruding from a semiconductor substrate of a first conductive type to extend in one direction, a first doped layer and a second doped layer provided to an upper portion and a lower portion of the semiconductor pin, respectively, to be vertically spaced apart from each other, the first and second doped layers having a second conductive type, and a plurality of word lines extending over a top and a sidewall of the semiconductor pin to intersect the direction. The word lines overlap the first doped layer and the second doped layer to have vertical channels.

Abstract translation: 闪速存储器件可以包括从第一导电类型的半导体衬底突出以在一个方向上延伸的半导体引脚，分别设置到半导体引脚的上部和下部的第一掺杂层和第二掺杂层， 彼此垂直间隔开，第一和第二掺杂层具有第二导电类型，并且多个字线在半导体引脚的顶部和侧壁上延伸以与该方向相交。 字线与第一掺杂层和第二掺杂层重叠以具有垂直沟道。