公开(公告)号：US07148509B2

公开(公告)日：2006-12-12

申请号：US11002617

申请日：2004-12-03

Applicant: Chul-Ho Kim ,  Il-Gon Kim ,  Cheol-Min Kim ,  Tae-Hyeong Park

Inventor： Chul-Ho Kim ,  Il-Gon Kim ,  Cheol-Min Kim ,  Tae-Hyeong Park

IPC: H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L29/10 ,  H01L31/113

CPC classification number: G02F1/1345 ,  G02F1/136259 ,  H01L27/12

Abstract: A TFT array panel is provided, including an insulating substrate, gate lines horizontally provided on the insulating substrate, data lines isolated from the gate lines and intersecting the gate lines, a pixel electrode in a pixel region defined by intersecting the gate lines and data lines, a TFT for transmitting or intercepting an image signal transmitted through the plurality of data lines to the pixel electrode in response to a scanning signal transmitted from the plurality of gate lines, a transmission gate for distributing the image signal input from an input line to the plurality of data lines, and a repair line intersecting the input line of the transmission gate. Therefore, since the input repair line and the input line of the transmission gate are intersected, a parasitic capacitance occurring between the repair line and the input line of the transmission gate can be reduced.

Abstract translation: 提供一种TFT阵列面板，包括绝缘基板，水平设置在绝缘基板上的栅极线，与栅极线隔离并与栅极线相交的数据线，与栅极线和数据线相交的像素区域中的像素电极 ，用于响应于从多条栅极线发送的扫描信号，将通过多条数据线发送的图像信号发送或截取到像素电极的TFT，用于将从输入线输入的图像信号分配到 多个数据线，以及与传输门的输入线相交的修复线。 因此，由于输入修复线和传输门的输入线相交，所以可以减少修复线与传输门输入线之间发生的寄生电容。

公开(公告)号：US07106136B2

公开(公告)日：2006-09-12

申请号：US10894296

申请日：2004-07-19

Applicant: Kook-Chul Moon ,  Il-Gon Kim ,  Tae-Hyeong Park ,  Chul-Ho Kim ,  Cheol-Min Kim ,  Kee-Chan Park

Inventor： Kook-Chul Moon ,  Il-Gon Kim ,  Tae-Hyeong Park ,  Chul-Ho Kim ,  Cheol-Min Kim ,  Kee-Chan Park

IPC: H03F3/45

CPC classification number: G09G3/3688 ,  G09G2320/0233 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2200/516

Abstract: An amplifier includes a biasing section, first and second differential amplifying sections and an output section. The biasing section outputs first and second bias currents based on first and second power source voltages. The first differential amplifying section outputs a first amplified voltage based on the first bias current. The second differential amplifying section outputs a second amplified voltage based on the second bias current. The output section outputs the second power source voltage based on the first amplified voltage and the first power source voltage, and outputs the first power source voltage based on the second amplified voltage and the second power source voltage. Therefore, a variation of the threshold voltage is compensated to enhance display quality.

公开(公告)号：US20050258997A1

公开(公告)日：2005-11-24

申请号：US11122769

申请日：2005-05-05

Applicant: Cheol-Min Kim ,  Hyun-Jae Kim ,  Il-Gon Kim ,  Kook-Chul Moon ,  Chul-Ho Kim ,  Kee-Chan Park ,  Su-Gyeong Lee ,  Tae-Hyeong Park ,  Jin-Young Choi ,  Hyun-Sook Shim ,  Oh-Kyong Kwon

Inventor： Cheol-Min Kim ,  Hyun-Jae Kim ,  Il-Gon Kim ,  Kook-Chul Moon ,  Chul-Ho Kim ,  Kee-Chan Park ,  Su-Gyeong Lee ,  Tae-Hyeong Park ,  Jin-Young Choi ,  Hyun-Sook Shim ,  Oh-Kyong Kwon

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H03F3/00 ,  H03F3/50 ,  H03F3/70 ,  H03K5/08 ,  H03K19/00 ,  H03M1/66

CPC classification number: G09G3/3688 ,  H03F3/005 ,  H03F3/505

Abstract: An analog buffer, display device having the same and a method of drving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.

Abstract translation: 提供了一种模拟缓冲器，具有该模拟缓冲器的显示装置及其驱动方法。 模拟缓冲器将模拟电压施加到负载。 模拟缓冲器包括比较器和晶体管。 比较器被配置为将从外部设备提供的输入电压与施加到负载的模拟电压进行比较。 当模拟电压低于输入电压时，晶体管导通以对负载进行充电或导通，以在模拟电压高于输入电压时对负载进行放电，并且当模拟电压变得基本相同时，晶体管截止 作为输入电压。

公开(公告)号：US20050244990A1

公开(公告)日：2005-11-03

申请号：US11118340

申请日：2005-05-02

Applicant: Chul-Ho Kim

Inventor： Chul-Ho Kim

IPC: G02F1/1333 ,  B41J2/005 ,  H01L21/00

CPC classification number: B41J2/0057

Abstract: A method for forming a patterns includes applying ink onto an etching object layer; forming ink patterns on the etching object layer as a printing roll having convex patterns thereon rotates on the ink and removes portions of the ink which contact the convex portions of the printing roll, thereby forming ink patterns; and hardening the ink patterns.

Abstract translation: 用于形成图案的方法包括将油墨施加到蚀刻对象层上; 在作为其上具有凸形图案的印刷辊的蚀刻对象层上形成油墨图案在油墨上旋转并去除与印刷辊的凸部接触的油墨部分，从而形成油墨图案; 并硬化油墨图案。

公开(公告)号：US5935789A

公开(公告)日：1999-08-10

申请号：US903800

申请日：1997-07-31

Applicant: Sang-Ki Rhee ,  Eui-Sung Choi ,  Chul-Ho Kim ,  Jung-Hoon Sohn ,  Hyun-Ah Kang ,  Hwa-Young Kim

Inventor： Sang-Ki Rhee ,  Eui-Sung Choi ,  Chul-Ho Kim ,  Jung-Hoon Sohn ,  Hyun-Ah Kang ,  Hwa-Young Kim

IPC: C07K14/485 ,  C12N1/19 ,  C12N9/02 ,  C12N15/81 ,  C12Q1/68 ,  C12N9/72

CPC classification number: C12N9/0008 ,  C07K14/485 ,  C12N15/815

Abstract: Autonomously replicating sequences(ARS), glyceraldehyde-3-phosphate dehydrogenase(GAPDH) gene and GAPDH promoter derived from Hansenula polymorpha DL-1(ATCC 26012); a vector for H. polymorpha which contains the novel ARS and is capable of inserting tandem repeating multiple copies of a polynucleotide encoding a foreign protein to the chromosome of H. polymorpha; a process for the production of a foreign protein in H. polymorpha by employing said vector; and a method for the selection of transformed H. polymorpha having multiple copies of integrated foreign genes.

Abstract translation: 来自多形汉逊酵母DL-1（ATCC 26012）的自主复制序列（ARS），甘油醛-3-磷酸脱氢酶（GAPDH）基因和GAPDH启动子; 多形汉逊酵素的载体，其含有新型ARS并且能够将编码外源蛋白的多核苷酸的串联重复多拷贝插入多形汉逊酵母染色体; 通过使用所述载体在多形汉逊酵母中产生外源蛋白的方法; 以及用于选择具有多个拷贝的整合的外来基因的转化多形汉逊酵母的方法。

公开(公告)号：US09935108B2

公开(公告)日：2018-04-03

申请号：US15282208

申请日：2016-09-30

Applicant: Chul-Ho Kim ,  Seunghak Park ,  Sihyun Kim ,  Cheolhong Kim ,  Hunkook Lee ,  Yongju Jung

Inventor： Chul-Ho Kim ,  Seunghak Park ,  Sihyun Kim ,  Cheolhong Kim ,  Hunkook Lee ,  Yongju Jung

IPC: H01L27/1157 ,  H01L27/105 ,  H01L23/528 ,  H01L29/78 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

CPC classification number: H01L27/1052 ,  H01L23/5283 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7827

Abstract: A semiconductor memory device includes stacks on a substrate, each of the stacks including word lines stacked on the substrate and first and second string selection lines laterally spaced apart from each other, vertical pillars passing through the stacks, and first and second bit lines extending longitudinally in a first direction and alternatingly arranged in a second direction crossing the first direction. In a plan view, at least two adjacent ones of the first bit lines in the second direction and at least one of the second bit lines overlap each vertical pillar. A distance between a center of the vertical pillar and one of the first bit lines is different from that between the center of the vertical pillar and another of the first bit lines.

公开(公告)号：US09126356B2

公开(公告)日：2015-09-08

申请号：US13204265

申请日：2011-08-05

Applicant: Nam-Seok Lee ,  Chul-Ho Kim ,  Shin-Bok Lee

Inventor： Nam-Seok Lee ,  Chul-Ho Kim ,  Shin-Bok Lee

IPC: B29C33/40 ,  B29C33/38 ,  B29C33/42 ,  B29C35/08

CPC classification number: B05D3/12 ,  B05D3/06 ,  B05D5/00 ,  B29C33/3857 ,  B29C33/40 ,  B29C33/424 ,  B29C2033/385 ,  B29C2035/0827

Abstract: Discussed are a roll mold, a method for fabricating the same and a method for fabricating a thin film pattern using the same, to prevent dimensional variation of the mold and simplify the overall process. The method for fabricating a roll mold includes providing a substrate provided with a master pattern layer, sequentially forming a mold surface layer and a solid suffer layer on the substrate provided with the master pattern layer to provide a flat panel mold, forming an adhesive resin layer on the base roller aligned on the flat panel mold, and rolling the base roller provided with the adhesive resin layer over the flat panel mold to adhere the flat panel mold to the base roller through the adhesive resin layer.

Abstract translation: 讨论的是辊模，其制造方法和使用其制造薄膜图案的方法，以防止模具的尺寸变化并简化整个工艺。 制造辊模的方法包括提供设置有母图案层的基板，在设置有母图案层的基板上依次形成模具表面层和固体耐受层，以提供平板模具，形成粘合树脂层 在平面板模具上对准的基底辊上，将设置有粘合树脂层的基底辊滚动到平板模具上，以将平板模具通过粘合树脂层粘附到基底辊上。

公开(公告)号：US09024979B2

公开(公告)日：2015-05-05

申请号：US13103348

申请日：2011-05-09

Applicant: Seung-Kyu Lee ,  Dong-Hoon Lee ,  Chul-Ho Kim ,  Jin-Woo Park

Inventor： Seung-Kyu Lee ,  Dong-Hoon Lee ,  Chul-Ho Kim ,  Jin-Woo Park

IPC: G09G5/10 ,  G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3648 ,  G09G3/3659 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0248 ,  G09G2320/0209 ,  G09G2320/0247 ,  G09G2330/023

Abstract: A liquid crystal display (LCD) panel is disclosed. The LCD panel includes a plurality of pixels arranged in rows and columns, a first sub gate-line coupled to first row-pixels that are adjacent to a lower side of the first sub gate-line, a second sub gate-line coupled to second row-pixels that are adjacent to an upper side of the second sub gate-line, a plurality of gate-lines between the first sub gate-line and the second sub gate-line, a plurality of even data-lines coupled to first column-pixels that are adjacent to the even data-lines, and a plurality of odd data-lines coupled to second column-pixels that are adjacent to the odd data-lines. Here, each gate-line of the plurality of gate lines is coupled to first row-pixels that are adjacent to a lower side of the gate-line and second row-pixels that are adjacent to an upper side of the gate-line.

Abstract translation: 公开了一种液晶显示器（LCD）面板。 LCD面板包括排列成行和列的多个像素，第一子栅极线耦合到与第一子栅极线的下侧相邻的第一行像素，第二子栅极线耦合到第二子栅极线 与第二子栅极线的上侧相邻的行像素，在第一子栅极线和第二子栅极线之间的多个栅极线，耦合到第一列的多个偶数数据线 与偶数据线相邻的像素，以及耦合到与奇数数据线相邻的第二列像素的多个奇数数据线。 这里，多条栅极线的每条栅极线耦合到与栅极线的下侧相邻的第一行像素和与栅极线的上侧相邻的第二行像素。

公开(公告)号：US09019256B2

公开(公告)日：2015-04-28

申请号：US13155779

申请日：2011-06-08

Applicant: Jin-Woo Park ,  Seung-Kyu Lee ,  Chul-Ho Kim ,  Dong-Hoon Lee ,  Chi-Woo Kim

Inventor： Jin-Woo Park ,  Seung-Kyu Lee ,  Chul-Ho Kim ,  Dong-Hoon Lee ,  Chi-Woo Kim

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G11C19/287

Abstract: A shift register including a plurality of stages, each of them including a first node, a second node, and a third node being in a high-impedance state when the first node is in a high-impedance state. The shift register includes an input circuit unit inputting a driving voltage to the first node in response to an output signal of a previous stage, a driving circuit unit generating an output signal according to a voltage of the first node, and a holding unit holding the output signal at a level of a gate-off voltage according to a voltage of the second node in an inactive period of a current stage, in which the holding unit comprises a first diode which applies a clock signal to the second node.

Abstract translation: 一种移位寄存器，包括多个级，每个级包括第一节点，第二节点和第三节点，当第一节点处于高阻抗状态时处于高阻抗状态。 移位寄存器包括输入电路单元，其响应于前一级的输出信号向第一节点输入驱动电压，驱动电路单元根据第一节点的电压产生输出信号，以及保持单元， 输出信号在当前级的无效时段期间根据第二节点的电压的栅极截止电压的电平，其中保持单元包括向第二节点施加时钟信号的第一二极管。

公开(公告)号：US08937485B2

公开(公告)日：2015-01-20

申请号：US12981006

申请日：2010-12-29

Applicant: Jung-Yun Kim ,  Chul-Ho Kim ,  Dong-Hoon Lee ,  Gyung-Soon Park ,  Seung-Kyu Lee

Inventor： Jung-Yun Kim ,  Chul-Ho Kim ,  Dong-Hoon Lee ,  Gyung-Soon Park ,  Seung-Kyu Lee

IPC: G01R31/26 ,  G09G3/36

CPC classification number: G09G3/3648 ,  G09G2300/0426

Abstract: A liquid crystal display (LCD) includes a pixel unit having pixels, each of the pixels positioned at a corresponding intersection of gate lines and data lines. A drive circuit unit is positioned at one side of the pixel unit to supply driving signals to the gate lines and the data lines. Test pads are connected to the data lines. In the LCD, each of the data lines is electrically connected between the pixel unit and the drive circuit unit via one or more lines among a first line formed in a first layer and a second line formed in a second layer, and wherein each of the data lines is connected to a different test pad from the test pad connected to adjacent data lines in each of the first and second layers.

Abstract translation: 液晶显示器（LCD）包括具有像素的像素单元，每个像素位于栅极线和数据线的对应交点处。 驱动电路单元位于像素单元的一侧以向栅极线和数据线提供驱动信号。 测试垫连接到数据线。 在LCD中，每个数据线通过形成在第一层中的第一线和形成在第二层中的第二线中的一条或多条线电连接在像素单元和驱动电路单元之间，并且其中 数据线连接到与连接到第一和第二层中的每一个中的相邻数据线的测试焊盘的不同的测试焊盘。