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    Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications
    62.
    发明授权
    Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications 有权
    用于高频信号和相关方法的可控振荡器电路

    公开(公告)号：US06760575B2

    公开(公告)日：2004-07-06

    申请号：US09973634

    申请日：2001-10-09

    Applicant: David R. Welland

    Inventor： David R. Welland

    IPC: H04B106

    CPC classification number: H03L7/099 ,  H03B21/02 ,  H03J2200/10 ,  H03L7/10

    Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. The continuously variable capacitance may be formed by using a plurality of separate capacitance circuits. The individual capacitance circuits may include two capacitors coupled to a variable resistance element. The variable resistance element may be a transistor controlled by an analog control voltage. The total capacitance of the continuously variable capacitance may be substantially linear with respect to the phase of the VCO output while the individual capacitance circuits exhibit nonlinear behavior.

    Abstract translation: 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器（VCO）的锁相环（PLL）频率合成器，其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整，以补偿电容器和电感器公差，并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整，以将输出频率聚焦以精确地匹配期望的频率输出。 可以通过使用多个单独的电容电路来形成连续可变电容。 各个电容电路可以包括耦合到可变电阻元件的两个电容器。 可变电阻元件可以是由模拟控制电压控制的晶体管。 连续可变电容的总电容可以相对于VCO输出的相位基本上是线性的，而各个电容电路表现出非线性行为。

    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with programmable current limiting
    64.
    发明授权
    Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with programmable current limiting 失效
    用于连接到具有可编程限流的DC保持电路的电话线路的数字接入配置电路和方法

    公开(公告)号：US06498825B1

    公开(公告)日：2002-12-24

    申请号：US09098489

    申请日：1998-06-16

    Applicant: Timothy J. Dupuis ,  George Tyson Tuttle ,  Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    Inventor： Timothy J. Dupuis ,  George Tyson Tuttle ,  Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    IPC: H04B1500

    CPC classification number: H04L25/06 ,  H04L7/033 ,  H04L25/0266 ,  H04M11/06 ,  H04M19/001

    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.

    Abstract translation: 可以使用数字直接访问布置（DAA）电路来终止在用户端的电话连接，其提供用于到达和来自电话线的信号的通信路径。 简要描述，DAA提供用于各种国际电话标准的DC终端的可编程装置。 本发明还可以用于在电容隔离屏障上传输和接收信号的装置。 更具体地，提供了一种DC可编程直流限流模式可用的直流保持电路。 在限流模式下，功率可能会在DAA集成电路外部的器件中耗散。 此外，大部分功率可能会在外部无源器件（如电阻）中消散。

    Separation of ring detection functions across isolation barrier for minimum power
    65.
    发明授权
    Separation of ring detection functions across isolation barrier for minimum power 失效
    将隔离屏障的环检测功能分离成最小功率

    公开(公告)号：US06456712B1

    公开(公告)日：2002-09-24

    申请号：US09034453

    申请日：1998-03-04

    Applicant: Jerrell P. Hein ,  Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    Inventor： Jerrell P. Hein ,  Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    IPC: H04M100

    CPC classification number: H04L25/06 ,  H04L7/033 ,  H04L25/0266 ,  H04M1/573 ,  H04M11/06 ,  H04M19/001 ,  H04M19/02

    Abstract: A communication system of the present invention utilizes ring detection circuitry on both sides of an isolation barrier. More particularly, the ring detection circuitry may include ring burst circuitry on the phone line side of the isolation barrier and ringer timing circuits on the powered side of the isolation barrier. The digital burst peak signal may be transmitted through the isolation barrier to the ringer timing circuits. By splitting the ring detection circuitry so that the ringer timing circuits are placed on the powered side of the isolation barriers, a significant reduction in the power usage on the phone line side of the barrier related to the ring detection function may occur. The outputs of the ringing timing circuits may be provided to circuits on either side of the isolation barrier. Thus, the ring detection function may be accomplished in a system utilizing an efficient bidirectional capacitive barrier while still minimizing power usage on the line side of the barrier.

    Abstract translation: 本发明的通信系统在隔离屏障的两侧使用振铃检测电路。 更具体地，环检测电路可以包括隔离屏障的电话线侧上的环形突发电路和隔离屏障的动力侧的振铃器定时电路。 数字脉冲串峰值信号可以通过隔离屏障传输到振铃器定时电路。 通过分离环检测电路，使得振铃定时电路被放置在隔离屏障的供电侧，可能会发生与环检测功能相关的屏障的电话线侧上的功率使用的显着减少。 振铃定时电路的输出可以被提供给隔离屏障的两侧的电路。 因此，环形检测功能可以在利用有效的双向电容性屏障的系统中实现，同时仍然最小化屏障的线路侧的功率使用。

    Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products
    66.
    发明授权
    Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products 失效
    流水线模数转换器（ADC）系统，方法和计算机程序产品

    公开(公告)号：US06169502A

    公开(公告)日：2001-01-02

    申请号：US09075506

    申请日：1998-05-08

    Applicant: Sandra Marie Johnson ,  David R. Welland

    Inventor： Sandra Marie Johnson ,  David R. Welland

    IPC: H03M110

    CPC classification number: H03M1/1057 ,  H03M1/442

    Abstract: A pipelined analog-to-digital converter (ADC) is calibrated to enable production of an n-bit digital output representing an n-2 bit binary word, where “n” is a selected large positive integer, for example without limitation on the order of ten (10). In an analog-to-digital converter (ADC) having a plurality stages, each stage includes a stage input connection, a stage output connection, and a capacitor circuit including first and second predetermined capacitors (C1 and C2) and a variable capacitance calibration capacitor (Ccal). The first and second capacitors and the variable capacitance calibration capacitor are connected to each other at a capacitor common node. An amplifier input connection is connected to a capacitor common node. A comparator input connection (CIC) is connected to a stage input connection. A track and hold circuit (THC) is coupled to an amplifier output connection, and a source follower circuit (SF) is connected to a stage output connection.

    Abstract translation: 对流水线模数转换器（ADC）进行校准，以产生表示n-2位二进制字的n位数字输出，其中“n”是选定的大正整数，例如不限于订单 十（10）。 在具有多级的模/数转换器（ADC）中，每级包括级输入连接，级输出连接和包括第一和第二预定电容器（C1和C2）和可变电容校准电容器 （Ccal）。 第一和第二电容器和可变电容校准电容器在电容器公共节点处彼此连接。 放大器输入连接连接到电容公共节点。 比较器输入连接（CIC）连接到级输入连接。 轨道和保持电路（THC）耦合到放大器输出连接，源极跟随器电路（SF）连接到级输出连接。

    Transconductance amplifiers and exponential variable gain amplifiers using the same
    68.
    发明授权
    Transconductance amplifiers and exponential variable gain amplifiers using the same 失效
    跨导放大器和使用其的指数可变增益放大器

    公开(公告)号：US5451901A

    公开(公告)日：1995-09-19

    申请号：US270126

    申请日：1994-07-01

    Applicant: David R. Welland

    Inventor： David R. Welland

    IPC: H03F3/45 ,  H03G1/00 ,  H03F3/30

    CPC classification number: H03F3/45179 ,  H03F3/45197 ,  H03G1/0029 ,  H03F2203/45072 ,  H03F2203/45082 ,  H03F2203/45112 ,  H03F2203/45188 ,  H03F2203/45401 ,  H03F2203/45466 ,  H03F2203/45471

    Abstract: Transconductance amplifiers having high speed, a wide output voltage swing, good linearity and expandability are disclosed. All active devices are n-channel MOSFET devices with the output current of the amplifiers being provided by devices with their sources tied to ground. Connection of one of the MOSFET transconductance amplifiers to a MOSFET load device and appropriate control of the MOSFET resistance devices in the transconductance amplifier and the load circuit provides a variable gain amplifier having a good estimation of an exponential response to the gain control signal, thus being suitable for use in closed loop automatic gain control circuits.

    Abstract translation: 公开了具有高速度，宽输出电压摆幅，良好线性度和可扩展性的跨导放大器。 所有有源器件都是n沟道MOSFET器件，放大器的输出电流由其源极接地的器件提供。 将MOSFET跨导放大器之一连接到MOSFET负载器件，并对跨导放大器和负载电路中的MOSFET电阻器件进行适当的控制，提供可变增益放大器，其具有对增益控制信号的指数响应的良好估计，因此 适用于闭环自动增益控制电路。

    Two phase sampling for a delta sigma modulator
    69.
    发明授权
    Two phase sampling for a delta sigma modulator 失效
    三角Σ调制器的两相采样

    公开(公告)号：US5159341A

    公开(公告)日：1992-10-27

    申请号：US667818

    申请日：1991-03-12

    Applicant: Damien McCartney ,  David R. Welland

    Inventor： Damien McCartney ,  David R. Welland

    IPC: H03M3/02

    CPC classification number: H03M3/354 ,  H03M3/43 ,  H03M3/438 ,  H03M3/47

    Abstract: A delta sigma modulator provides dual phase sampling of analog input and/or a reference voltage. This dual phase sampling may be realized using a switched capacitor circuit having dual legs with a capacitor on each such leg. The dual phase sampling of the reference voltage poses a complication that mandates the necessity of providing a compensation signal. The delta sigma modulator is provided with appropriate circuitry to provide a compensation signal that compensates for the reduced signal level due to the dual sampling. In particular, the delta sigma modulator compensates for the reduced level of the output from an integrating amplifier circuit due to the timing necessary to implement the dual sampling approach.

    Abstract translation: ΔΣ调制器提供模拟输入和/或参考电压的双相采样。 这种双相采样可以使用具有在每个这样的支路上具有电容器的双支路的开关电容器电路来实现。 参考电压的双相采样构成了需要提供补偿信号的复杂性。 ΔΣ调制器设置有适当的电路，以提供补偿信号，该补偿信号补偿由于双重采样引起的降低的信号电平。 特别地，由于执行双重采样方法所需的定时，ΔΣ调制器补偿了积分放大器电路的输出电平的降低。

    Bias generator
    70.
    发明授权
    Bias generator 失效
    偏置发电机

    公开(公告)号：US4473793A

    公开(公告)日：1984-09-25

    申请号：US247648

    申请日：1981-03-26

    Applicant: David E. Blackmer ,  David R. Welland

    Inventor： David E. Blackmer ,  David R. Welland

    IPC: H03F1/30 ,  G05F3/08

    CPC classification number: H03F1/307 ,  Y10S323/907

    Abstract: An improved bias generator provides a bias voltage output which is a function of an input current Iprog and provides a bias current to a preselected load which tracks the input signal independently of temperature. The amount the bias voltage output changes with temperature is determined by (1) V(T, Iprog), a voltage-current temperature dependent function of the base-emitter voltage drop of at least one transistor and (2) X, a scalar which is easily provided by setting the ratio of two resistors. The generator can therefore be easily constructed for particular circuit loads which include at least one semiconductive junction such that the biasing current through the load will be substantially independent of temperature.

    Abstract translation: 改进的偏置发生器提供偏置电压输出，其是输入电流Iprog的函数，并且将偏置电流提供给独立于温度跟踪输入信号的预选负载。 偏置电压输出随温度变化的量由（1）V（T，Iprog）确定，V（T，Iprog）是至少一个晶体管的基极 - 发射极电压降的电压 - 电流温度依赖函数，（2）X，标量 通过设置两个电阻的比例容易提供。 因此，发电机可以容易地构建用于特定电路负载，其包括至少一个半导体结，使得通过负载的偏置电流将基本上与温度无关。

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