公开(公告)号：US20100208368A1

公开(公告)日：2010-08-19

申请号：US12662607

申请日：2010-04-26

申请人： Huaxiang Yin ,  Hyuck Lim ,  Young-soo Park ,  Wenxu Xianyu ,  Hans S. Cho

发明人： Huaxiang Yin ,  Hyuck Lim ,  Young-soo Park ,  Wenxu Xianyu ,  Hans S. Cho

IPC分类号： G02B7/02

CPC分类号： H01L27/14627 ,  H01L27/14621 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/02327

摘要： A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion. The image sensor includes a microlens formed by a similar method and a photodiode having a cylindrical shape.

摘要翻译： 提供微透镜，包括微透镜的图像传感器，形成微透镜的方法和制造图像传感器的方法。 微透镜包括形成在基板上的具有圆柱形状的多晶硅图案和包围多晶硅图案的圆形外壳部分。 微透镜还可以包括填充壳体部分的内部的填充材料或覆盖第一壳体部分的第二壳体部分。 形成微透镜的方法包括在具有较低结构的半导体衬底上形成硅图案，在硅图案上的半导体衬底上形成覆盖膜，使硅图案和覆盖膜退火，将硅图案改变为具有 圆筒形，并且封盖膜用于圆形微透镜的外壳部分，并且通过半导体基板和外壳部分的边缘之间的开口用透镜材料填充外壳部分的内部。 图像传感器包括通过类似方法形成的微透镜和具有圆柱形状的光电二极管。

公开(公告)号：US07723168B2

公开(公告)日：2010-05-25

申请号：US11283874

申请日：2005-11-22

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

IPC分类号： H01L21/00

CPC分类号： H01L21/02675 ,  H01L21/2026 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/12 ,  H01L27/1281

摘要： A method of manufacturing a polycrystalline Si film and a method of manufacturing a stacked transistor are provided. The method of manufacturing the polycrystalline Si film includes preparing an insulating substrate on which is formed a transistor that includes a poly-Si active layer, a gate insulating layer, and a gate, sequentially formed, forming an interconnection metal line separated from the gate, forming an insulating layer that covers the transistor and the interconnection metal line, forming an amorphous silicon layer on the insulating layer; and annealing the amorphous silicon layer.

摘要翻译： 提供一种制造多晶Si膜的方法和制造堆叠晶体管的方法。 制造多晶Si膜的方法包括制备绝缘基板，其上形成有依次形成的多晶硅，具有多晶硅有源层，栅极绝缘层和栅极，形成与栅极分离的互连金属线， 形成覆盖晶体管和互连金属线的绝缘层，在绝缘层上形成非晶硅层; 并退火非晶硅层。

公开(公告)号：US20100041214A1

公开(公告)日：2010-02-18

申请号：US12461315

申请日：2009-08-07

申请人： Hans S. Cho ,  Takashi Noguchi ,  Wenxu Xianyu ,  Xiaoxin Zhang ,  Huaxiang Yin

发明人： Hans S. Cho ,  Takashi Noguchi ,  Wenxu Xianyu ,  Xiaoxin Zhang ,  Huaxiang Yin

IPC分类号： H01L21/20

CPC分类号： H01L21/02636 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/02686

摘要： A high quality single crystal substrate and a method of fabricating the same are provided. The method of fabricating a single crystal substrate includes: forming an insulator on a substrate; forming a window in the insulator, the window exposing a portion of the substrate; forming an epitaxial growth silicon or germanium seed layer on the portion of the substrate exposed through the window; depositing a silicon or germanium material layer, which are crystallization target material layers, on the epitaxial growth silicon 6r germanium seed layer and the insulator; and crystallizing the crystallization target material layer by melting and cooling the crystallization target material layer.

摘要翻译： 提供了高质量的单晶基板及其制造方法。 制造单晶衬底的方法包括：在衬底上形成绝缘体; 在所述绝缘体中形成窗口，所述窗口暴露所述基板的一部分; 在通过窗户暴露的衬底的部分上形成外延生长硅或锗种子层; 在外延生长硅6r锗种子层和绝缘体上沉积作为结晶靶材料层的硅或锗材料层; 并且通过熔化和冷却结晶化目标材料层来使结晶目标材料层结晶。

公开(公告)号：US07470579B2

公开(公告)日：2008-12-30

申请号：US11557360

申请日：2006-11-07

申请人： Hyuk Lim ,  Takashi Noguchi ,  Jong-man Kim ,  Kyung-bae Park ,  Huaxiang Yin

发明人： Hyuk Lim ,  Takashi Noguchi ,  Jong-man Kim ,  Kyung-bae Park ,  Huaxiang Yin

IPC分类号： H01L21/336

CPC分类号： H01L29/78621 ,  H01L29/66757

摘要： A thin film transistor having an offset or a lightly doped drain (LDD) structure by self alignment and a method of fabricating the same comprises a substrate, a silicon layer disposed on the substrate and including a channel region, a source region and a drain region at both sides of the channel region, and offset regions, each offset regions disposed between the channel region and one of the source and drain regions at both sides of the channel region, a gate insulating layer covering the channel region and the offset regions disposed at both sides of the channel region excluding the source and drain regions, and a gate layer formed on the channel region excluding the offset regions. The thin film transistor has the structure in which an offset or LDD is obtained without an additional mask process.

摘要翻译： 具有通过自对准的偏移或轻掺杂漏极（LDD）结构的薄膜晶体管及其制造方法包括：衬底，设置在衬底上的硅层，并且包括沟道区，源极区和漏极区 在通道区域的两侧和偏移区域，每个偏移区域设置在沟道区域和沟道区域两侧的源极和漏极区域之一之间，覆盖沟道区域的栅极绝缘层和设置在沟道区域的偏移区域 除了源极和漏极区域之外的沟道区域的两侧，以及形成在除偏移区域之外的沟道区域上的栅极层。 薄膜晶体管具有在没有附加掩模处理的情况下获得偏移或LDD的结构。

公开(公告)号：US20080272381A1

公开(公告)日：2008-11-06

申请号：US12175778

申请日：2008-07-18

申请人： Takashi NOGUCHI ,  Wenxu Xianyu ,  Huaxiang Yin

发明人： Takashi NOGUCHI ,  Wenxu Xianyu ,  Huaxiang Yin

IPC分类号： H01L51/50

CPC分类号： H01L27/1266 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/78603

摘要： Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate.

摘要翻译： 提供一种有机发光显示器，其中在塑料基板上形成包括开关晶体管和由单晶硅形成的驱动晶体管的2T-1C结构的半导体电路单元。 制造单晶硅的方法包括：在晶体生长板上生长单晶硅层至预定厚度; 在单晶硅层上沉积缓冲层; 通过例如从绝缘层的上部注入单晶硅层中的氢离子，在单晶硅层中形成预定深度的分隔层; 将衬底附接到缓冲层; 以及通过从晶体生长板加热分隔层来释放单晶硅层的分隔层，以在基板上获得预定厚度的单晶硅层。

公开(公告)号：US07416924B2

公开(公告)日：2008-08-26

申请号：US11270541

申请日：2005-11-10

申请人： Takashi Noguchi ,  Wenxu Xianyu ,  Huaxiang Yin

发明人： Takashi Noguchi ,  Wenxu Xianyu ,  Huaxiang Yin

IPC分类号： H01L21/84 ,  H01L21/00 ,  H01L51/40 ,  H01L21/46

CPC分类号： H01L27/1266 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/78603

摘要： Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate.

摘要翻译： 提供一种有机发光显示器，其中在塑料基板上形成包括开关晶体管和由单晶硅形成的驱动晶体管的2T-1C结构的半导体电路单元。 制造单晶硅的方法包括：在晶体生长板上生长单晶硅层至预定厚度; 在单晶硅层上沉积缓冲层; 通过例如从绝缘层的上部注入单晶硅层中的氢离子，在单晶硅层中形成预定深度的分隔层; 将衬底附接到缓冲层; 以及通过从晶体生长板加热分隔层来释放单晶硅层的分隔层，以在基板上获得预定厚度的单晶硅层。

公开(公告)号：US20060094212A1

公开(公告)日：2006-05-04

申请号：US11248620

申请日：2005-10-13

申请人： Takashi Noguchi ,  Wenxu Xianyu ,  Hans Cho ,  Huaxiang Yin

发明人： Takashi Noguchi ,  Wenxu Xianyu ,  Hans Cho ,  Huaxiang Yin

IPC分类号： H01L21/20

CPC分类号： H01L21/02598 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/2026 ,  H01L27/1281 ,  H01L29/66772

摘要： A thin film transistor (TFT) and a method of manufacturing the same are provided. The TFT includes a transparent substrate, an insulating layer on a region of the transparent substrate, a monocrystalline silicon layer, which includes source, drain, and channel regions, on the insulating layer and a gate insulating film and a gate electrode on the channel region of the monocrystalline silicon layer.

公开(公告)号：US08889519B2

公开(公告)日：2014-11-18

申请号：US13812499

申请日：2012-10-12

申请人： Xiaolong Ma ,  Huaxiang Yin ,  Zuozhen Fu

发明人： Xiaolong Ma ,  Huaxiang Yin ,  Zuozhen Fu

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02 ,  H01L21/265 ,  H01L29/10 ,  H01L29/165 ,  H01L21/268 ,  H01L29/51

CPC分类号： H01L29/66477 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02675 ,  H01L21/26506 ,  H01L21/268 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66575 ,  H01L29/66651 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7848

摘要： The present invention discloses a semiconductor device, comprising: a substrate, a gate stack structure on the substrate, source and drain regions in the substrate on both sides of the gate stack structure, and a channel region between the source and drain regions in the substrate, characterized in that at least one of the source and drain regions comprises a GeSn alloy. In accordance with the semiconductor device and method for manufacturing the same of the present invention, GeSn stressed source and drain regions with high concentration of Sn is formed by implanting precursors and performing a laser rapid annealing, thus the device carrier mobility of the channel region is effectively enhanced and the device drive capability is further improved.

摘要翻译： 本发明公开了一种半导体器件，包括：衬底，衬底上的栅极堆叠结构，栅极堆叠结构两侧的衬底中的源极和漏极区域以及衬底中的源极和漏极区域之间的沟道区域 其特征在于源区和漏区中的至少一个包括GeSn合金。 根据本发明的半导体器件及其制造方法，通过注入前体并进行激光快速退火形成GeSn应力的高浓度Sn的源区和漏极区，因此沟道区的器件载流子迁移率为 有效提高了设备​​驱动能力。

公开(公告)号：US08853024B2

公开(公告)日：2014-10-07

申请号：US13812498

申请日：2012-08-27

申请人： Huaxiang Yin ,  Jiang Yan ,  Dapeng Chen

发明人： Huaxiang Yin ,  Jiang Yan ,  Dapeng Chen

IPC分类号： H01L21/8238

CPC分类号： H01L27/088 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66666 ,  H01L29/7848

摘要： The present invention discloses a method for manufacturing a semiconductor device comprising the steps of: forming a plurality of source and drain regions in a substrate; forming a plurality of gate spacer structures and an interlayer dielectric layer around the gate spacer structures on the substrate, wherein the gate spacer structures enclose a plurality of first gate trenches and a plurality of second gate trenches; sequentially depositing a first gate insulating layer and a second gate insulating layer, a first blocking layer and a second work function regulating layer in the first and second gate trenches; performing selective etching to remove the second work function regulating layer from the first gate trenches to expose the first blocking layer; depositing a first work function regulating layer on the first blocking layer in the first gate trenches and on the second work function regulating layer in the second gate trenches; and depositing a resistance regulating layer on the first work function regulating layer in the first gate trenches and on the first work function regulating layer in the second gate trench.

摘要翻译： 本发明公开了一种制造半导体器件的方法，包括以下步骤：在衬底中形成多个源极和漏极区; 在所述衬底上的所述栅极隔离物结构周围形成多个栅极间隔物结构和层间电介质层，其中所述栅极间隔物结构包围多个第一栅极沟槽和多个第二栅极沟槽; 在第一和第二栅极沟槽中依次沉积第一栅极绝缘层和第二栅极绝缘层，第一阻挡层和第二功函数调节层; 执行选择性蚀刻以从第一栅极沟槽去除第二功函数调节层以暴露第一阻挡层; 在第一栅极沟槽中的第一阻挡层上和第二栅极沟槽中的第二功函数调节层上沉积第一功函数调节层; 以及在第一栅极沟槽中的第一功函数调节层和第二栅沟中的第一功函数调节层上沉积电阻调节层。

公开(公告)号：US08828881B2

公开(公告)日：2014-09-09

申请号：US13381005

申请日：2011-08-10

申请人： Lingkkuan Meng ,  Huaxiang Yin

发明人： Lingkkuan Meng ,  Huaxiang Yin

IPC分类号： H01L21/3065 ,  H01L21/3105 ,  H01L21/768 ,  H01L29/78

CPC分类号： H01L21/31055 ,  H01L21/76801 ,  H01L29/78

摘要： The invention discloses an etch-back method for planarization at the position-near-interface of an interlayer dielectric (ILD), comprising: depositing or growing a thick layer of SiO2 by the chemical vapor deposition or oxidation method on a surface of a wafer; spin-coating a layer of SOG and then performing a heat treatment to obtain a relatively uniform stack structure; perform an etch-back on the SOG using a plasma etching, and stopping when approaching the position-near-interface of SiO2; performing a plasma etch-back on the remaining SOG/SiO2 structure at the position-near-interface until achieving a desired thickness. Since a two-step etching at the position-near-interface is employed, an extremely good smooth surface of the ILD is obtained. That is, a planar and tidy surface of the ILD is obtained not only in the center region, but also even at the edge of the wafer.

摘要翻译： 本发明公开了一种用于在层间电介质（ILD）的位置 - 接近界​​面处的平坦化的回蚀刻方法，包括：通过化学气相沉积或氧化方法在晶片的表面上沉积或生长厚SiO 2层; 旋涂一层SOG，然后进行热处理以获得相对均匀的堆叠结构; 使用等离子体蚀刻对SOG进行回蚀，并且在接近SiO 2的位置 - 接近界​​面时停止; 在靠近界面的位置处对剩余的SOG / SiO 2结构进行等离子体回蚀，直到达到期望的厚度。 由于在位置 - 接近界​​面处进行两步蚀刻，因此获得了非常好的ILD平滑表面。 也就是说，ILD的平面和整洁的表面不仅在中心区域中获得，而且在晶片的边缘处获得。