公开(公告)号：US20230292551A1

公开(公告)日：2023-09-14

申请号：US18176503

申请日：2023-03-01

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Takeshi SAKAI ,  Kentaro MIURA ,  Hajime WATAKABE ,  Takaya TAMARU ,  Hiroshi TABATAKE ,  Yutaka UMEDA

IPC: H10K59/121

CPC classification number: H10K59/1213 ,  H01L27/1255

Abstract: A display device includes a light-emitting element; a first transistor and a second transistor connected in series between the light-emitting element and a driving power line; a third transistor electrically connected to a gate electrode of the first transistor; and a fourth transistor connected in parallel between a drain electrode of the first transistor and the light-emitting element, wherein a ratio of a channel width W1 to a channel length L1 of the first transistor (a W1/L1 ratio) and a ratio of a channel width W2 to a channel length L2 of the second transistor (a W2/L2 ratio) are larger than a ratio of a channel width W3 to a channel length L3 of the third transistor (a W3/L3 ratio) and a ratio of a channel width W4 to a channel length L4 of the fourth transistor (a W4/L4 ratio).

公开(公告)号：US20230074655A1

公开(公告)日：2023-03-09

申请号：US17987887

申请日：2022-11-16

Applicant: Japan Display Inc.

Inventor： Toshihide JINNAI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Ryo ONODERA ,  lsao SUZUMURA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.

公开(公告)号：US20230007861A1

公开(公告)日：2023-01-12

申请号：US17859004

申请日：2022-07-07

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI ,  Hajime WATAKABE ,  Akihiro HANADA

IPC: H01L29/786 ,  H01L27/12

Abstract: According to one embodiment, a semiconductor device includes a first transistor which includes a an oxide semiconductor layer, and a second transistor connected to first and a second gate electrodes of the first transistor, wherein the oxide semiconductor layer is provided between the first and second gate electrodes in a cross-sectional view, the oxide semiconductor layer includes a first channel formation region overlapping the second gate electrode and a second channel formation region not overlapping the second gate electrode in a plan view, and a resistance value between the second gate electrode and the second transistor is higher than a resistance value between the first gate electrode and the second transistor.

公开(公告)号：US20220231149A1

公开(公告)日：2022-07-21

申请号：US17575635

申请日：2022-01-14

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Kentaro MIURA ,  Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Takeshi SAKAI

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/40 ,  H01L21/3115

Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming an oxide semiconductor layer, forming a gate insulating layer in contact with the oxide semiconductor layer and covering the oxide semiconductor layer, and forming a gate electrode on the gate insulating layer so as to overlap the oxide semiconductor layer, and injecting boron through the gate electrode and the gate insulating layer after forming the gate electrode, wherein a boron concentration included in a region of the gate insulating layer overlapping the gate electrode is in a range of 1E+16 [atoms/cm3] or more.

公开(公告)号：US20220029026A1

公开(公告)日：2022-01-27

申请号：US17499908

申请日：2021-10-13

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Tomoyuki ITO ,  Toshihide JINNAI ,  lsao SUZUMURA ,  Akihiro HANADA ,  Ryo ONODERA

IPC: H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/66 ,  H01L21/4763 ,  H01L29/49 ,  H01L21/426 ,  H01L29/423 ,  H01L29/24 ,  H01L21/4757 ,  G02F1/1368

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US20210074736A1

公开(公告)日：2021-03-11

申请号：US16996920

申请日：2020-08-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI ,  Hajime WATAKABE ,  Ryo ONODERA

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  G02F1/1368

Abstract: The purpose of the present invention is to prevent the TFT in the semiconductor device is shorted by existence of a foreign substance. An example of the structure to solve the problem is: A semiconductor device comprising: a scan line extends in a first direction, a first signal line extends in a second direction, which crosses the first direction, a second signal line extends parallel to the first signal line, an electrode is disposed between the first signal line and the second signal line, wherein a first TFT connects with the second signal line in a vicinity of the second signal line, a second TFT connects with the electrode in a vicinity of the first signal line, the first TFT and the second TFT are formed from oxide semiconductors, the first TFT and the second TFT are connected in series.

公开(公告)号：US20200264484A1

公开(公告)日：2020-08-20

申请号：US16787054

申请日：2020-02-11

Applicant: Japan Display Inc.

Inventor： Toshihide JINNAI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Ryo ONODERA ,  lsao SUZUMURA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/786 ,  H01L27/12

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.

公开(公告)号：US20190250443A1

公开(公告)日：2019-08-15

申请号：US16395491

申请日：2019-04-26

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Hirokazu WATANABE ,  Akihiro HANADA

IPC: G02F1/1368 ,  H01L27/12 ,  H01L51/50 ,  H01L21/8234 ,  H01L29/786

Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a drain source electrode of the first TFT connects with the silicon (Si) via a first through hole, a drain source electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an ALO layer is formed on the metal films and the oxide semiconductor, the second source drain electrode and the metal films are connected via the second through hole formed in the AlO layer.

公开(公告)号：US20170207245A1

公开(公告)日：2017-07-20

申请号：US15405511

申请日：2017-01-13

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Kazufumi WATABE

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1251 ,  H01L29/42384 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78606 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H01L2029/42388

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US20250113709A1

公开(公告)日：2025-04-03

申请号：US18895446

申请日：2024-09-25

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Masahiro WATABE

IPC: H10K59/124 ,  H01L27/12 ,  H10K59/121 ,  H10K59/131

Abstract: A display device includes a light-emitting element, a first transistor, and a second transistor, the first transistor includes a first gate electrode, a first insulating film, a first oxide semiconductor layer, a second insulating film, and a first conductive layer provided on the second insulating film, and the second transistor includes the first insulating film, a second oxide semiconductor layer, a second insulating film, and a second gate electrode, wherein an etching rate of the first oxide semiconductor layer and the second semiconductor layer is less than 3 nm/min when the first oxide semiconductor layer and the second semiconductor layer are etched using an etching solution containing phosphoric acid as a main component at 40° C.