Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
    64.
    发明授权
    Estimation of memory cell read thresholds by sampling inside programming level distribution intervals 有权
    通过在编程级别分配间隔内采样来估计存储单元读取阈值

    公开(公告)号:US08482978B1

    公开(公告)日:2013-07-09

    申请号:US13170202

    申请日:2011-06-28

    CPC classification number: G11C11/5642 G11C16/26 G11C27/005 G11C2211/5634

    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing into the memory cells in the group respective storage values, which program each of the analog memory cells to a respective programming state selected from a predefined set of programming states, including at least first and second programming states, which are applied respectively to first and second subsets of the memory cells, whereby the storage values held in the memory cells in the first and second subsets are distributed in accordance with respective first and second distributions. A first median of the first distribution is estimated, and a read threshold, which differentiates between the first and second programming states, is calculated based on the estimated first median. The data is retrieved from the analog memory cells in the group by reading the storage values using the calculated read threshold.

    Abstract translation: 一种用于数据存储的方法包括:通过将各组存储单元中的每个模拟存储器单元编程为从预定义的编程状态集合中选择的相应编程状态,将组中各存储单元写入存储单元中,将数据存储在一组模拟存储单元中, 包括至少第一和第二编程状态,其分别应用于存储器单元的第一和第二子集,由此保持在第一和第二子集中的存储单元中的存储值根据相应的第一和第二分布进行分配。 估计第一分布的第一中值,并且基于估计的第一中值来计算区分第一和第二编程状态的读取阈值。 通过使用计算的读取阈值读取存储值,从组中的模拟存储器单元检索数据。

    Efficient Readout from Analog Memory Cells Using Data Compression
    65.
    发明申请
    Efficient Readout from Analog Memory Cells Using Data Compression 有权
    使用数据压缩从模拟存储器单元进行高效读出

    公开(公告)号:US20120260147A1

    公开(公告)日:2012-10-11

    申请号:US13526859

    申请日:2012-06-19

    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed.The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.

    Abstract translation: 一种用于数据存储的方法包括通过将相应的输入存储值写入组中的存储器单元来将数据存储在一组模拟存储器单元中。 在存储数据之后,从组中的模拟存储器单元读取相应的输出存储值。 估计输出存储值的相对置信水平,并且压缩置信水平。 输出存储值和压缩置信水平通过接口从存储器单元传送到存储器控制器。

    EFFICIENT RE-READ OPERATIONS IN ANALOG MEMORY CELL ARRAYS
    66.
    发明申请
    EFFICIENT RE-READ OPERATIONS IN ANALOG MEMORY CELL ARRAYS 有权
    在模拟存储器单元阵列中有效地重新读取操作

    公开(公告)号:US20120254696A1

    公开(公告)日:2012-10-04

    申请号:US13523352

    申请日:2012-06-14

    Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.

    Abstract translation: 一种用于数据存储的方法包括通过将相应的第一存储值写入组中的存储器单元来将经错误校正码(ECC)编码的数据存储在一组模拟存储器单元中。 在存储数据之后,从组中的存储器单元读取相应的第二存储值,并且处理读取的第二存储值以便对ECC进行解码。 响应于对ECC的解码失败,可​​能导致故障的一个或多个第二存储值被识别为可疑存储值。 从包含存储可疑存储值的存储单元的存储器单元的子集重新读取相应的第三存储值。 使用第三存储值对ECC进行重新解码,以重建存储的数据。

    Selective activation of programming schemes in analog memory cell arrays
    67.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号:US08228701B2

    公开(公告)日:2012-07-24

    申请号:US12714501

    申请日:2010-02-28

    CPC classification number: G11C27/005 G11C7/02 G11C11/5628 G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括:定义第一编程方案,其编程一组模拟存储器单元,同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案,其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    Programming Orders for Reducing Distortion Based on Neighboring Rows
    68.
    发明申请
    Programming Orders for Reducing Distortion Based on Neighboring Rows 有权
    基于相邻行减少失真的编程订单

    公开(公告)号:US20120163079A1

    公开(公告)日:2012-06-28

    申请号:US13412731

    申请日:2012-03-06

    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.

    Abstract translation: 一种用于数据存储的方法包括预先定义以行排列的多个模拟存储器单元的编程顺序。 该顺序指定对于在第一和第二侧具有相邻行的给定行,只有当至少一个侧面上的相邻行中的存储器单元处于擦除状态时,给定行中的存储器单元被编程,并且该 给定行中的存储器单元被编程为假设最高编程电平,其对应于单元的编程电平中的最大模拟值,只有在编程给定行中的所有存储器单元之后才采用除 最高水平。 根据预定义的顺序对存储器单元进行编程,将数据存储在存储器单元中。

    MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT
    69.
    发明申请
    MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT 有权
    具有内部信号处理单元的存储器件

    公开(公告)号:US20100131827A1

    公开(公告)日:2010-05-27

    申请号:US12597494

    申请日:2008-04-16

    Abstract: A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Abstract translation: 一种用于操作存储器(36)的方法包括:通过将输入存储值写入到一组模拟存储器单元中,将数据存储在制造在第一半导体管芯上的多个模拟存储单元(40)中。 在存储数据之后,使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值,从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路(48)预处理,以产生预处理的数据。 预处理数据被提供给存储器控制器(28),该存储器控制器(28)被制造在与第一半导体管芯不同的第二半导体管芯上,以使得存储器控制器可以响应于预处理的数据来重建数据。

    METHOD AND APPARATUS FOR FRAME CONTROL HEADER DECODING
    70.
    发明申请
    METHOD AND APPARATUS FOR FRAME CONTROL HEADER DECODING 失效
    用于框架控制头解码的方法和装置

    公开(公告)号:US20100046547A1

    公开(公告)日:2010-02-25

    申请号:US11858471

    申请日:2007-09-20

    CPC classification number: H04L69/22

    Abstract: A method and apparatus for decoding a frame control header message in a wireless communication transmission are disclosed. The method comprises assuming at least some of the bits comprising the frame control header message are constant across multiple frames or are known a priori and generating metrics at least from the bits of the frame control header message that are assumed to be constant or are known a priori. The method further comprises decoding the metrics, for example, with a Viterbi decoder or using chase combining, to yield the decode frame control header message.

    Abstract translation: 公开了一种在无线通信传输中对帧控制报头消息进行解码的方法和装置。 该方法包括假设包括帧控制报头消息的至少一些比特在多个帧中是恒定的,或者是先验已知的,并且至少从帧控制报头消息的比特中产生度量,该比特被假定为恒定的或已知的 先验的 该方法还包括例如使用维特比解码器或使用追踪合并来解码度量,以产生解码帧控制报头消息。

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