公开(公告)号：US08741683B2

公开(公告)日：2014-06-03

申请号：US14074519

申请日：2013-11-07

Applicant: Xintec Inc.

Inventor： Yu-Lung Huang ,  Tsang-Yu Liu

IPC: H01L21/00

CPC classification number: H01L24/94 ,  H01L23/3114 ,  H01L23/3171 ,  H01L27/14618 ,  H01L27/14627 ,  H01L31/048 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H04N5/2257 ,  H01L2924/00

Abstract: An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.

公开(公告)号：US20130168868A1

公开(公告)日：2013-07-04

申请号：US13727976

申请日：2012-12-27

Applicant: Xintec Inc.

Inventor： Yeh-Shih Ho ,  Hsin Kuan ,  Long-Sheng Yeou ,  Tsang-Yu Liu ,  Chia-Ming Cheng

IPC: H01L21/82 ,  H01L23/14

CPC classification number: H01L21/82 ,  B81B7/007 ,  B81B2207/096 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/14 ,  H01L23/147 ,  H01L24/08 ,  H01L24/24 ,  H01L24/80 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24146 ,  H01L2224/80006 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/1461 ,  H01L2224/82 ,  H01L2224/80 ,  H01L21/78

Abstract: A fabrication method of a semiconductor stack structure mainly includes: singulating a wafer of a first specification into a plurality of chips; rearranging the chips into a second specification of a wafer so as to stack the chips on a substrate of the second specification through a plurality of blocks; forming a redistribution layer on the chips; and performing a cutting process to obtain a plurality of semiconductor stack structures. Therefore, the present invention allows a wafer of a new specification to be processed by using conventional equipment without the need of new factory buildings or equipment. As such, chip packages can be timely supplied to meet the replacement speed of electronic products.

Abstract translation: 半导体堆叠结构的制造方法主要包括：将第一规格的晶片分割成多个芯片; 将芯片重新排列成晶片的第二规格，以通过多个块将芯片堆叠在第二规格的基板上; 在芯片上形成再分配层; 并执行切割处理以获得多个半导体堆叠结构。 因此，本发明允许通过使用常规设备来处理新规格的晶片，而不需要新的工厂建筑物或设备。 因此，可以及时提供芯片封装以满足电子产品的更换速度。

公开(公告)号：US11137559B2

公开(公告)日：2021-10-05

申请号：US16851099

申请日：2020-04-17

Applicant: XINTEC INC.

Inventor： Jiun-Yen Lai ,  Yu-Ting Huang ,  Hsing-Lung Shen ,  Tsang-Yu Liu ,  Hui-Hsien Wu

IPC: G02B6/42

Abstract: An optical chip package is provided. The optical chip package includes a first transparent substrate, a second transparent substrate, and a spacer layer. The first and second transparent substrates each has a first surface and a second surface opposite the first surface. The first transparent substrate has a thickness that is different than that of the second transparent substrate. The second transparent substrate is disposed over the first transparent substrate, and the spacer layer is bonded between the second surface of the first transparent substrate and the first surface of the second transparent substrate. The recess region extends from the second surface of the second transparent substrate into the first transparent substrate, so that the first transparent substrate has a step-shaped sidewall. A method of forming an optical chip package is also provided.

公开(公告)号：US11107759B2

公开(公告)日：2021-08-31

申请号：US17037151

申请日：2020-09-29

Applicant: XINTEC INC.

Inventor： Wei-Luen Suen ,  Jiun-Yen Lai ,  Hsing-Lung Shen ,  Tsang-Yu Liu

IPC: H01L23/498 ,  H01L21/48

Abstract: A chip package includes a lower substrate, a first silicon nitride substrate, a bonding layer, an upper substrate, a first functional layer, a transparent conductive layer, an isolation layer, and a first conductive pad. The supporting layer is located between the lower substrate and the first silicon nitride substrate, and is made of a material including Benzocyclobutene (BCB). The upper substrate is located on the first silicon nitride substrate. The first functional layer is located between the upper substrate and the first silicon nitride substrate. The transparent conductive layer is located on the upper substrate. The isolation layer covers the upper substrate and the transparent conductive layer. The first conductive pad is located in the isolation layer and in electrical contact with the transparent conductive layer.

公开(公告)号：US10461117B2

公开(公告)日：2019-10-29

申请号：US15848600

申请日：2017-12-20

Applicant: XINTEC INC.

Inventor： Yen-Shih Ho ,  Tsang-Yu Liu ,  Chia-Sheng Lin ,  Chaung-Lin Lai

IPC: H01L27/146 ,  H01L21/683 ,  H01L23/00

Abstract: A method for manufacturing a semiconductor structure includes the following steps. A first carrier is adhered to a first surface of a wafer by a first temporary bonding layer. A second surface of the wafer facing away from the first carrier is etched to form at least one through hole and at least one trench, in which a conductive pad of the wafer is exposed through the through hole. An isolation layer is formed on the second surface of the wafer, a sidewall of the through hole, and a sidewall of the trench. A second carrier is adhered to the second surface of the wafer by a second temporary bonding layer, and thus the through hole and the trench are covered by the second carrier. The first carrier and the first temporary bonding layer are removed.

公开(公告)号：US10318784B2

公开(公告)日：2019-06-11

申请号：US15177143

申请日：2016-06-08

Applicant: XINTEC INC.

Inventor： Shu-Ming Chang ,  Tsang-Yu Liu ,  Yen-Shih Ho

IPC: G06K9/00 ,  G06F3/041

Abstract: This invention provides a touch panel-sensing chip package module complex, comprising: a touch panel with a first top surface and a first bottom surface opposite to each other, wherein the first bottom surface having a first cavity with a bottom wall surrounded by a sidewall; a color layer formed on the bottom wall and the first bottom surface adjacent to the cavity; and a chip scale sensing chip package module bonded to the cavity by the color layer formed on the bottom wall of the cavity.

公开(公告)号：US10096635B2

公开(公告)日：2018-10-09

申请号：US14819138

申请日：2015-08-05

Applicant: XINTEC INC.

Inventor： Wei-Ming Chien ,  Po-Han Lee ,  Tsang-Yu Liu ,  Yen-Shih Ho

IPC: H01L27/146

Abstract: A semiconductor structure includes a chip, a light transmissive plate, a spacer, and a light-shielding layer. The chip has an image sensor, a first surface and a second surface opposite to the first surface. The image sensor is located on the first surface. The light transmissive plate is disposed on the first surface and covers the image sensor. The spacer is between the light transmissive plate and the first surface, and surrounds the image sensor. The light-shielding layer is located on the first surface between the spacer and the image sensor.

公开(公告)号：US10050006B2

公开(公告)日：2018-08-14

申请号：US15483928

申请日：2017-04-10

Applicant: XINTEC INC.

Inventor： Chia-Lun Shen ,  Yi-Ming Chang ,  Tsang-Yu Liu ,  Yen-Shih Ho

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/52 ,  H01L21/78

Abstract: A method for forming a chip package is provided. The method includes providing a first substrate and a second substrate. The first substrate is attached onto the second substrate by an adhesive layer. A first opening is formed to penetrate the first substrate and the adhesive layer and separate the first substrate and the adhesive layer into portions. A chip package formed by the method is also provided.

公开(公告)号：US09966400B2

公开(公告)日：2018-05-08

申请号：US15005956

申请日：2016-01-25

Applicant: XINTEC INC.

Inventor： Tsang-Yu Liu ,  Chi-Chang Liao

IPC: H01L27/146

CPC classification number: H01L27/14618 ,  H01L27/14625 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14687 ,  H01L2224/13

Abstract: A method for forming a photosensitive module is provided. The method includes providing a sensing device. The sensing device includes a substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A first opening penetrates the substrate and exposes the conducting pad. A redistribution layer is in the first opening to electrically connect to the conducting pad. A cover plate is located on the first surface and covers the conducting pad. The method also includes bonding the sensing device to a circuit board. The cover plate is removed after bonding the sensing device to the circuit board. The method further includes mounting an optical component corresponding to the sensing device on the circuit board. A photosensitive module formed by the method is also provided.

公开(公告)号：US09711425B2

公开(公告)日：2017-07-18

申请号：US15237287

申请日：2016-08-15

Applicant: XINTEC INC.

Inventor： Shu-Ming Chang ,  Po-Chang Huang ,  Tsang-Yu Liu ,  Yu-Lung Huang ,  Chi-Chang Liao

IPC: H01L23/31 ,  G06K9/00 ,  H01L23/48

CPC classification number: H01L23/3121 ,  G06K9/00013 ,  G06K9/0002 ,  H01L23/3114 ,  H01L23/3178 ,  H01L23/481 ,  H01L2224/11

Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.