Pulse arc discharge welding apparatus
    61.
    发明授权
    Pulse arc discharge welding apparatus 失效
    脉冲电弧放电焊接设备

    公开(公告)号:US4994646A

    公开(公告)日:1991-02-19

    申请号:US353430

    申请日:1989-05-18

    IPC分类号: B23K9/09

    CPC分类号: B23K9/092

    摘要: A pulse arc discharge welding apparatus comprising a pulse current waveform control circuit for periodically outputting a pulse current group consisting of a plurality of pulses, pulse arc current supplying means for outputting a pulse arc current according to an output of said pulse current waveform control circuit and an arc welding means for performing pulse arc discharge with an output of said pulse arc current supplying means, to carry out a pulse arc welding operation. In such a pulse arc discharge welding apparatus, with a discharge current waveform provided in the form of high frequency pulses, the discharge light and the gas in pulse discharge and the electrode are regulated and controlled with high accuracy.

    Plasma apparatus
    62.
    发明授权
    Plasma apparatus 失效
    等离子体仪器

    公开(公告)号:US4890294A

    公开(公告)日:1989-12-26

    申请号:US147726

    申请日:1988-01-25

    摘要: The invention relates to a plasma apparatus where plasma is generated utilizing microwave discharge and laser excitation is performed and plasma processing is performed. More specifically, in a plasma apparatus where a microwave from a microwave oscillator is transmitted through a microwave transmission path to a microwave circuit, and plasma is generated by a microwave discharge within the microwave circuit, a plasma generating medium for generating the plasma is filled in a space formed between a conductor wall constituting a part of the microwave circuit and a dielectric installed opposite to the conductor wall, and the microwave circuit forms microwave mode having an electric field component orthogonal to the boundary between the dielectric and the plasma.

    摘要翻译: 本发明涉及一种使用微波放电产生等离子体并进行激光激发并进行等离子体处理的等离子体装置。 更具体地,在微波振荡器的微波通过微波传输路径传输到微波电路的等离子体装置中,并且通过微波电路内的微波放电产生等离子体,用于产生等离子体的等离子体产生介质被填充 在构成微波电路的一部分的导体壁与与导体壁相对设置的电介质之间形成的空间,微波电路形成具有与电介质和等离子体之间的边界正交的电场分量的微波模式。

    Semiconductor memory device
    65.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US08508977B2

    公开(公告)日:2013-08-13

    申请号:US13053041

    申请日:2011-03-21

    申请人: Yoshihiro Ueda

    发明人: Yoshihiro Ueda

    IPC分类号: G11C11/00

    摘要: According to one embodiment, a semiconductor memory device includes a first cell array includes memory cells and reference cells, a second cell array located adjacent to the first cell array in a first direction, a third cell array located adjacent to the first cell array in a second direction crossing the first direction, a fourth cell array located adjacent to the second cell array in the second direction, and a sense amplifier connected to the first to fourth cell array and configured to compare a current through a memory cell with a current through a reference cell to determine the data of the memory cell. A reference cell is selected from a cell array which is diagonally opposite to a cell array as a read target.

    摘要翻译: 根据一个实施例,半导体存储器件包括第一单元阵列,其包括存储单元和参考单元,在第一方向上与第一单元阵列相邻的第二单元阵列,位于第一单元阵列附近的第三单元阵列 与第二方向相邻的第四单元阵列,以及连接到第一至第四单元阵列的读出放大器,用于将通过存储单元的电流与通过第一方向的电流进行比较 参考单元以确定存储单元的数据。 从与作为读取目标的单元阵列对角地相对的单元阵列中选择参考单元。

    Interface card system
    66.
    发明授权
    Interface card system 有权
    接口卡系统

    公开(公告)号:US08307143B2

    公开(公告)日:2012-11-06

    申请号:US12771072

    申请日:2010-04-30

    IPC分类号: G06F13/20 G06F13/40

    CPC分类号: G06F13/385 G06F2213/3804

    摘要: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.

    摘要翻译: 提供了一种用于SD总线控制的接口卡系统。 用于SD总线控制的接口卡系统包括CPU总线接口11a和/或SD总线接口11b,连接到解释SD命令并控制整个接口卡系统的操作的接口的主机接口模块16 和用作主机控制器的第二内部SD主机引擎15a和15b,分别连接到内部SD主机引擎的第一和第二选择器14a和14b,每个内部SD主机引擎选择数据或命令的路径,第一和第二SD总线接口13a和 13b,以及连接到连接到选择器的SD总线接口的数据传递控制部分17,其允许SD命令和数据通过。

    REFRIGERATOR
    67.
    发明申请
    REFRIGERATOR 有权
    冰箱

    公开(公告)号:US20120137711A1

    公开(公告)日:2012-06-07

    申请号:US13389568

    申请日:2010-08-24

    IPC分类号: F25B49/00 F25D17/06 G05D23/32

    摘要: To maintain an appropriate humidity in a refrigerator using a spray device to spray mist, without depending on a moisture sensor. A refrigerator (100) for forcibly circulating cold air which is gas cooled in a cooling compartment (110), the refrigerator including: a first storage compartment (107) disposed on the way of an air passage; a spray device (131) which sprays mist into the first storage compartment (107); a damper (145) disposed upstream of the first storage compartment (107); a delay unit (156) which generates, based on an open signal issued when the damper (145) is opened, a first signal for stopping the operation of the spray device (131) after an elapse of a first time period, and to generate, based on a close signal issued when the damper (145) is closed, a second signal for starting the operation of the spray device (131) after an elapse of a second time period; and a control unit (146) which controls the spray device (131).

    摘要翻译: 使用喷雾装置在冰箱中保持适当的湿度以喷雾,而不依赖于湿度传感器。 一种用于强制循环在冷却室(110)中被气体冷却的冷空气的冰箱(100),所述冰箱包括:设置在空气通道上的第一储藏室(107) 喷雾装置(131),其将雾喷射到第一储藏室(107)中; 设置在所述第一储藏室(107)上游的阻尼器(145); 延迟单元(156),其基于当所述阻尼器(145)打开时发出的打开信号产生用于在经过第一时间段之后停止所述喷射装置(131)的操作的第一信号,并且产生 基于当阻尼器(145)关闭时发出的关闭信号,在经过第二时间段之后启动喷雾装置(131)的操作的第二信号; 以及控制喷雾装置(131)的控制单元(146)。

    Speed change transmission apparatus
    68.
    发明授权
    Speed change transmission apparatus 有权
    变速传动装置

    公开(公告)号:US08047942B2

    公开(公告)日:2011-11-01

    申请号:US12067457

    申请日:2007-03-19

    IPC分类号: F16H47/04

    摘要: The apparatus includes a hydrostatic stepless speed change section 20 receiving an output of an engine 1, a planetary transmission section 3a having a plurality of planetary transmission mechanisms PF, PR and a plurality of output members 41, 42, the planetary transmission section being configured to combine a drive force outputted from the hydrostatic stepless speed change section 20 and an engine drive force that has not been subjected to any speed change action by the hydrostatic stepless speed change section 20, and a speed change output section 3b having an output shaft 70, the speed change output section being configured to output combined drives force outputted from the plurality of output members 41, 42 in a plurality of different speed ranges from the output shaft 70. The speed change output section 3b includes a plurality of transmission mechanisms 71-74 disposed between the plurality of output members 41, 42 and the output shaft 70, and clutches CL1-CL4 provided in correspondence with the respective plurality of transmission mechanisms.

    摘要翻译: 该装置包括容纳发动机1的输出的静液压无级变速部分20,具有多个行星传动机构PF,PR和多个输出部件41,42的行星传动部分3a,行星传动部分构造成 组合从静液压无级变速部20输出的驱动力和通过静液压无级变速部20未进行任何变速动作的发动机驱动力,以及具有输出轴70的变速输出部3b, 所述变速输出部被配置为从所述输出轴70输出从所述多个输出部件41,42输出的组合驱动力,所述多个输出部件41,42以多个不同的速度范围输出。所述变速输出部3b包括多个传动机构71-74 设置在多个输出构件41,42和输出轴70之间,以及设置在对应件中的离合器CL1-CL4 具有相应的多个传输机制。

    Semiconductor storage device
    69.
    发明授权
    Semiconductor storage device 失效
    半导体存储设备

    公开(公告)号:US07869260B2

    公开(公告)日:2011-01-11

    申请号:US12409958

    申请日:2009-03-24

    申请人: Yoshihiro Ueda

    发明人: Yoshihiro Ueda

    IPC分类号: G11C11/00

    摘要: A plurality of memory cells, each including a variable resistance element capable of having four or more values, are arranged at intersections of first wirings and second wirings. A control circuit selectively drives the first and second wirings. A sense amplifier circuit compares, with a reference voltage, a voltage generated by a current flowing through a selected memory cell. A reference voltage generation circuit includes: a resistance circuit including first and second resistive elements connected in parallel. Each of the first resistive elements has a resistance value substantially the same as a maximum resistance value in the variable resistance elements, and each of the second resistive elements has a resistance value substantially the same as a minimum resistance value in the variable resistance elements. A current regulator circuit averages currents flowing through the first and second resistive elements.

    摘要翻译: 在第一布线和第二布线的交点处布置有多个存储单元,每个存储单元包括能够具有四个或更多个值的可变电阻元件。 控制电路选择性地驱动第一和第二布线。 读出放大器电路与参考电压比较由流过所选存储单元的电流产生的电压。 参考电压产生电路包括:电阻电路,包括并联连接的第一和第二电阻元件。 每个第一电阻元件具有与可变电阻元件中的最大电阻值基本相同的电阻值,并且每个第二电阻元件具有与可变电阻元件中的最小电阻值基本相同的电阻值。 电流调节器电路平均流过第一和第二电阻元件的电流。