公开(公告)号：US20110012173A1

公开(公告)日：2011-01-20

申请号：US12867427

申请日：2009-01-23

申请人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu Umeda ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/12

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/66462

摘要： A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).

摘要翻译： 半导体器件包括形成在衬底（101）上的未掺杂的GaN层（103），形成在未掺杂的GaN层（103）上并且具有比未掺杂的GaN层的带隙能量大的带隙能量的未掺杂的AlGaN层（104） 103），形成在未掺杂的AlGaN层（104）上的p型AlGaN层（105）和高浓度p型GaN层（106）以及形成在高掺杂AlGaN层上的n型AlGaN层（107） 浓度p型GaN层（106）。 在高浓度p型GaN层（106）上形成与高浓度p型GaN层（106）欧姆接触的栅电极（112），其形成在通过形成的开口（107a）的部分露出的区域 在n型AlGaN层（107）中。

公开(公告)号：US07683399B2

公开(公告)日：2010-03-23

申请号：US11758304

申请日：2007-06-05

申请人： Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L29/045 ,  H01L29/0891 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/452

摘要： There is provided a normally-off type transistor made of a nitride semiconductor. The transistor includes; an undoped GaN layer which forms a channel region; an undoped Al0.2Ga0.8N layer which is formed on the undoped GaN layer and has a band gap larger than that of the undoped GaN layer; a p-type Al0.2Ga0.8N control layer which is formed on the undoped Al0.2Ga0.8N layer, has a p-type conductivity and forms a control region; an Ni gate electrode which contacts with the p-type Al0.2Ga0.8N control layer; a Ti/Al source electrode and a Ti/Al drain electrode which are formed beside the p-type Al0.2Ga0.8N control layer; and an Ni ohmic electrode which is connected to the undoped GaN layer and serves as a hole absorbing electrode. With this transistor, it is possible to achieve a large-current operation and a high switching speed.

摘要翻译： 提供了由氮化物半导体制成的常关型晶体管。 晶体管包括： 形成沟道区的未掺杂GaN层; 未掺杂的Al0.2Ga0.8N层，其形成在未掺杂的GaN层上，并且具有比未掺杂的GaN层的带隙大的带隙; 形成在未掺杂的Al0.2Ga0.8N层上的p型Al0.2Ga0.8N控制层具有p型导电性并形成控制区; 与p型Al0.2Ga0.8N控制层接触的Ni栅电极; 形成在p型Al0.2Ga0.8N控制层旁边的Ti / Al源电极和Ti / Al漏电极; 以及连接到未掺杂的GaN层并用作空穴吸收电极的Ni欧姆电极。 利用该晶体管，可以实现大电流动作和高切换速度。

公开(公告)号：US07439621B1

公开(公告)日：2008-10-21

申请号：US09707844

申请日：2000-11-08

申请人： Hidetoshi Ishida ,  Kazuo Miyatsuji ,  Hidetoshi Furukawa ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidetoshi Ishida ,  Kazuo Miyatsuji ,  Hidetoshi Furukawa ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L23/34 ,  H01L23/552

CPC分类号： H01L23/552 ,  H01L27/0207 ,  H01L27/088 ,  H01L2223/6644 ,  H01L2924/0002 ,  H01L2924/00

摘要： The RF device of the present invention includes: a semiconductor substrate; and first and second semiconductor components provided on the substrate. Each of the components includes source electrodes, a gate electrode and a drain electrode. And multiple through holes, which pass through the substrate in the thickness direction, are opened in a region of the substrate between the two components. To enhance the effect of suppressing electrical interference between the components, a gap between two adjacent ones of the through holes is preferably smaller than the thickness of the substrate.

摘要翻译： 本发明的RF器件包括：半导体衬底; 以及设置在基板上的第一和第二半导体部件。 每个组件包括源电极，栅电极和漏电极。 并且在两个部件之间的基板的区域中打开穿过基板的厚度方向上的多个通孔。 为了增强抑制部件之间的电气干扰的效果，两个相邻的通孔之间的间隙优选小于基板的厚度。

公开(公告)号：US20080179605A1

公开(公告)日：2008-07-31

申请号：US11937234

申请日：2007-11-08

申请人： Yuji TAKASE ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Yuji TAKASE ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L33/00

CPC分类号： H01L33/32 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/105 ,  H01L33/145 ,  H01L33/465

摘要： A nitride semiconductor light emitting device includes: a dielectric layered film over a substrate, the dielectric layered film being formed by stacking a plurality of dielectric films having different compositions; a semiconductor thin film formed of a single crystal over the dielectric layered film; and a pn junction diode structure over the semiconductor thin film, the pn junction diode structure being formed of a nitride semiconductor.

摘要翻译： 氮化物半导体发光器件包括：在衬底上的电介质层压膜，所述电介质层叠膜通过堆叠多个具有不同组成的电介质膜形成; 由介电层叠膜上的单晶形成的半导体薄膜; 以及在半导体薄膜上的pn结二极管结构，pn结二极管结构由氮化物半导体形成。

公开(公告)号：US07148557B2

公开(公告)日：2006-12-12

申请号：US10650702

申请日：2003-08-29

申请人： Manabu Yanagihara ,  Naohiro Tsurumi ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Manabu Yanagihara ,  Naohiro Tsurumi ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L27/082

CPC分类号： H01L29/66318 ,  H01L29/0817 ,  H01L29/42304 ,  H01L29/7371

摘要： A bipolar transistor includes: a first semiconductor layer having an intrinsic base region and an extrinsic base region; and a second semiconductor layer having a portion located on the intrinsic base region to be an emitter region or a collector region. A capacitive film is provided on the extrinsic base region using the same semiconductor material as that for the second semiconductor layer. A base electrode is formed on the first semiconductor layer to cover the capacitive film and the extrinsic base region.

摘要翻译： 双极晶体管包括：具有本征基极区域和外部基极区域的第一半导体层; 以及第二半导体层，其具有位于本征基极区上的作为发射极区域或集电极区域的部分。 使用与第二半导体层相同的半导体材料在非本征基极区域上提供电容膜。 在第一半导体层上形成基极以覆盖电容膜和外部基极区。

公开(公告)号：US08203376B2

公开(公告)日：2012-06-19

申请号：US12445390

申请日：2007-11-20

申请人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H03K17/687

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/739 ,  H01L29/8124

摘要： A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.

摘要翻译： 半导体器件包括形成在衬底11上并具有沟道区的半导体层堆叠13，在半导体层叠层13上彼此隔开形成的第一电极16A和第二电极16B，形成在第一栅电极18A之间的第一栅电极18A 第一电极16A和第二电极16B，以及形成在第一栅电极18A和第二电极16B之间的第二栅电极18B。 在半导体层堆叠13和第一栅电极18A之间形成具有p型导电性的第一控制层19A。

公开(公告)号：US08076698B2

公开(公告)日：2011-12-13

申请号：US11995040

申请日：2006-06-27

申请人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

发明人： Daisuke Ueda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Tetsuzo Ueda ,  Manabu Yanagihara ,  Masahiro Hikita ,  Hiroaki Ueno

IPC分类号： H01L31/0328

CPC分类号： H01L29/739 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7786

摘要： In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

摘要翻译： 在晶体管中，在蓝宝石衬底101上依次形成AlN缓冲层102，未掺杂的GaN层103，未掺杂的AlGaN层104，p型控制层105和p型接触层106。 晶体管还包括与p型接触层106欧姆接触的栅电极110以及设置在未掺杂的AlGaN层104上的源电极108和漏极109.通过向p型控制层105施加正电压 ，孔被注入到通道中以增加在通道中流动的电流。

公开(公告)号：US07825434B2

公开(公告)日：2010-11-02

申请号：US11647218

申请日：2006-12-29

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/08

CPC分类号： H01L29/7783 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/452 ,  H01L29/7787

摘要： A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.

摘要翻译： 氮化物半导体器件包括：由第一氮化物半导体制成的第一半导体层; 第二半导体层，其形成在第一半导体层的主表面上并且由具有比第一氮化物半导体的带隙宽的第二氮化物半导体构成; 选择性地形成在所述第二半导体层的上部并且由上述第二半导体层的上部制成的具有p型导电性的第三氮化物半导体的控制层; 源极和漏极，形成在控制层的相应侧上的第二半导体层上; 形成在所述控制层上的栅电极; 以及第四半导体层，形成在与所述主表面相对的所述第一半导体层的表面上，相对于所述第一氮化物半导体具有价带中的势垒，并且由包含铝的第四氮化物半导体构成。

公开(公告)号：US07456707B2

公开(公告)日：2008-11-25

申请号：US11194460

申请日：2005-08-02

申请人： Naohiro Tsurumi ,  Kazuhiro Yahata ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda ,  Atsuhiko Kanda

发明人： Naohiro Tsurumi ,  Kazuhiro Yahata ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda ,  Atsuhiko Kanda

IPC分类号： H03H9/54

CPC分类号： H03H9/173 ,  H03H3/04 ,  H03H9/172 ,  H03H9/564 ,  H03H2003/021

摘要： An acoustic resonator includes: a substrate; a resonator film which is supported above the main surface of the substrate and includes a piezoelectric film and a pair of a top electrode and a bottom electrode which are formed on part of the top surface and part of the bottom surface of the piezoelectric film, respectively, to face each other via the piezoelectric film; and a support which is formed on the main surface of the substrate to support the resonator film from below. A resonance cavity is provided in part of a region between the substrate and the resonator film below at least a portion of part of the resonator film where the top electrode and the bottom electrode coincide with each other and an isolation cavity is provided in other part of said region where the support and the resonance cavity do not exist.

摘要翻译： 声谐振器包括：基板; 一种谐振膜，其被支撑在基板的主表面上方，分别包括压电膜和一对顶电极和底电极，它们分别形成在压电膜的顶表面和底表面的一部分上 通过压电膜相互面对; 以及形成在基板的主表面上以从下方支撑谐振膜的支撑体。 谐振腔被设置在基板和谐振器膜之间的区域的一部分的下方，在谐振膜的至少一部分之上，其中顶部电极和底部电极彼此重合，并且在另一部分中设置隔离腔 所述区域不存在支撑和谐振腔。

公开(公告)号：US08872227B2

公开(公告)日：2014-10-28

申请号：US13402631

申请日：2012-02-22

申请人： Hidekazu Umeda ,  Yoshiharu Anda ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidekazu Umeda ,  Yoshiharu Anda ,  Tetsuzo Ueda ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/417 ,  H01L29/20

CPC分类号： H01L29/2003 ,  H01L29/1066 ,  H01L29/4175 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/861

摘要： A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.

摘要翻译： 氮化物半导体器件包括半导体衬底和形成在半导体衬底上的氮化物半导体层。 半导体衬底包括正常区域和围绕法线区域的界面电流阻挡区域。 氮化物半导体层包括元件区域和围绕元件区域的隔离区域。 元件区域形成在正常区域上。 界面电流阻挡区域含有杂质，并且在氮化物半导体层和半导体衬底之间的界面处产生的载流子形成势垒。