Backside stress compensation for gallium nitride or other nitride-based semiconductor devices
    61.
    发明申请
    Backside stress compensation for gallium nitride or other nitride-based semiconductor devices 有权
    氮化镓或其他氮化物基半导体器件的背面应力补偿

    公开(公告)号:US20110140118A1

    公开(公告)日:2011-06-16

    申请号:US12927931

    申请日:2010-11-30

    申请人: Jamal Ramdani

    发明人: Jamal Ramdani

    IPC分类号: H01L29/12 H01L21/20

    摘要: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.

    摘要翻译: 一种方法包括在半导体衬底的第一侧上形成应力补偿层,并在衬底的第二面上形成III族氮化物层。 通过III族氮化物层在衬底上产生的应力通过应力补偿层在衬底上产生的应力至少部分地减小。 形成应力补偿层可以包括从非晶或微晶材料形成应力补偿层。 此外,该方法可以包括在随后在衬底的第二侧上形成一层或多层之后使无定形或微晶材料结晶。 在随后形成III族氮化物层和/或退火过程期间,可能发生非晶或微晶材料的结晶。 无定形或微晶材料在基底上不会产生或少量的应力,并且结晶的材料可能在基底上产生更大量的应力。

    High performance SiGe:C HBT with phosphorous atomic layer doping
    62.
    发明授权
    High performance SiGe:C HBT with phosphorous atomic layer doping 有权
    高性能SiGe:C HBT具有磷原子层掺杂

    公开(公告)号:US07892915B1

    公开(公告)日:2011-02-22

    申请号:US11367030

    申请日:2006-03-02

    IPC分类号: H01L21/8249

    摘要: A base structure for high performance Silicon Germanium:Carbon (SiGe:C) based heterojunction bipolar transistors (HBTs) with phosophorus atomic layer doping (ALD) is disclosed. The ALD process subjects the base substrate to nitrogen gas (in ambient temperature approximately equal to 500 degrees Celsius) and provides an additional SiGe:C spacer layer. During the ALD process, the percent concentrations of Germanium (Ge) and carbon (C) are substantially matched and phosphorus is a preferred dopant. The improved SiGe:C HBT is less sensitive to process temperature and exposure times, and exhibits lower dopant segregation and sharper base profiles.

    摘要翻译: 公开了一种用于高性能硅锗:具有磷光原子层掺杂(ALD)的碳(SiGe:C)基异质结双极晶体管(HBT))的基本结构。 ALD工艺使基底衬底受氮气(在大约等于500摄氏度的环境温度下),并提供另外的SiGe:C间隔层。 在ALD过程中,锗(Ge)和碳(C)的百分比浓度基本匹配,磷是优选的掺杂剂。 改进的SiGe:C HBT对工艺温度和曝光时间较不敏感,并且显示较低的掺杂剂偏析和更尖锐的基体分布。

    Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter
    63.
    发明授权
    Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter 有权
    使用选择性生长的发射极形成自对准双极晶体管结构的方法

    公开(公告)号:US07687887B1

    公开(公告)日:2010-03-30

    申请号:US11607265

    申请日:2006-12-01

    IPC分类号: H01L21/00

    摘要: A method for forming a self-aligned bipolar transistor structure uses the selective growth of a doped silicon emitter in a sloped oxide emitter window to form the self-aligned structure. In an alternate process flow, the top emitter layer is SiGe with a high Ge content that is etched off selectively after deposition of the extrinsic base layer. In another alternate flow, a nitride plug formed on top of the emitter blocks the extrinsic base implant from the emitter region.

    摘要翻译: 用于形成自对准双极晶体管结构的方法使用在倾斜的氧化物发射器窗口中的掺杂硅发射体的选择性生长以形成自对准结构。 在替代工艺流程中,顶部发射极层是具有高Ge含量的SiGe,其在沉积外部基极层之后被选择性地蚀刻掉。 在另一个替代流程中,形成在发射极顶部的氮化物塞从发射极区域阻挡外部基极注入。

    Microscanner for portable laser diode displays
    64.
    发明授权
    Microscanner for portable laser diode displays 失效
    便携式激光二极管显示器显微镜

    公开(公告)号:US6097528A

    公开(公告)日:2000-08-01

    申请号:US119314

    申请日:1998-07-20

    摘要: A microscanner composed of a semiconductor wafer, having formed as a part thereof a cantilevered portion and having mounted thereon at least one laser diode. The cantilevered portion has electrically interfaced thereto a plurality of interconnects capable of delivering varying voltages. The cantilevered portion is deflected in response to the varying voltages and therefore produces a scanning action about an "x" axis, a "y" axis, or an "x" and "y" axis dependent upon the external varying voltage applied thereto and the design of the cantilevered portion. This scanning action operates to scan the light emitted by the at least one laser diode. The microscanner operates to generate a resultant integrated scanned image. This image can be implemented as either a virtual image display or a projected image display.

    摘要翻译: 由半导体晶片组成的显微镜,其形成为其一部分为悬臂部分并且安装在其上的至少一个激光二极管。 悬臂部分电连接到能够传递变化电压的多个互连。 悬臂部分响应于变化的电压而偏转,因此根据施加到其上的外部变化电压而产生围绕“x”轴,“y”轴或“x”和“y”轴的扫描动作, 悬臂部分的设计。 该扫描动作用于扫描由至少一个激光二极管发射的光。 显微镜操作以产生合成的扫描图像。 该图像可以被实现为虚拟图像显示或投影图像显示。

    Annular waveguide vertical cavity surface emitting laser array and
method of fabrication
    65.
    发明授权
    Annular waveguide vertical cavity surface emitting laser array and method of fabrication 失效
    环形波导垂直腔表面发射激光器阵列及其制造方法

    公开(公告)号:US6084900A

    公开(公告)日:2000-07-04

    申请号:US998365

    申请日:1997-12-24

    摘要: An array of annular waveguide VCSELs for achieving a stable single high order mode light source characterized as emitting a plurality of emission beams of varying wavelengths. The device array including a first mirror stack with mirror pairs in a Al.sub.x Ga.sub.1-x As/Al.sub.y Ga.sub.1-y As material system lattice matched to an active region. The active region includes an active structure sandwiched between a first cladding region adjacent the first mirror stack and a second cladding region, the active structure having at least one quantum well. The VCSEL further includes a second mirror stack lattice matched to the second cladding region and having mirror pairs in a Al.sub.x Ga.sub.1-x As/Al.sub.y Ga.sub.1-y As material system. The second mirror stack is etched to define a first VCSEL and at least one additional VCSEL, each VCSEL including an etched region, thereby defining an annular emission region through which light generated by the annular waveguide VCSEL is emitted.

    摘要翻译: 用于实现稳定的单个高阶模式光源的环形波导VCSEL的阵列,其特征在于发射多个不同波长的发射光束。 该器件阵列包括在与有源区匹配的Al x Ga 1-x As / Al y Ga 1-y As材料体系晶格中具有镜对的第一反射镜叠层。 有源区包括夹在邻近第一反射镜叠层的第一包层区域和第二包层区域之间的有源结构,该有源结构具有至少一个量子阱。 VCSEL还包括与第二包层区域匹配的第二反射镜堆叠晶格并且在Al x Ga 1-x As / Al y Ga 1-y As材料体系中具有镜对。 蚀刻第二反射镜叠层以限定第一VCSEL和至少一个附加VCSEL,每个VCSEL包括蚀刻区域,由此限定环形发射区域,通过该环形发射区域发射由环形波导VCSEL产生的光。

    Vertical cavity surface emitting laser for high power operation and
method of fabrication
    67.
    发明授权
    Vertical cavity surface emitting laser for high power operation and method of fabrication 失效
    用于大功率操作的垂直腔表面发射激光器和制造方法

    公开(公告)号:US5914973A

    公开(公告)日:1999-06-22

    申请号:US795260

    申请日:1997-02-10

    摘要: A VCSEL for high power operation and method of fabrication including a substrate element, a heat dissipation layer disposed on the substrate element, a first mirror stack, an active region lattice matched to a surface of the first mirror stack, and a second mirror stack lattice matched to a surface of the active region. An electrical contact is coupled to a surface of the active region and an electrical contact is positioned on another surface of the active region. The VCSEL is fabricated initially as two wafer structures each including a heat dissipation layer. The two wafer structures are flip mounted and the two heat dissipation layers are fused together to form a single heat dissipation layer. The structure is then selectively etched to remove a substrate element onto which the first wafer structure was formed.

    摘要翻译: 一种用于高功率操作的VCSEL和制造方法,包括:衬底元件,设置在衬底元件上的散热层,第一反射镜叠层,与第一反射镜叠层的表面匹配的有源区域晶格,以及第二反射镜叠层晶格 与活性区域的表面匹配。 电触点耦合到有源区的表面,并且电触点位于有源区的另一表面上。 VCSEL最初制造为两个晶片结构,每个晶片结构均包括散热层。 两个晶片结构被翻转安装,并且两个散热层被熔合在一起以形成单个散热层。 然后选择性地蚀刻该结构以除去其上形成有第一晶片结构的衬底元件。

    VCSEL with selective oxide transition regions
    69.
    发明授权
    VCSEL with selective oxide transition regions 失效
    具有选择性氧化物过渡区域的VCSEL

    公开(公告)号:US5764671A

    公开(公告)日:1998-06-09

    申请号:US734569

    申请日:1996-10-21

    摘要: A semiconductive substrate (101) with a surface (102) having a first stack of distributed Bragg reflectors (109) disposed on the surface (102) of the semiconductive substrate (101). A first transition region (140) is disposed on the first stack of distributed Bragg reflectors (109) with a first cladding region (113) being disposed on the first transition region (140). An active area (117) is disposed on the first cladding region (113) with a second cladding region (123) being disposed on the active area (117). A second transition region (145) having a layer (255) of aluminum arsenide is disposed on the second cladding region (123) with a second stack of distributed Bragg reflectors (127) being disposed on the second transition region (145).

    摘要翻译: 具有表面(102)的半导体衬底(101),其具有设置在半导体衬底(101)的表面(102)上的分布布拉格反射器(109)的第一堆叠。 第一过渡区域(140)设置在分布布拉格反射器(109)的第一堆叠上,第一包层区域(113)设置在第一过渡区域(140)上。 有源区域(117)设置在第一包层区域(113)上,第二包层区域(123)设置在有源区域(117)上。 具有砷化铝层(255)的第二过渡区域(145)设置在第二包覆区域(123)上,第二堆叠分布布拉格反射器(127)设置在第二过渡区域(145)上。

    Long wavelength VCSEL
    70.
    发明授权
    Long wavelength VCSEL 失效
    长波长VCSEL

    公开(公告)号:US5732103A

    公开(公告)日:1998-03-24

    申请号:US762489

    申请日:1996-12-09

    摘要: A VCSEL for emitting long wavelength light including a first mirror stack lattice matched to the surface of a substrate and including mirror pairs in a II-VI material system, an InP based active region lattice matched to a surface of the first mirror stack, and a second mirror stack lattice matched to a surface of the active region and including mirror pairs in a II-VI material system. An electrical contact is coupled to a surface of the active region and an electrical contact is positioned on another surface of the active region. In a specific embodiment the II-VI material system includes ZnCdSe/MgZnCdSe.

    摘要翻译: 一种用于发射长波长光的VCSEL,其包括与基板表面匹配的第一反射镜堆叠晶格并且包括II-VI材料系统中的镜对,与第一反射镜叠层的表面匹配的基于InP的有源区域晶格,以及 第二反射镜堆叠晶格与有源区的表面匹配并且包括II-VI材料体系中的反射镜对。 电触点耦合到有源区的表面,并且电触点位于有源区的另一表面上。 在具体实施方案中,II-VI材料体系包括ZnCdSe / MgZnCdSe。