公开(公告)号：US20170208235A1

公开(公告)日：2017-07-20

申请号：US15477945

申请日：2017-04-03

申请人： Sony Corporation

发明人： Yasutaka Kimura

IPC分类号： H04N5/235 ,  H04N5/355 ,  H04N9/04 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/353 ,  H04N5/369

CPC分类号： H04N5/2353 ,  H04N5/3535 ,  H04N5/35563 ,  H04N5/35581 ,  H04N5/3692 ,  H04N5/374 ,  H04N5/3741 ,  H04N5/3742 ,  H04N5/37455 ,  H04N9/045 ,  H04N2209/045

摘要： There is provided an image sensor including at least three pixel transfer control signal lines, on a per line basis, configured to control exposure start and end timings of a pixel in order for exposure timings of a plurality of the pixels constituting one line in a specific direction to have at least three patterns.

公开(公告)号：US09712774B1

公开(公告)日：2017-07-18

申请号：US14996141

申请日：2016-01-14

申请人： OMNIVISION TECHNOLOGIES, INC.

发明人： Tianjia Sun ,  Qingfei Chen ,  Chun-Ming Tang ,  Jingyi Liu

IPC分类号： H04N5/378 ,  H04N5/374 ,  G06T1/20 ,  H01L27/146 ,  H04N5/363 ,  H04N5/365 ,  H04N5/3745

CPC分类号： H04N5/378 ,  H01L27/14641 ,  H01L27/14643 ,  H04N5/3577 ,  H04N5/363 ,  H04N5/3658 ,  H04N5/37455

摘要： A method of implementing dynamic ground sharing in an image sensor with pipeline architecture starts with a pixel array capturing image data. Pixel array includes pixels to generate pixel data signals, respectively. A readout circuitry acquires the image data from a row in the pixel array. An analog-to-digital conversion (ADC) circuitry included in the readout circuitry samples the image data from the row to obtain sampled input data. When the ADC circuitry is sampling, a ground sharing switch is closed to couple the pixel array and the ADC circuitry to a common ground. When the ADC circuitry is not sampling, the ground sharing switch is open to separate the pixel array and the ADC circuitry from the common ground. The ADC circuitry converts the sampled image data from analog to digital to obtain an ADC output. Other embodiments are described.

公开(公告)号：US20170201700A1

公开(公告)日：2017-07-13

申请号：US15387074

申请日：2016-12-21

申请人： Hideki HASHIMOTO ,  Masamoto NAKAZAWA

发明人： Hideki HASHIMOTO ,  Masamoto NAKAZAWA

IPC分类号： H04N5/357 ,  H04N5/3745 ,  H04N5/378 ,  H04N5/365

CPC分类号： H04N5/3575 ,  H04N5/365 ,  H04N5/3692 ,  H04N5/37455 ,  H04N5/378

摘要： A photoelectric conversion element includes: light receiving elements that convert an optical signal into an electrical signal per pixel; offset fixing units that fix an offset of an output level of each of the light receiving elements to a reference level; analog/digital conversion units that convert signals respectively corresponding to a signal level being converted from an optical signal and output by the light receiving elements and a reset level output independent of an optical signal, into digital signals, according to the reference level; amplifier units that amplify a signal; and correlated double sampling units that perform correlated double sampling per each of the light receiving elements by using a signal based on the reset level and a signal based on the signal level, wherein the amplifier units amplify the signal corresponding to the reset level and the signal corresponding to the signal level before implementing the correlated double sampling.

公开(公告)号：US20170187971A1

公开(公告)日：2017-06-29

申请号：US15381840

申请日：2016-12-16

申请人： CANON KABUSHIKI KAISHA

发明人： Satoshi Suzuki

IPC分类号： H04N5/355 ,  H04N5/3745 ,  H01L27/146 ,  H04N5/353

CPC分类号： H04N5/35572 ,  H01L27/14634 ,  H01L27/14643 ,  H04N5/3537 ,  H04N5/369 ,  H04N5/3742 ,  H04N5/37455 ,  H04N5/379

摘要： A solid-state image pickup element includes an image signal combining part configured to combine a first image signal read from a pixel portion at a first timing, and a second image signal read from the pixel portion at a second timing, which is different from the first timing, to generate a third image signal.

公开(公告)号：US20170180663A1

公开(公告)日：2017-06-22

申请号：US14979058

申请日：2015-12-22

申请人： OMNIVISION TECHNOLOGIES, INC.

发明人： Keiji Mabuchi ,  Sohei Manabe

IPC分类号： H04N5/378 ,  H04N5/353 ,  H04N5/374

CPC分类号： H04N5/37455 ,  H01L27/14634 ,  H04N5/345 ,  H04N5/369 ,  H04N5/374 ,  H04N5/378

摘要： High speed rolling image sensor includes pixel array disposed in first semiconductor die, readout circuits disposed in second semiconductor die and conductors. Pixel array is partitioned into pixel sub-arrays (PSAs). Each of the PSAs includes a plurality of pixels. Pixel groups include pixels that are non-contiguous, non-overlapping and distinct. Each pixel group includes pixels from different PSAs. Each pixel group is coupled to a corresponding analog-to-digital converter and memory unit tiles (ADMs) respectively included in readout circuits. ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store ADC outputs. Conductors are coupling pixel array to ADMs. Conductors include number of conductors per column of pixel array. Number of conductors per column of pixel array may be equal to number of pixels in PSA arranged in same column. Other embodiments are described.

公开(公告)号：US20170179172A1

公开(公告)日：2017-06-22

申请号：US15454290

申请日：2017-03-09

申请人： Sony Corporation

发明人： Keiji Mabuchi

IPC分类号： H01L27/146 ,  H04N5/378

CPC分类号： H01L27/14605 ,  H01L27/14601 ,  H01L27/14603 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/035272 ,  H04N5/335 ,  H04N5/357 ,  H04N5/3575 ,  H04N5/3696 ,  H04N5/37455 ,  H04N5/37457 ,  H04N5/378 ,  H04N9/045

摘要： A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

公开(公告)号：US09674471B1

公开(公告)日：2017-06-06

申请号：US15079631

申请日：2016-03-24

申请人： RAYTHEON COMPANY

发明人： Christian M. Boemler

IPC分类号： H04N5/374 ,  H04N5/335 ,  H04N5/378 ,  H03K23/58 ,  H04N5/3745

CPC分类号： H04N5/37455 ,  H03K23/58 ,  H04N5/378

摘要： Aspects and embodiments are directed to a digital unit cell comprising an integrator circuit, a dynamic comparator configured to compare an integration voltage of the integrator circuit with a reference voltage, provide a first pulse signal each time the integration voltage is less than the reference voltage, and provide a second pulse signal each time the integration voltage exceeds the reference voltage, a multiplexer configured to receive a count direction control signal, and a counter element configured to increment a count value each time the first pulse signal or the second pulse signal is received, wherein the multiplexer is configured to couple a first output of the dynamic comparator to the counter element when the count direction control signal is in a first state, and to couple a second output of the dynamic comparator to the counter element when the count direction control signal is in a second state.

公开(公告)号：US20170142364A1

公开(公告)日：2017-05-18

申请号：US15417410

申请日：2017-01-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yuichiro Yamashita ,  Jhy-Jyi Sze

IPC分类号： H04N5/3745 ,  H04N5/378

CPC分类号： H04N5/37457 ,  H04N5/37455 ,  H04N5/378

摘要： A circuit includes a signal line and a pixel unit cell. The pixel unit cell includes one or more light sensing elements, a conversion circuit, and a selection switch between the conversion circuit and the signal line. In the pixel unit cell, the conversion circuit is configured to convert charge carriers from the one or more light sensing elements to a voltage signal at an output node of the conversion circuit.

公开(公告)号：US09648262B2

公开(公告)日：2017-05-09

申请号：US15349797

申请日：2016-11-11

申请人： CANON KABUSHIKI KAISHA

发明人： Daisuke Kobayashi ,  Yoshikazu Yamazaki

IPC分类号： H04N5/347 ,  H04N5/357 ,  H04N5/374 ,  H04N5/3745

CPC分类号： H04N5/3742 ,  H04N5/3575 ,  H04N5/37455

摘要： Because a conventionally known imaging apparatus includes a buffer element for each signal processing circuit, the number of buffer elements increases in proportion to the number of signal processing circuits. The delayed supply of a drive signal within a group of a plurality of signal processing circuits may require the operation timing margin to be set longer. In other words, the operational speed is hard to increase. First buffer circuits connected in series and second buffer circuits connected in parallel with the first buffer circuits are provided, and one second buffer circuit supplies a drive signal to a plurality of signal processing units.

公开(公告)号：US09647655B2

公开(公告)日：2017-05-09

申请号：US14670628

申请日：2015-03-27

申请人： RAYTHEON COMPANY

发明人： Martin S. Denham ,  Bruce E. Bozovich

IPC分类号： H03K7/06 ,  H04N5/3745 ,  H04N5/357

CPC分类号： H03K7/06 ,  H04N5/357 ,  H04N5/37455

摘要： According to one aspect, embodiments herein provide a current to frequency converter comprising a node configured to be coupled to a photodetector and to receive a photo-current from the photodetector, a capacitor having a first terminal and a second terminal and configured to accumulate electrical charge derived from the photo-current on the first terminal and the second terminal, a switch network configured to selectively couple one of the first terminal and the second terminal to the node, and a Master-Slave (MS) Flip Flop (FF) coupled to the switch network and configured to operate the switch network to toggle which of the first terminal and the second terminal is coupled to the node based on a voltage at the node.