公开(公告)号：US08762899B2

公开(公告)日：2014-06-24

申请号：US13743087

申请日：2013-01-16

Applicant: Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

Inventor： Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

IPC: G06F17/50

CPC classification number: H01L22/10 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/70466 ,  G06F17/5036 ,  G06F17/5072 ,  G06F17/5081 ,  H01L21/31144 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of via patterning mask assignment for a via layer using double patterning technology, the method includes determining, using a processor, if a via of the via layer intercepts an underlying or overlaying metal structure assigned to a first metal mask. If the via intercepts the metal structure assigned to the first metal mask, assigning the via to a first via mask, wherein the first via mask aligns with the first metal mask. Otherwise, assigning the via to a second via mask, wherein the second via mask aligns with a second metal mask different from the first metal mask.

Abstract translation: 一种通过使用双重图案化技术对通孔层进行图案掩模分配的方法，所述方法包括使用处理器来确定通孔层的通孔是否拦截分配给第一金属掩模的下面或重叠的金属结构。 如果通孔截取分配给第一金属掩模的金属结构，则将通孔分配给第一通孔掩模，其中第一通孔掩模与第一金属掩模对准。 否则，将通孔分配给第二通孔掩模，其中第二通孔掩模与不同于第一金属掩模的第二金属掩模对准。

公开(公告)号：US08530121B2

公开(公告)日：2013-09-10

申请号：US13368877

申请日：2012-02-08

Applicant: Wen Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

Inventor： Wen Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

IPC: G03F9/00 ,  G03G5/00

CPC classification number: G03F7/2022 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/20 ,  G03F7/704 ,  H01J37/3026 ,  H01J37/3174 ,  Y10S430/143

Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes receiving an integrated circuit (IC) layout design including a target pattern on a grid. The method further includes receiving a multiple-grid structure. The multiple-grid structure includes a number of exposure grid segments offset one from the other by an offset amount in a first direction. The method further includes performing a multiple-grid exposure to expose the target pattern on a substrate and thereby form a circuit feature pattern on the substrate. Performing the multiple-grid exposure includes scanning the substrate with the multiple-grid structure in a second direction such that a sub-pixel shift of the exposed target pattern occurs in the first direction, and using a delta time (Δt) such that a sub-pixel shift of the exposed target pattern occurs in the second direction.

Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括接收包括网格上的目标图案的集成电路（IC）布局设计。 该方法还包括接收多网格结构。 多栅格结构包括多个曝光网格段，其在第一方向上彼此偏移一个偏移量。 该方法还包括执行多栅格曝光以将衬底上的目标图案曝光，从而在衬底上形成电路特征图案。 执行多栅格曝光包括在第二方向上以多栅格结构扫描衬底，使得暴露的目标图案的子像素偏移在第一方向上发生，并且使用增量时间（Deltat）使得子像素 曝光的目标图案的像素位移在第二方向发生。

公开(公告)号：US08524427B2

公开(公告)日：2013-09-03

申请号：US13087133

申请日：2011-04-14

Applicant: Jaw-Jung Shin ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Burn Jeng Lin

Inventor： Jaw-Jung Shin ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Burn Jeng Lin

IPC: G03C5/00 ,  G03F9/00

CPC classification number: G03F7/20 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/2059 ,  H01J37/3026 ,  H01J37/3174 ,  H01J2237/31764 ,  Y10S430/143

Abstract: An electron beam lithography method and apparatus for improving throughput is disclosed. An exemplary lithography method includes receiving a pattern layout having a pattern layout dimension; shrinking the pattern layout dimension; and overexposing a material layer to the shrunk pattern layout dimension, thereby forming the pattern layout having the pattern layout dimension on the material layer.

Abstract translation: 公开了一种用于提高吞吐量的电子束光刻方法和装置。 示例性光刻方法包括接收具有图案布局尺寸的图案布局; 缩小图案布局尺寸; 并且将材料层过度曝光到缩小图案布局尺寸，从而在材料层上形成具有图案布局尺寸的图案布局。

公开(公告)号：US08368037B2

公开(公告)日：2013-02-05

申请号：US13051507

申请日：2011-03-18

Applicant: Wen-Chuan Wang ,  Shy-Jay Lin ,  Jaw-Jung Shin ,  Burn Jeng Lin

Inventor： Wen-Chuan Wang ,  Shy-Jay Lin ,  Jaw-Jung Shin ,  Burn Jeng Lin

IPC: G21K5/00

CPC classification number: G03F7/2059 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/3007 ,  H01J37/317 ,  H01J37/3177 ,  H01J2237/31761 ,  H01J2237/31774

Abstract: A method for electron-beam writing to a medium includes positioning the medium within an e-beam writing machine so that the medium is supported by a stage and is exposed to an e-beam source. The method also includes writing a pattern to the medium using a plurality of independently-controllable beams of the e-beam source, in which the pattern comprises a plurality of parallel strips. Each of the parallel strips is written using multiple ones of the independently-controllable beams.

公开(公告)号：US08180141B2

公开(公告)日：2012-05-15

申请号：US11934512

申请日：2007-11-02

Applicant: Chin-Hsiang Lin ,  Burn Jeng Lin ,  Tsai-Shen Gau

Inventor： Chin-Hsiang Lin ,  Burn Jeng Lin ,  Tsai-Shen Gau

IPC: G06K9/00 ,  G03F1/00

CPC classification number: G03F7/7065 ,  G03F7/70383 ,  H01L22/22 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system for wafer repair, comprising an inspection tool being capable of extracting a wafer image of a semiconductor wafer; a direct-writing tool being capable of locally exposing the semiconductor wafer; and an information processing module configured to compare the wafer image with a reference image and generate data of locations and patterns of defective regions and communicate the data of locations and patterns of defective regions to the direct-writing tool, wherein the reference image comprises a pattern consisting of a scanned image of another die having no defective region.

Abstract translation: 一种用于晶片修复的系统，包括能够提取半导体晶片的晶片图像的检查工具; 能够局部暴露半导体晶片的直写工具; 以及信息处理模块，被配置为将晶片图像与参考图像进行比较，并生成缺陷区域的位置和图案的数据，并将缺陷区域的位置和图案的数据传送到直接书写工具，其中参考图像包括图案 由没有缺陷区域的另一个芯片的扫描图像组成。

公开(公告)号：US20110267591A1

公开(公告)日：2011-11-03

申请号：US13176604

申请日：2011-07-05

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: G03B27/52

CPC classification number: G02B7/028 ,  G02B7/04 ,  G03F7/70341

Abstract: An apparatus for immersion lithography that includes an imaging lens which has a front surface, a fluid-containing wafer stage for supporting a wafer that has a top surface to be exposed positioned spaced-apart and juxtaposed to the front surface of the imaging lens, and a fluid that has a refractive index between about 1.0 and about 2.0 filling a gap formed in-between the front surface of the imaging lens and the top surface of the wafer. A method for immersion lithography can be carried out by flowing a fluid through a gap formed in-between the front surface of an imaging lens and a top surface of a wafer. The flow rate and temperature of the fluid can be controlled while particulate contaminants are filtered out by a filtering device.

公开(公告)号：US07924397B2

公开(公告)日：2011-04-12

申请号：US10702664

申请日：2003-11-06

Applicant: Burn Jeng Lin ,  David Lu

Inventor： Burn Jeng Lin ,  David Lu

IPC: G03B27/52 ,  G03B27/42

CPC classification number: G03F7/70983 ,  G02B1/105 ,  G02B1/111 ,  G02B1/113 ,  G02B1/115 ,  G02B1/14 ,  G02B13/143 ,  G03F7/70341

Abstract: Disclosed is an objective lens adapted for use in liquid immersion photolithography and a method for making such a lens. In one example, the objective lens has multiple lens elements, one of which includes a transparent substrate and a layer of anti-corrosion coating (ACC). The ACC is formed proximate to the transparent substrate and is positioned between a liquid used during the liquid immersion photolithography and the transparent substrate to protect the transparent substrate from the liquid.

Abstract translation: 公开了适用于液浸光刻的物镜和制造这种透镜的方法。 在一个示例中，物镜具有多个透镜元件，其中之一包括透明基板和一层防腐涂层（ACC）。 ACC形成在透明基板附近，并且位于液浸光刻期间使用的液体和透明基板之间，以保护透明基板免于液体。

公开(公告)号：US20100248158A1

公开(公告)日：2010-09-30

申请号：US12411229

申请日：2009-03-25

Applicant: Jeng-Horng Chen ,  Shy-Jay Lin ,  Burn Jeng Lin

Inventor： Jeng-Horng Chen ,  Shy-Jay Lin ,  Burn Jeng Lin

IPC: G03F7/20 ,  G21K5/04

CPC classification number: G03F7/70275 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/70291 ,  G03F7/70508 ,  H01J37/3177 ,  H01J2237/31762

Abstract: The present disclosure provides a maskless lithography apparatus. The apparatus includes a plurality of writing chambers, each including: a wafer stage operable to secure a wafer to be written and a multi-beam module operable to provide multiple radiation beams for writing the wafer; an interface operable to transfer wafers between each of the writing chambers and a track unit for processing an imaging layer to the wafers; and a data path operable to provide a set of circuit pattern data to each of the multiple radiation beams in each of the writing chambers.

Abstract translation: 本公开提供一种无掩模光刻设备。 该装置包括多个写入室，每个写入室包括：可操作以固定要写入的晶片的晶片台和可操作以提供用于写入晶片的多个辐射束的多光束模块; 可操作以在每个写入室之间传送晶片的接口和用于将成像层处理到晶片的轨道单元; 以及数据路径，其可操作以向每个写入室中的每个多个辐射束提供一组电路图案数据。

公开(公告)号：US07394080B2

公开(公告)日：2008-07-01

申请号：US11317974

申请日：2005-12-23

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: H01J37/08 ,  G21K5/10 ,  G03F7/20

CPC classification number: G03F7/70275 ,  G03F7/70208 ,  G03F7/70283

Abstract: An exposure system includes a mask stage module adapted for holding a first mask and a second mask, wherein the first mask is configured for illumination by a first beam to form a transformed first beam having a first pattern from the first mask and the second mask is configured for illumination by a second beam to form a transformed second beam having a second pattern from the second mask. The exposure system also includes a beam combiner configured to combine the transformed first and second beams to form a resultant beam, wherein the resultant beam is projected into a substrate coated with a photoresist layer.

Abstract translation: 曝光系统包括适于保持第一掩模和第二掩模的掩模台模块，其中第一掩模被配置为由第一光束照明以形成具有来自第一掩模的第一图案的变换的第一光束，而第二掩模是 被配置为由第二光束照明以形成具有来自第二掩模的第二图案的变换的第二光束。 曝光系统还包括光束组合器，其被配置为组合变换的第一和第二光束以形成合成光束，其中所得到的光束投射到涂覆有光致抗蚀剂层的基板中。

公开(公告)号：US07151593B2

公开(公告)日：2006-12-19

申请号：US11412555

申请日：2006-04-27

Applicant: Burn Jeng Lin

Inventor： Burn Jeng Lin

IPC: G03B27/32 ,  G03B27/62 ,  G03F1/00 ,  G03C5/00

CPC classification number: G03F1/62 ,  G03F7/70866 ,  G03F7/70975 ,  G03F7/70983 ,  G03F7/70991

Abstract: A method uses a projection mask aligner that includes a hard pellicle mounting apparatus having an enclosure with an interior cavity, an inlet port for receiving a mask with a protective cover, and an outlet port for outputting a mask covered by a hard pellicle, that has a demounting portion for removing the protective cover from the mask, that has a mounting portion for mounting the hard pellicle on the mask, and that has a conduit for receiving a light-transmitting gas. The method includes: forming a hard pellicle/mask assembly having at least one hard pellicle mounted thereon; positioning the hard pellicle/mask assembly between a light source and an imaging lens; positioning a photoresist-coated semiconductor wafer under the imaging lens with a photoresist layer facing the lens; and imaging microelectronics circuits from the hard pellicle/mask assembly onto the semiconductor wafer.

Abstract translation: 一种方法使用投影掩模对准器，其包括具有具有内腔的外壳的硬膜保护装置，用于接收具有保护盖的掩模的入口端口和用于输出由硬膜覆盖的掩模的出口，所述掩模具有 用于从掩模中去除保护盖的拆卸部分，其具有用于将硬膜安装在掩模上的安装部分，并且具有用于接收透光气体的导管。 该方法包括：形成安装在其上的至少一层硬膜的硬膜/掩模组件; 将硬膜/掩模组件定位在光源和成像透镜之间; 将光致抗蚀剂涂覆的半导体晶片定位在成像透镜下面，其中光致抗蚀剂层面向透镜; 以及将硬膜组件/掩模组件的微电子电路成像到半导体晶片上。