公开(公告)号：US5547898A

公开(公告)日：1996-08-20

申请号：US529468

申请日：1995-09-18

申请人： Piotr Grodzinski ,  Hsing-Chung Lee ,  Chan-Long Shieh

发明人： Piotr Grodzinski ,  Hsing-Chung Lee ,  Chan-Long Shieh

IPC分类号： C23C16/18 ,  H01L21/205 ,  H01S5/00 ,  H01S5/183 ,  H01S5/30 ,  H01L21/20

CPC分类号： H01S5/3054 ,  H01S5/18361

摘要： A method for controlling carbon doping levels in a Distributed Bragg Reflectors (DBRs) for a Vertical Cavity Surface Emitting Laser (VCSELs) devices is provided. A first stack of mirrors (105) is deposited on the surface (101) of the substrate (102). A first cladding region (106) is deposited on the first stack of mirrors (105). An active layer (108) is deposited on the first cladding layer (106). A second cladding layer (109) is deposited on the active layer (108). A second stack of mirrors (111) is deposited on the second cladding layer (109) having a carbon doping level controlled by ratio of Group V containing organometallic (tertiarybutylarsine) to Group III organometallics (trimethylgallium and trimethylaluminum).

摘要翻译： 提供了一种用于控制用于垂直腔面发射激光器（VCSEL））的分布式布拉格反射器（DBR）中的碳掺杂水平的方法。 在衬底（102）的表面（101）上沉积第一叠反射镜（105）。 第一包层区域（106）沉积在第一反射镜叠层（105）上。 有源层（108）沉积在第一覆层（106）上。 第二覆层（109）沉积在有源层（108）上。 第二堆叠反射镜（111）沉积在具有由含有有机金属（叔丁基胂）至III族有机金属（三甲基镓和三甲基铝）的V族的比例控制的碳掺杂浓度的第二包覆层上。

公开(公告)号：US5369656A

公开(公告)日：1994-11-29

申请号：US168330

申请日：1993-12-17

申请人： Donald E. Ackley ,  Chan-Long Shieh ,  Earnest J. Johnson

发明人： Donald E. Ackley ,  Chan-Long Shieh ,  Earnest J. Johnson

IPC分类号： H04B10/12 ,  H01S3/00

CPC分类号： H04B10/25

摘要： An inverted drive optical interconnect link including an optical transmitter module designed to change input bits of logical value one to output bits of logical value zero and vice-versa, an optical receiver module designed to change input bits of logical value zero to output bits of logical value one and vice-versa, and an optical waveguide connected to the transmitter module and to the receiver module so that electrical signals input to the transmitter module are faithfully reproduced at an electrical output of the receiver module.

摘要翻译： 一种反向驱动光学互连链路，包括被设计成将逻辑值1的输入比特改变为输出逻辑值零的比特的光发射机模块，反之亦然;光接收机模块，被设计为将逻辑值零的输入比特改变为逻辑的输出比特 值为1，反之亦然，以及连接到发射机模块和接收机模块的光波导，使得输入到发射机模块的电信号在接收机模块的电输出处被忠实地再现。

公开(公告)号：US5270245A

公开(公告)日：1993-12-14

申请号：US982525

申请日：1992-11-27

申请人： Craig A. Gaw ,  Chan-Long Shieh

发明人： Craig A. Gaw ,  Chan-Long Shieh

IPC分类号： H01L21/306 ,  H01L33/00 ,  H01L33/02 ,  H01L33/38 ,  H01L33/40 ,  H01L21/20 ,  H01L21/203

CPC分类号： H01L33/38 ,  H01L21/30612 ,  H01L33/0062 ,  H01L2933/0016 ,  H01L33/02 ,  H01L33/40

摘要： A method of forming a III-V semiconductor device (10, 20) utilizes a III-V semiconductor substrate (11) having a plurality of III-V semiconductor layers (12, 14, 15, 16, 17). A pattern layer ( 19, 24) is formed on the plurality of layers (12, 14, 15, 16, 17). The plurality of III-V semiconductor layers (12, 14, 15, 16, 17) is etched with an isotropic etch that does not etch the pattern layer (19, 24). The isotropic etch undercuts the pattern layer (19, 24) and exposes an area for forming ohmic contacts on the plurality of III-V semiconductor layers. The pattern layer (19, 24) is used as a mask while depositing ohmic contact material (22, 23, 28) onto the area for forming ohmic contacts.

摘要翻译： 形成III-V半导体器件（10,20）的方法利用具有多个III-V半导体层（12,14,15,16,17）的III-V半导体衬底（11）。 在多个层（12,14,15,16,17）上形成图形层（19,24）。 通过不蚀刻图案层（19,24）的各向同性蚀刻蚀刻多个III-V半导体层（12,14,15,16,17）。 各向同性蚀刻使图案层（19,24）下切，并在多个III-V半导体层上露出用于形成欧姆接触的区域。 将图形层（19,24）用作掩模，同时将欧姆接触材料（22,23,28）沉积在用于形成欧姆接触的区域上。

公开(公告)号：US09947704B1

公开(公告)日：2018-04-17

申请号：US15296586

申请日：2016-10-18

申请人： Chan-Long Shieh ,  Gang Yu ,  Guangming Wang

发明人： Chan-Long Shieh ,  Gang Yu ,  Guangming Wang

IPC分类号： H01L27/146

CPC分类号： H01L27/14616 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14658 ,  H01L27/14689 ,  H01L27/1469 ,  H01L27/14692

摘要： A method of fabricating a structure including a high mobility backplane and a-Si photodiode imager includes forming a matrix of metal oxide thin film transistors on the surface of a rigid support member, depositing a planarizing layer on the matrix of transistors that is either porous or permissive/diffusive to oxygen at temperatures below approximately 200° C., and fabricating a matrix of passivated a-Si photodiodes over the matrix of transistors and electrically connected one each photodiode to each of the transistors. A continuous path is provided through the planarizing layer from the exterior of the structure to each of the transistors and the structure is annealed at a temperature below 200° C. in an oxygen ambient to move oxygen from the oxygen ambient to an active layer of each of the transistors and repair loss of oxygen damage to the transistors caused by the fabrication of the passivated a-Si photodiodes.

公开(公告)号：US20170033227A1

公开(公告)日：2017-02-02

申请号：US15225592

申请日：2016-08-01

申请人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

发明人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L23/00 ,  H01L23/31 ,  H01L29/49

CPC分类号： H01L29/7869 ,  H01L21/321 ,  H01L21/324 ,  H01L21/383 ,  H01L21/428 ,  H01L21/44 ,  H01L21/47635 ,  H01L21/477 ,  H01L21/823418 ,  H01L23/3171 ,  H01L23/564 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.

摘要翻译： 一种方法，包括提供具有栅极的衬底，与栅极相邻的栅极绝缘体材料层和位于与栅极相对的栅极绝缘体上的金属氧化物半导体材料层，形成选择性图案化的蚀刻停止钝化层并在高温下加热 在含氧或含氮或惰性气氛中选择性地增加未被蚀刻停止层覆盖的金属氧化物半导体的区域中的载流子浓度，其上形成有上层和间隔开的源极/漏极金属。 随后在含氧或含氮或惰性气氛中加热晶体管，以进一步改善源极/漏极接触，并将阈值电压调节到期望的水平。 在晶体管的顶部提供额外的钝化层，具有电气绝缘和对周围环境中的潮湿和化学物质的阻隔性能。

公开(公告)号：US09520437B2

公开(公告)日：2016-12-13

申请号：US14460054

申请日：2014-08-14

申请人： Chan-Long Shieh ,  Gang Yu

发明人： Chan-Long Shieh ,  Gang Yu

IPC分类号： H01L27/00 ,  H01L27/146 ,  H01L27/30 ,  H01L51/42

CPC分类号： H01L27/14663 ,  H01L27/14612 ,  H01L27/14658 ,  H01L27/14692 ,  H01L27/308 ,  H01L51/4293

摘要： A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on the etch stop layer to form a sensor plane. Separating the stack into an array of PIN photodiodes. Depositing a layer of insulating material on the array to form a planarized surface and forming vias through the insulating layer into communication with an upper surface of each photodiode and forming metal contacts on the planarized surface through the vias in contact with each photodiode. Fabricating an array of MOTFTs in an active pixel sensor configuration backplane on the planarized surface and in electrical communication with the contacts, to provide a sensor plane/MOTFT backplane interconnected combination. Attaching a flexible support carrier to the MOTFT backplane and removing the glass substrate. A scintillator is then laminated on the array of photodiodes.

摘要翻译： 一种制造X射线成像仪的方法，包括以下步骤：在玻璃衬底上形成蚀刻停止层，并在蚀刻停止层上淀积一叠半导体层以形成传感器平面。 将堆叠分成PIN光电二极管阵列。 在阵列上沉积绝缘材料层以形成平坦化表面，并且通过绝缘层形成通孔，与每个光电二极管的上表面连通，并通过与每个光电二极管接触的通孔在平坦化表面上形成金属触点。 在平坦化表面上的有源像素传感器配置底板中和与触点电连通的MOTFT阵列制造，以提供传感器平面/ MOTFT背板互连的组合。 将柔性支撑载体安装到MOTFT背板上，并拆下玻璃基板。 然后将闪烁体层压在光电二极管阵列上。

公开(公告)号：US09412623B2

公开(公告)日：2016-08-09

申请号：US14833462

申请日：2015-08-24

申请人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

发明人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

IPC分类号： H01L21/383 ,  H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L23/00 ,  H01L21/8234 ,  H01L21/4763 ,  H01L21/324 ,  H01L21/321 ,  H01L21/477 ,  H01L21/428 ,  H01L29/45

CPC分类号： H01L29/7869 ,  H01L21/321 ,  H01L21/324 ,  H01L21/383 ,  H01L21/428 ,  H01L21/44 ,  H01L21/47635 ,  H01L21/477 ,  H01L21/823418 ,  H01L23/3171 ,  H01L23/564 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.

摘要翻译： 一种方法，包括提供具有栅极的衬底，与栅极相邻的栅极绝缘体材料层和位于与栅极相对的栅极绝缘体上的金属氧化物半导体材料层，形成选择性图案化的蚀刻停止钝化层并在高温下加热 在含氧或含氮或惰性气氛中选择性地增加未被蚀刻停止层覆盖的金属氧化物半导体的区域中的载流子浓度，其上形成有上层和间隔开的源极/漏极金属。 随后在含氧或含氮或惰性气氛中加热晶体管，以进一步改善源极/漏极接触并将阈值电压调节到所需的电平。 在晶体管的顶部提供额外的钝化层，具有电气绝缘和对周围环境中的潮湿和化学物质的阻隔性能。

公开(公告)号：US20160204278A1

公开(公告)日：2016-07-14

申请号：US15080231

申请日：2016-03-24

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L29/78696 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A method of fabricating MO TFTs includes positioning opaque gate metal on a transparent substrate to define a gate area. Depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Depositing etch stop material on the semiconductor material. Positioning photoresist defining an isolation area in the semiconductor material, the etch stop material and the photoresist being selectively removable. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

摘要翻译： 一种制造MO TFT的方法包括将不透明栅极金属定位在透明基板上以限定栅极区域。 覆盖栅极金属和周围区域的沉积栅介质材料，以及在其上沉积金属氧化物半导体材料。 在半导体材料上沉积蚀刻停止材料。 定义在半导体材料中限定隔离区域的光致抗蚀剂，蚀刻停止材料和光致抗蚀剂可选择性地移除。 从基板的后表面露出光致抗蚀剂，除去暴露的部分以使蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。 蚀刻半导体材料的未覆盖部分以隔离TFT。 使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。 沉积和图案化导电材料以形成源区和漏区。

公开(公告)号：US20160049441A1

公开(公告)日：2016-02-18

申请号：US14460054

申请日：2014-08-14

申请人： Chan-Long Shieh ,  Gang Yu

发明人： Chan-Long Shieh ,  Gang Yu

IPC分类号： H01L27/146

CPC分类号： H01L27/14663 ,  H01L27/14612 ,  H01L27/14658 ,  H01L27/14692 ,  H01L27/308 ,  H01L51/4293

摘要： A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on the etch stop layer to form a sensor plane. Separating the stack into an array of PIN photodiodes. Depositing a layer of insulating material on the array to form a planarized surface and forming vias through the insulating layer into communication with an upper surface of each photodiode and forming metal contacts on the planarized surface through the vias in contact with each photodiode. Fabricating an array of MOTFTs in an active pixel sensor configuration backplane on the planarized surface and in electrical communication with the contacts, to provide a sensor plane/MOTFT backplane interconnected combination. Attaching a flexible support carrier to the MOTFT backplane and removing the glass substrate. A scintillator is then laminated on the array of photodiodes.

摘要翻译： 一种制造X射线成像仪的方法，包括以下步骤：在玻璃衬底上形成蚀刻停止层，并在蚀刻停止层上淀积一叠半导体层以形成传感器平面。 将堆叠分成PIN光电二极管阵列。 在阵列上沉积绝缘材料层以形成平坦化表面，并且通过绝缘层形成通孔，与每个光电二极管的上表面连通，并通过与每个光电二极管接触的通孔在平坦化表面上形成金属触点。 在平坦化表面上的有源像素传感器配置底板中和与触点电连通的MOTFT阵列制造，以提供传感器平面/ MOTFT背板互连的组合。 将柔性支撑载体安装到MOTFT背板上，并拆下玻璃基板。 然后将闪烁体层压在光电二极管阵列上。

公开(公告)号：US09257490B2

公开(公告)日：2016-02-09

申请号：US14288577

申请日：2014-05-28

申请人： Chan-Long Shieh ,  Gang Yu

发明人： Chan-Long Shieh ,  Gang Yu

IPC分类号： H01J9/00 ,  H01L27/32

CPC分类号： H01L27/3218 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/322 ,  H01L27/3244 ,  H01L27/3262 ,  H01L27/3265 ,  H01L51/5284

摘要： A full-color AM OLED includes a transparent substrate, a color filter positioned on an upper surface of the substrate, and a metal oxide thin film transistor backpanel positioned in overlying relationship on the color filter and defining an array of pixels. An array of OLEDs is formed on the backpanel and positioned to emit light downwardly through the backpanel, the color filter, and the substrate in a full-color display. Light emitted by each OLED includes a first emission band with wavelengths extending across the range of two of the primary colors and a second emission band with wavelengths extending across the range of the remaining primary color. The color filter includes for each pixel, two zones separating the first emission band into two separate primary colors and a third zone passing the second emission band.

摘要翻译： 全色AM OLED包括透明基板，位于基板的上表面上的滤色器和金属氧化物薄膜晶体管背板，其位于滤色器上并且限定像素阵列。 OLED阵列形成在背板上并且定位成以全色显示器向下通过背板，滤色器和基板发光。 由每个OLED发射的光包括第一发射带，其波长在两种原色的范围内延伸，第二发射带具有延伸超过剩余原色范围的波长。 滤色器包括每个像素，将第一发射带分成两个分开的原色的两个区和通过第二发射带的第三区。