公开(公告)号：US20060140267A1

公开(公告)日：2006-06-29

申请号：US11023775

申请日：2004-12-28

申请人： Yong He ,  Siu-Wai Wu ,  Jing Chen

发明人： Yong He ,  Siu-Wai Wu ,  Jing Chen

IPC分类号： H04N11/04 ,  H04N7/12 ,  H04B1/66 ,  H04N11/02

CPC分类号： H04N19/103 ,  H04N19/115 ,  H04N19/124 ,  H04N19/152 ,  H04N19/159 ,  H04N19/172 ,  H04N19/177 ,  H04N19/51 ,  H04N19/57 ,  H04N19/61

摘要： The present invention discloses a system and method for adaptive adjustment of bit budget that favors the allocation of bits to intra coding frames (I frames). Namely, an encoder is able to dynamically adjust the bit budget for each picture type in an image sequence, thereby effecting proper usage of the available transmission bandwidth and improving the picture quality. In one embodiment, the present invention will allocate more encoding bandwidth to a current Intra coding frame when the average quantization level of inter coding frames (e.g., P and B frames) of a previous group of pictures is relatively high.

摘要翻译： 本发明公开了一种有利于对帧内编码帧（I帧）的比特分配的比特预算的自适应调整的系统和方法。 也就是说，编码器能够对图像序列中的每个图像类型的位预算进行动态调整，从而正确使用可用的传输带宽并提高图像质量。 在一个实施例中，当前一组图像的帧间编码帧（例如，P和B帧）的平均量化级别相对较高时，本发明将为当前的帧内编码帧分配更多的编码带宽。

公开(公告)号：US20060045181A1

公开(公告)日：2006-03-02

申请号：US10929976

申请日：2004-08-30

申请人： Jing Chen

发明人： Jing Chen

IPC分类号： H04N7/12 ,  H04N11/04 ,  H04B1/66 ,  H04N11/02

CPC分类号： H04N19/577 ,  H04N19/117 ,  H04N19/194

摘要： A method (50) and apparatus (40) for reducing noise in a video signal calculates (53) a discrimination value of a filter based on a magnitude difference between a current frame and a prior frame of a sequence of frames and modifies (54) the current frame using the modified discrimination value. The output of the filter is calculated as follows: g(i, j, k)=f(i, j, k)±βwherein: f (i, j, k) is the current frame input to the filter; g(i, j, k) is the current frame output from the filter; and β is the discrimination value of the filter, which is calculated as follows: β = { κδ ′ + χ , δ ′ = max ⁢ { δ , δ 0 } , δ

公开(公告)号：US06605311B2

公开(公告)日：2003-08-12

申请号：US09885693

申请日：2001-06-20

申请人： Francisco Valentino Villagran ,  Glenn James Dria ,  Herbert Thomas Young ,  John Michael Baughman ,  Jing Chen

发明人： Francisco Valentino Villagran ,  Glenn James Dria ,  Herbert Thomas Young ,  John Michael Baughman ,  Jing Chen

IPC分类号： A23J100

CPC分类号： A23F3/163 ,  A23F5/243 ,  A23J3/08 ,  A23J3/16 ,  A23L2/66 ,  A23L33/20 ,  A23V2002/00 ,  A23V2200/14 ,  A23V2300/08 ,  A23V2200/124 ,  A23V2250/54 ,  A23V2250/54252

摘要： Insoluble, denatured, heat-stable protein particles are used in food and beverage products. The particles are easily dispersible in aqueous solutions and take the form of substantially non-aggregated macro-colloids. In a hydrated state the preferred mean diameter particle size distribution of the insoluble, denatured, heat-stable particles ranges from about 0.1 microns to about 3.0 microns, with less than about 5 percent of the total number of particles exceeding about 3.0 microns in diameter. The majority of the particles are substantially spheroidal in shape and have a substantially smooth, emulsion-like organoleptic character similar to that of high-calorie fats and oils. Additionally, these particles have a degree of protein insolubility of at least about 80%, which provides processing advantages during heat treatment.

公开(公告)号：US06389582B1

公开(公告)日：2002-05-14

申请号：US08576634

申请日：1995-12-21

申请人： John Valainis ,  Robert Mark Sumner ,  Jing Chen

发明人： John Valainis ,  Robert Mark Sumner ,  Jing Chen

IPC分类号： G06F1560

CPC分类号： G06F17/5072 ,  Y10S257/903

摘要： A method for thermal driven placement begins by first computing thermal response functions for individual components for several locations on a placement surface as a preprocessing step to placement. The thermal response functions can then be used to compute junction temperatures of components quickly and accurately during placement of the components in a layout. For a given component location, the component's junction temperature is computed by summing the contributions of neighboring components with the component's own contribution. The difference between predefined junction temperatures for the components and the calculated junction temperatures can then be used to assess the merits of the placement.

摘要翻译： 用于热驱动放置的方法首先计算放置表面上的几个位置的各个组件的热响应函数，作为放置的预处理步骤。 然后可以将热响应函数用于在将部件放置在布局中时快速准确地计算部件的结温。 对于给定的组件位置，通过将相邻组件的贡献与组件自身的贡献相加来计算组件的结温。 然后可以使用组件的预定结温与计算的结温之间的差异来评估放置的优点。

公开(公告)号：US6111766A

公开(公告)日：2000-08-29

申请号：US350731

申请日：1999-07-09

申请人： Gavin Chang ,  Jing Chen ,  Ya-Hui Kuo

发明人： Gavin Chang ,  Jing Chen ,  Ya-Hui Kuo

IPC分类号： H02M7/537 ,  H02M1/12 ,  H02M3/24 ,  H02M5/40 ,  H02M7/48 ,  H02P27/06

CPC分类号： H02M1/12 ,  H02M7/53875 ,  H02M2001/0025 ,  H02M2001/385

摘要： A method is provided for compensating an output signal of an electronic device having an input end electrically connected to a feedback device and an output end electrically connected to a load. This method includes steps of (a) measuring a standard voltage V.sub.o of the load, (b) determining an input voltage V.sub.i and an input current I.sub.i of the electronic device, and (c) generating a feedback signal based on said input voltage V.sub.i. The method further includes steps of (d) determining a maximum current I.sub.max and a minimum current I.sub.min of the feedback signal passing through the feedback device, (e) defining an estimated output current I.sub.o of the electronic device based on the maximum current I.sub.max and the minimum current I.sub.min, and (f) compensating the output signal of the electronic device according to a compensating factor d determined by the standard voltage V.sub.o, the input voltage V.sub.i, the input current I.sub.i, and the estimated output current I.sub.o, of the electronic device. The estimated output current I.sub.o is calculated according to the maximum current I.sub.max and the minimum current I.sub.min by a first equation of I.sub.o =I.sub.max +kI.sub.min where k is a constant.

摘要翻译： 提供了一种用于补偿具有电连接到反馈装置的输入端和电连接到负载的输出端的电子装置的输出信号的方法。 该方法包括以下步骤：（a）测量负载的标准电压Vo，（b）确定电子设备的输入电压Vi和输入电流Ii，以及（c）基于所述输入电压Vi产生反馈信号。 该方法还包括以下步骤：（d）确定通过反馈装置的反馈信号的最大电流Imax和最小电流Imin，（e）基于最大电流Imax定义电子设备的估计输出电流Io 最小电流Imin，以及（f）根据由电子设备的标准电压Vo，输入电压Vi，输入电流Ii和估计的输出电流Io确定的补偿因子d补偿电子设备的输出信号 。 根据最大电流Imax和最小电流Imin由Io = Imax + kImin的第一等式计算估计的输出电流Io，其中k是常数。

公开(公告)号：US5942275A

公开(公告)日：1999-08-24

申请号：US958351

申请日：1997-10-27

申请人： Vincent York-Leung Wong ,  Michael Charles Schmidt ,  Jing Chen ,  David Joseph Bruno, Jr.

发明人： Vincent York-Leung Wong ,  Michael Charles Schmidt ,  Jing Chen ,  David Joseph Bruno, Jr.

IPC分类号： A23L25/10 ,  A23L1/38

CPC分类号： A23L25/10

摘要： Chocolate flavored nut spreads, especially chocolate flavored peanut butters having a milk chocolate like flavor without a bitter aftertaste and with desirable spreadability. Cocoa solids substantially free of dairy solids that are encapsulated by sugar are dispersed substantially homogeneously throughout the spread. The level of cocoa butter is also below the point where it can crystallize out (i.e., typically about 20% or less on a total fat basis).

摘要翻译： 巧克力风味坚果蔓延，特别是巧克力风味的花生酱，具有牛奶巧克力味，没有苦味，具有理想的铺展性。 基本上不含由糖包封的乳制品固体的可可固体基本均匀地分散在整个扩散中。 可可脂的含量也低于可以结晶出来的程度（即，总脂肪量通常为约20％或更少）。

公开(公告)号：US08816131B2

公开(公告)日：2014-08-26

申请号：US13154359

申请日：2011-06-06

申请人： Jing Chen ,  Heyuan Song ,  Chungu Xia ,  Zhen Li

发明人： Jing Chen ,  Heyuan Song ,  Chungu Xia ,  Zhen Li

IPC分类号： C07C41/58 ,  C07C41/50 ,  C07C41/56

CPC分类号： C07C41/50 ,  B01J31/0279 ,  B01J31/0281 ,  B01J31/0284 ,  B01J31/0288 ,  B01J31/40 ,  B01J2231/40 ,  C07C41/14 ,  C07C41/56 ,  Y02P20/126 ,  Y02P20/584 ,  C07C43/30 ,  C07C43/10

摘要： It is related to a method for preparing polyoxymethylene dimethyl ethers by a continuous acetalation reaction of trioxymethylene and methanol or methylal catalyzed by an ionic liquid. The processing apparatus used in the method includes a reaction zone, a separation zone, a catalyst regeneration zone and a product dehydration zone. A manner of circulating tubular reaction is used, resulting in a high external heat exchange efficiency, a simple structure of design and a low investment. A film evaporator is used, realizing a rapid separation and recycling of the light component, with a high separation efficiency. The separation of the catalyst solution from the crude product is simple, thereby realizing the regeneration and recycling of the catalyst.

摘要翻译： 它涉及一种通过三氯甲烷和甲醇或甲缩醛通过离子液体催化的连续缩醛反应制备聚甲醛二甲醚的方法。 该方法中使用的处理装置包括反应区，分离区，催化剂再生区和产物脱水区。 使用循环管状反应的方式，导致外部热交换效率高，设计结构简单，投资少。 使用薄膜蒸发器，实现轻组分的快速分离和再循环，分离效率高。 催化剂溶液与粗产物的分离是简单的，从而实现催化剂的再生和再循环。

公开(公告)号：US08809987B2

公开(公告)日：2014-08-19

申请号：US13699296

申请日：2010-09-08

申请人： Jing Chen ,  Li Yuan ,  Hongwei Chen ,  Chunhua Zhou

发明人： Jing Chen ,  Li Yuan ,  Hongwei Chen ,  Chunhua Zhou

IPC分类号： H01L29/47 ,  H01L21/28 ,  H01L29/20 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/7781 ,  H01L29/7786 ,  H01L29/7788 ,  H01L29/872 ,  H01L29/88 ,  H01L2224/06181 ,  H01L2924/12032 ,  H01L2924/13062 ,  H01L2924/00

摘要： Structures, devices and methods are provided for creating heterojunction AlGaN/GaN metal two-dimensional electron gas (2DEG) tunnel-junction field-effect transistors (TJ-FET). In one aspect, metal-2DEG Schottky tunnel junctions can be employed in group III-Nitride field-effect devices that enable normally-off operation, large breakdown voltage, low leakage current, and high on/off current ratio. As a further advantage, AlGaN/GaN metal-2DEG TJ-FETs are disclosed that can be fabricated in a lateral configuration and/or a vertical configuration. Further non-limiting embodiments are provided that illustrate the advantages and flexibility of the disclosed structures.

摘要翻译： 提供了用于产生异质结AlGaN / GaN金属二维电子气（2DEG）隧道结场效应晶体管（TJ-FET）的结构，器件和方法。 在一方面，金属2DEG肖特基隧道结可以用于能够进行常关断操作，大的击穿电压，低漏电流和高导通/截止电流比的III-N型氮化物场效应器件中。 作为另外的优点，公开了可以以横向配置和/或垂直配置制造的AlGaN / GaN金属2DEG TJ-FET。 提供了另外的非限制性实施例，其示出了所公开的结构的优点和灵活性。

公开(公告)号：US20130152033A1

公开(公告)日：2013-06-13

申请号：US13696401

申请日：2011-09-23

申请人： Zhan Chai ,  Jing Chen ,  Jiexin Luo ,  Qingqing Wu ,  Xi Wang

发明人： Zhan Chai ,  Jing Chen ,  Jiexin Luo ,  Qingqing Wu ,  Xi Wang

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5036 ,  H01L22/20

摘要： The present invention provides a Technology Computer Aided Design (TCAD) emulation calibration method of a Silicon On Insulator (SOI) field effect transistor, where process emulation Metal Oxide Semiconductor (MOS) device structures with different channel lengths Lgate are obtained by establishing a TCAD process emulation program; based on the process emulation MOS device structures, the process emulation MOS device structures are calibrated according to a Transmission Electron Microscope (TEM) test result, a secondary ion mass spectrometer (SIMS) test result, a Capacitor Voltage (CV) test result, a WAT test result, and a square resistance test result of an actual device, so as to complete TCAD emulation calibration of key electrical parameters of an SOI field effect transistor. Through the calibration method consistent with the present invention, in the same SOI process, TCAD emulation results of key parameters Vt and Idsat of MOSFETs of different sizes all meet a high-precision requirement that an error is less than 10%; moreover, accurate and effective pretest can be implement in the case of multiple splits, thereby providing effective guidance for research, development and optimization of a new process flow.

摘要翻译： 本发明提供了一种硅绝缘体（SOI）场效应晶体管的技术计算机辅助设计（TCAD）仿真校准方法，其中通过建立TCAD工艺获得具有不同沟道长度Lgate的工艺仿真金属氧化物半导体（MOS）器件结构 仿真程序; 基于过程仿真MOS器件结构，根据透射电子显微镜（TEM）测试结果，二次离子质谱仪（SIMS）测试结果，电容器电压（CV）测试结果， WAT测试结果和实际器件的方形电阻测试结果，以完成SOI场效应晶体管关键电参数的TCAD仿真校准。 通过与本发明一致的校准方法，在相同的SOI工艺中，不同尺寸的MOSFET的关键参数Vt和Idsat的TCAD仿真结果均满足误差小于10％的高精度要求; 此外，在多次拆分的情况下可以实现准确有效的预测试，从而为新工艺流程的研究，开发和优化提供有力的指导。

公开(公告)号：US08461651B2

公开(公告)日：2013-06-11

申请号：US13002303

申请日：2010-12-16

申请人： Xiaolu Huang ,  Xing Wei ,  Xinhong Cheng ,  Jing Chen ,  Miao Zhang ,  Xi Wang

发明人： Xiaolu Huang ,  Xing Wei ,  Xinhong Cheng ,  Jing Chen ,  Miao Zhang ,  Xi Wang

IPC分类号： H01L29/00

CPC分类号： H01L21/84 ,  H01L27/0255 ,  H01L27/1203

摘要： The present invention discloses an ESD protection structure in a SOI CMOS circuitry. The ESD protection structure includes a variety of longitudinal (vertical) PN junction structures having significantly enlarged junction areas for current flow. The resulting devices achieve increased heavy current release capability. Processes of fabricating varieties of the ESD protection longitudinal PN junction are also disclosed. Compatibility of the disclosed fabrication processes with current SOI technology reduces implementation cost and improves the integration robustness.

摘要翻译： 本发明公开了一种SOI CMOS电路中的ESD保护结构。 ESD保护结构包括各种纵向（垂直）PN结结构，其具有用于电流的显着扩大的接合面积。 所得到的装置实现了增加的大电流释放能力。 还公开了制造ESD保护纵向PN结的品种的工艺。 所公开的制造工艺与当前SOI技术的兼容性降低了实施成本并提高了集成度。