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    Methods Of Reading And Using Memory Cells
    73.
    发明申请
    Methods Of Reading And Using Memory Cells 有权
    阅读和使用记忆单元的方法

    公开(公告)号：US20120218810A1

    公开(公告)日：2012-08-30

    申请号：US13463794

    申请日：2012-05-03

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: G11C11/00 ,  G11C7/00

    CPC classification number: G11C13/004 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0061 ,  G11C2013/0052 ,  G11C2213/72

    Abstract: Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.

    Abstract translation: 一些实施例包括读取存储器单元的方法。 存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。 在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。 在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

    Memory cell structures and methods
    74.
    发明授权
    Memory cell structures and methods 有权
    记忆体结构和方法

    公开(公告)号：US08228730B2

    公开(公告)日：2012-07-24

    申请号：US12872368

    申请日：2010-08-31

    Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

    Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

    IPC: G11C16/04 ,  H01L29/788

    CPC classification number: G11C16/0416 ,  G11C16/0483

    Abstract: Memory cell structures and methods are described herein. One or more memory cells include a transistor having a charge storage node, a dielectric material positioned between the charge storage node and a channel region of the transistor, the channel region positioned between a source region and a drain region, and a first electrode of a diode coupled to the charge storage node.

    Abstract translation: 本文描述了存储单元结构和方法。 一个或多个存储单元包括具有电荷存储节点的晶体管，位于电荷存储节点和晶体管的沟道区之间的电介质材料，位于源区和漏区之间的沟道区，以及位于源区和漏区之间的第一电极 耦合到电荷存储节点的二极管。

    Methods of self-aligned growth of chalcogenide memory access device
    75.
    发明授权
    Methods of self-aligned growth of chalcogenide memory access device 有权
    硫属化物存储器存取装置的自对准生长方法

    公开(公告)号：US08198124B2

    公开(公告)日：2012-06-12

    申请号：US12652576

    申请日：2010-01-05

    Applicant: Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    Inventor： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    IPC: H01L21/00

    CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

    Abstract translation: 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

    High-performance diode device structure and materials used for the same
    76.
    发明授权
    High-performance diode device structure and materials used for the same 有权
    高性能二极管器件的结构和材料使用相同

    公开(公告)号：US08120134B2

    公开(公告)日：2012-02-21

    申请号：US12580013

    申请日：2009-10-15

    Applicant: Gurtej Sandhu ,  Bhaskar Srinivasan

    Inventor： Gurtej Sandhu ,  Bhaskar Srinivasan

    IPC: H01L31/058 ,  H01L29/06

    CPC classification number: H01L29/24 ,  H01L27/24 ,  H01L45/00

    Abstract: A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.

    Abstract translation: 包括二极管的二极管和存储器件，其中二极管包括导电部分和由第一材料形成的另一部分，该第一材料具有允许在向材料施加电压时第一次降低材料的电阻率的特性，从而允许电流 流过其中，并且具有允许第一材料的电阻率响应于第一材料的温度升高而第二次降低的特征。

    SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME
    77.
    发明申请
    SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME 有权
    包括打开体积的选择装置，包括其的记忆装置和系统及其形成方法

    公开(公告)号：US20110298007A1

    公开(公告)日：2011-12-08

    申请号：US13211036

    申请日：2011-08-16

    Applicant: Bhaskar Srinivasan ,  Gurtej S. Sandhu

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L29/88 ,  H01L21/3205

    CPC classification number: H01L29/88 ,  H01L21/3205 ,  H01L27/1021 ,  Y10S438/957

    Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.

    Abstract translation: 公开了包括用作具有低介电常数的高带隙材料的开放体积的装置。 开放体积可以在选择装置中提供更非线性的非对称I-V曲线和增强的整流行为。 选择装置可以包括例如金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 可以使用各种方法来形成包括这种选择装置的选择装置和存储器系统。 存储器件和电子系统包括这样的选择器件。

    Pre-dropping of a packet if its time-to-live (TTL) value is not large enough to reach a destination
    78.
    发明授权
    Pre-dropping of a packet if its time-to-live (TTL) value is not large enough to reach a destination 有权
    如果数据包的生存时间（TTL）值不足以达到目的地，则丢弃数据包

    公开(公告)号：US08036220B2

    公开(公告)日：2011-10-11

    申请号：US12185109

    申请日：2008-08-03

    Applicant: Karthik Dakshinamoorthy ,  Bhaskar Srinivasan

    Inventor： Karthik Dakshinamoorthy ,  Bhaskar Srinivasan

    IPC: H04L12/28 ,  H04L12/56 ,  G06F15/173

    CPC classification number: H04L12/1886 ,  H04L47/10

    Abstract: A packet is pre-dropped if its Time-To-Live (TTL) value is not large enough to reach a destination, such as, but not limited to, its destination if it is a unicast packet, or at least one more destination for a multicast packet. A packet switching device maintains associations between (a) nearest receiving node distances and (b) prefixes or complete addresses. If a packet does not have enough TTL to reach an intended recipient identified by a corresponding nearest receiving node distance, then the packet is dropped even though the TTL has not expired. In this manner, some bandwidth and other network resources are not wasted on traffic that will timeout via the TTL mechanism before reaching a subsequent intended recipient.

    Abstract translation: 如果分组的生存时间（TTL）值不够大以达到目的地（例如但不限于其目的地，如果它是单播分组）或至少一个更多的目的地，则分组是预先丢弃的 一个组播数据包。 分组交换设备保持（a）最近的接收节点距离和（b）前缀或完整地址之间的关联。 如果分组没有足够的TTL来达到由对应的最近接收节点距离标识的预期接收者，则即使TTL未过期，分组也被丢弃。 以这种方式，一些带宽和其他网络资源不会浪费在通过TTL机制超时到达后续预期接收者的流量上。

    METHODS OF SELF-ALIGNED GROWTH OF CHALCOGENIDE MEMORY ACCESS DEVICE
    79.
    发明申请
    METHODS OF SELF-ALIGNED GROWTH OF CHALCOGENIDE MEMORY ACCESS DEVICE 有权
    CHALCOGENIDE MEMORY ACCESS DEVICE的自对准生长方法

    公开(公告)号：US20110165728A1

    公开(公告)日：2011-07-07

    申请号：US12652576

    申请日：2010-01-05

    Applicant: Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    Inventor： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

    IPC: H01L21/06

    CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

    Abstract translation: 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

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