公开(公告)号：US20220406356A1

公开(公告)日：2022-12-22

申请号：US17350757

申请日：2021-06-17

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Jahanshir J. Javanifard

IPC: G11C11/4074 ,  G11C11/4072 ,  G11C11/408 ,  G11C11/4096

Abstract: Methods, systems, and devices for cell data bulk reset are described. In some examples, a logic state (e.g., a first logic state) may be written to one or more memory cells based on an associated memory device transitioning power states. To write the first logic state to the memory cells, a first subset of digit lines may be driven to a first voltage and a plate may be driven to a second voltage. While the digit lines and plate are driven to the respective voltages, one or more word lines may be driven to the second voltage. In some instances, the word lines may be driven to the second voltage based on charge sharing occurring between adjacent word lines.

公开(公告)号：US20220406355A1

公开(公告)日：2022-12-22

申请号：US17350771

申请日：2021-06-17

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Jahanshir J. Javanifard

IPC: G11C11/22

Abstract: Methods, systems, and devices for cell data bulk reset are described. In some examples, a write pulse may be applied to one or more memory cells based on an associated memory device transitioning power states. To apply the wire pulse, a first subset of digit lines may be driven to a first voltage and a plate may be driven to a second voltage or a third voltage. While the digit lines and plate are driven to the respective voltages, one or more word lines may be driven to the second voltage or the third voltage. In some instances, the digit lines may be selected (e.g., driven) according to a pattern.

公开(公告)号：US11430522B2

公开(公告)日：2022-08-30

申请号：US17068000

申请日：2020-10-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Silvia Beltrami ,  Angelo Visconti

IPC: G11C16/00 ,  G11C16/10 ,  G11C16/12 ,  G11C16/34

Abstract: Memory devices might include a controller configured to cause the memory device to apply a first plurality of incrementally increasing programming pulses to control gates of a particular plurality of memory cells selected for programming to respective intended data states, determine a first occurrence of a criterion being met, store a representation of a voltage level corresponding to a particular programming pulse in response to the first occurrence of the criterion being met, set a starting programming voltage for a second plurality of incrementally increasing programming pulses in response to the stored representation of the voltage level corresponding to the particular programming pulse, and apply the second plurality of incrementally increasing programming pulses to control gates of a different plurality of memory cells selected for programming to respective intended data states.

公开(公告)号：US20210304812A1

公开(公告)日：2021-09-30

申请号：US16834941

申请日：2020-03-30

Applicant: Micron Technology, Inc.

Inventor： Andrea Locatelli ,  Giorgio Servalli ,  Angelo Visconti

IPC: G11C11/4096 ,  G11C11/22 ,  G11C11/406 ,  G11C11/4091 ,  G11C11/4097

Abstract: Methods, systems, and devices for biasing a memory cell during a read operation are described. For example, a memory device may bias a memory cell to a first voltage (e.g., a read voltage) during an activation phase of a read operation. After biasing the memory cell to the first voltage, the memory device may bias the memory cell to a second voltage greater than the first voltage (e.g., a write voltage) during the activation phase of the read operation. After biasing the memory cell to the second voltage, the memory device may initiate a refresh phase of the read operation. Based on a value stored by the memory cell prior to biasing the memory cell to the first voltage, the memory device may initiate a precharge phase of the read operation.

公开(公告)号：US10811098B2

公开(公告)日：2020-10-20

申请号：US16525804

申请日：2019-07-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Silvia Beltrami ,  Angelo Visconti

IPC: G11C16/10 ,  G11C16/12 ,  G11C16/34

Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.

公开(公告)号：US10074432B2

公开(公告)日：2018-09-11

申请号：US14856105

申请日：2015-09-16

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Silvia Beltrami ,  Angelo Visconti

IPC: G11C16/10 ,  G11C16/12 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C16/12 ,  G11C16/3459 ,  G11C16/3463 ,  G11C16/3468 ,  G11C16/3486 ,  G11C16/3495

Abstract: Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.

公开(公告)号：US09183941B2

公开(公告)日：2015-11-10

申请号：US14584628

申请日：2014-12-29

Applicant: Micron Technology, Inc.

Inventor： Gian Pietro Vanalli ,  Stefano Corno ,  Giovanni Campardo ,  Angelo Visconti ,  Silvia Beltrami ,  Alexey Petrushin

IPC: G11C11/34 ,  G11C11/00 ,  H05B3/00 ,  H01L23/34 ,  G11C16/34 ,  G11C16/26

CPC classification number: G11C16/26 ,  G11C11/00 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3431 ,  H01L23/345 ,  H01L2924/0002 ,  H05B3/00 ,  H01L2924/00

Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.

公开(公告)号：US20150149838A1

公开(公告)日：2015-05-28

申请号：US14612103

申请日：2015-02-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Aswin Thiruvengadam ,  Angelo Visconti ,  Mauro Bonanomi ,  Richard E. Fackenthal ,  William Melton

IPC: G06F3/06

CPC classification number: G06F11/1008 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0673 ,  G06F3/0679 ,  G06F11/0751 ,  G06F11/1048 ,  G06F11/1666 ,  G11C7/1006 ,  G11C7/1012 ,  G11C13/0004 ,  G11C13/0069 ,  G11C16/10 ,  G11C19/00

Abstract: This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.

Abstract translation: 本公开涉及通过将要编程的数据移动到存储器以避免硬错误而避免在写入时间期间的存储器中的硬错误。 在一个实现中，将数据编程到存储器阵列的方法包括获得与所选择的存储器单元相对应的错误数据，移位数据模式，使得所选存储器单元要存储的值与硬错误相关联的值匹配，以及 将移位的数据模式编程到存储器阵列，使得编程到所选择的存储器单元的值与与硬错误相关联的值匹配。

公开(公告)号：US20130258774A1

公开(公告)日：2013-10-03

申请号：US13902402

申请日：2013-05-24

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Mattia Robustelli ,  Silvia Beltrami ,  Laura Tatiana Czeppel ,  Massimo Ernesto Bertuccio

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C16/3495 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3459

Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device.

Abstract translation: 本文公开的主题涉及存储器件，更具体地涉及写入存储器件的性能。