公开(公告)号：US08003483B2

公开(公告)日：2011-08-23

申请号：US12399047

申请日：2009-03-06

申请人： Hideomi Suzawa ,  Shinya Sasagawa ,  Akihisa Shimomura ,  Junpei Momo ,  Motomu Kurata ,  Taiga Muraoka ,  Kosei Nei

发明人： Hideomi Suzawa ,  Shinya Sasagawa ,  Akihisa Shimomura ,  Junpei Momo ,  Motomu Kurata ,  Taiga Muraoka ,  Kosei Nei

IPC分类号： H01L21/76

CPC分类号： H01L21/76254

摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.

摘要翻译： 在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层， 通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层， 所述支撑基板对残留在所述单晶半导体层上的所述脆性区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理， 具有激光的晶体半导体层。

公开(公告)号：US07969012B2

公开(公告)日：2011-06-28

申请号：US12731824

申请日：2010-03-25

申请人： Shinya Sasagawa

发明人： Shinya Sasagawa

IPC分类号： H01L23/52

CPC分类号： H01L21/76804 ,  H01L23/485 ,  H01L27/124 ,  H01L29/41733 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed. A semiconductor device includes a semiconductor layer formed over an insulating substrate; a first insulating layer formed over the semiconductor layer; a gate electrode formed over the first insulating layer; a second insulating layer formed over the gate electrode; an opening which reaches the semiconductor layer and is formed at least in the first insulating layer and the second insulating layer; and a step portion formed at a side surface of the second insulating layer in the opening.

摘要翻译： 提出一种容易制造半导体器件的方法，其中防止了源电极或漏电极的厚度变化或断开。 半导体器件包括形成在绝缘基板上的半导体层; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅电极; 形成在所述栅电极上的第二绝缘层; 至少形成在所述第一绝缘层和所述第二绝缘层中的至少形成在所述半导体层上的开口部; 以及形成在所述开口中的所述第二绝缘层的侧表面处的台阶部。

公开(公告)号：US07875506B2

公开(公告)日：2011-01-25

申请号：US11663809

申请日：2005-10-07

申请人： Shinya Sasagawa ,  Shigeharu Monoe

发明人： Shinya Sasagawa ,  Shigeharu Monoe

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  H01L21/31116 ,  H01L27/1214 ,  H01L29/78621

摘要： The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device comprises steps of forming a conductive layer electrically connecting to a transistor, an insulating layer covering the conductive layer, and a mask formed over the insulating layer; and etching the insulating layer with a processing gas including a hydrogen bromide gas.

摘要翻译： 本发明公开了选择性地蚀刻含有硅氧烷的层的技术。 本发明提供一种半导体器件，其由于蚀刻失效而导致操作劣化减小。 一种制造半导体器件的方法包括以下步骤：形成电连接到晶体管的导电层，覆盖导电层的绝缘层和形成在绝缘层上的掩模; 并用包括溴化氢气体的处理气体蚀刻绝缘层。

公开(公告)号：US20090325364A1

公开(公告)日：2009-12-31

申请号：US12490431

申请日：2009-06-24

申请人： Shinya Sasagawa ,  Motomu Kurata

发明人： Shinya Sasagawa ,  Motomu Kurata

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： To provide a technical means which is capable of increasing crystallinity and planarity of a single crystal semiconductor layer, crystal defects are reduced in such a manner that a single crystal semiconductor substrate, in which an insulating film is formed on its surface and an embrittlement region is formed in a region at a predetermined depth from the surface, and a supporting substrate are attached to each other with the insulating film interposed therebetween; the single crystal semiconductor substrate is separated in the embrittlement region by a heat treatment; a single crystal semiconductor layer is irradiated with laser light over the supporting substrate with the insulating film interposed therebetween; a surface of the single crystal semiconductor layer is etched; and a plasma treatment is performed on the surface of the single crystal semiconductor layer.

摘要翻译： 为了提供能够提高单晶半导体层的结晶性和平坦性的技术手段，晶体缺陷以这样的方式被降低，即在其表面上形成绝缘膜和脆化区域的单晶半导体衬底是 形成在距离表面预定深度的区域中，并且支撑衬底彼此连接，绝缘膜插入其间; 通过热处理在脆化区域中分离单晶半导体衬底; 将单晶半导体层用激光照射在支撑基板上，绝缘膜插入其间; 蚀刻单晶半导体层的表面; 在单晶半导体层的表面进行等离子体处理。

公开(公告)号：US20070264825A1

公开(公告)日：2007-11-15

申请号：US11663809

申请日：2005-10-07

申请人： Shinya Sasagawa ,  Shigeharu Monoe

发明人： Shinya Sasagawa ,  Shigeharu Monoe

IPC分类号： H01L21/44 ,  H01L21/3065

CPC分类号： H01L27/1288 ,  H01L21/31116 ,  H01L27/1214 ,  H01L29/78621

摘要： The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device comprises steps of forming a conductive layer electrically connecting to a transistor, an insulating layer covering the conductive layer, and a mask formed over the insulating layer; and etching the insulating layer with a processing gas including a hydrogen bromide gas.

摘要翻译： 本发明公开了选择性地蚀刻含有硅氧烷的层的技术。 本发明提供一种半导体器件，其由于蚀刻失效而导致操作劣化减小。 一种制造半导体器件的方法包括以下步骤：形成电连接到晶体管的导电层，覆盖导电层的绝缘层和形成在绝缘层上的掩模; 并用包括溴化氢气体的处理气体蚀刻绝缘层。

公开(公告)号：US07172931B2

公开(公告)日：2007-02-06

申请号：US10777117

申请日：2004-02-13

申请人： Shigeharu Monoe ,  Takashi Yokoshima ,  Shinya Sasagawa

发明人： Shigeharu Monoe ,  Takashi Yokoshima ,  Shinya Sasagawa

IPC分类号： H01L21/84 ,  H01L21/3205

CPC分类号： H01L29/78621 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78627

摘要： It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristic with high yield. In a method for manufacturing a semiconductor device according to the present invention, a semiconductor layer is formed, a gate insulating film is formed on the semiconductor film, a first conductive layer is formed on the gate insulating film, a second conductive layer is formed on the first conductive layer, the first conductive layer and the second conductive layer are etched to form a first conductive-layer pattern, the second conductive layer in the first conductive-layer pattern is selectively etched with plasma of boron trichloride, chlorine, and oxygen to form a second conductive-layer pattern, and a first impurity region and a second impurity region are formed in the semiconductor layer.

摘要翻译： 本发明的目的是提高蚀刻工艺中的选择比，并且提供一种制造具有良好均匀特性且高产率的半导体器件的方法。 在根据本发明的半导体器件的制造方法中，形成半导体层，在半导体膜上形成栅极绝缘膜，在栅极绝缘膜上形成第一导电层，在第二导电层上形成第二导电层 蚀刻第一导电层，第一导电层和第二导电层以形成第一导电层图案，用三氯化硼，氯和氧的等离子体选择性地蚀刻第一导电层图案中的第二导电层， 形成第二导电层图案，并且在半导体层中形成第一杂质区和第二杂质区。

公开(公告)号：US09437454B2

公开(公告)日：2016-09-06

申请号：US13161871

申请日：2011-06-16

申请人： Motomu Kurata ,  Shinya Sasagawa ,  Fumika Taguchi ,  Yoshinori Ieda

发明人： Motomu Kurata ,  Shinya Sasagawa ,  Fumika Taguchi ,  Yoshinori Ieda

IPC分类号： H01L29/10 ,  H01L21/3213 ,  H01L27/12

CPC分类号： H01L27/1288 ,  H01L21/31053 ,  H01L21/32135 ,  H01L21/32139 ,  H01L21/486 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/535 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124

摘要： It is an object to reduce defective conduction in a wiring board or a semiconductor device whose integration degree is increased. It is another object to manufacture a highly reliable wiring board or semiconductor device with high yield. In a wiring board or a semiconductor device having a multilayer wiring structure, a conductive layer having a curved surface is used in connection between conductive layers used for the wirings. The top of a conductive layer in a lower layer exposed by removal of an insulating layer therearound has a curved surface, so that coverage of the conductive layer in the lower layer with a conductive layer in an upper layer stacked thereover can be favorable. A conductive layer is etched using a resist mask having a curved surface, so that a conductive layer having a curved surface is formed.

摘要翻译： 本发明的目的是减少集成度增加的布线板或半导体器件的导通不良。 另一个目的是以高产率制造高度可靠的布线板或半导体器件。 在具有多层布线结构的布线板或半导体器件中，具有弯曲表面的导电层用于连接用于布线的导电层。 通过去除其周围的绝缘层而暴露的下层中的导电层的顶部具有弯曲表面，使得下层中的导电层与其上层叠的上层中的导电层的覆盖率可能是有利的。 使用具有弯曲表面的抗蚀剂掩模蚀刻导电层，从而形成具有弯曲表面的导电层。

公开(公告)号：US09431545B2

公开(公告)日：2016-08-30

申请号：US13604962

申请日：2012-09-06

申请人： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Junichi Koezuka ,  Shinya Sasagawa ,  Motomu Kurata ,  Akihiro Ishizuka

发明人： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Junichi Koezuka ,  Shinya Sasagawa ,  Motomu Kurata ,  Akihiro Ishizuka

IPC分类号： H01L29/786 ,  H01L21/28 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A miniaturized transistor having high electric characteristics is provided with high yield. In a semiconductor device including the transistor, high performance, high reliability, and high productivity are achieved. In a semiconductor device including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, source and drain electrode layers are provided in contact with the oxide semiconductor film and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive film and an interlayer insulating film are stacked to cover the oxide semiconductor film, the sidewall insulating layers, and the gate electrode layer, and the interlayer insulating film and the conductive film over the gate electrode layer are removed by a chemical mechanical polishing method, so that the source and drain electrode layers are formed.

摘要翻译： 提供具有高电特性的小型化晶体管，其产率高。 在包括晶体管的半导体器件中，实现了高性能，高可靠性和高生产率。 在包括晶体管的半导体器件中，依次堆叠其中设置有侧壁绝缘层的侧表面上的氧化物半导体膜，栅极绝缘膜和栅极电极层的晶体管，源极和漏极电极层被设置为与 氧化物半导体膜和侧壁绝缘层。 在制造半导体器件的过程中，层叠导电膜和层间绝缘膜以覆盖氧化物半导体膜，侧壁绝缘层和栅极电极层，以及栅极上的层间绝缘膜和导电膜 通过化学机械抛光方法去除层，从而形成源极和漏极电极层。

公开(公告)号：US09299852B2

公开(公告)日：2016-03-29

申请号：US13483078

申请日：2012-05-30

申请人： Kyoko Yoshioka ,  Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Shinya Sasagawa

发明人： Kyoko Yoshioka ,  Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Shinya Sasagawa

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L21/324 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L21/324 ,  H01L29/66969

摘要： A miniaturized semiconductor device in which an increase in power consumption is suppressed and a method for manufacturing the semiconductor device are provided. A highly reliable semiconductor device having stable electric characteristics and a method for manufacturing the semiconductor device are provided. An oxide semiconductor film is irradiated with ions accelerated by an electric field in order to reduce the average surface roughness of a surface of the oxide semiconductor film. Consequently, an increase in the leakage current and power consumption of a transistor can be suppressed. Moreover, by performing heat treatment so that the oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to the surface of the oxide semiconductor film, a change in electric characteristics of the oxide semiconductor film due to irradiation with visible light or ultraviolet light can be suppressed.

摘要翻译： 提供抑制功耗增加的小型化半导体装置及其制造方法。 提供了一种具有稳定电特性的高度可靠的半导体器件及其半导体器件的制造方法。 为了降低氧化物半导体膜的表面的平均表面粗糙度，用电场加速的离子照射氧化物半导体膜。 因此，可以抑制晶体管的漏电流和功耗的增加。 此外，通过进行热处理使得氧化物半导体膜包括具有与氧化物半导体膜的表面基本垂直的c轴的晶体，由于可见光或紫外线的照射而导致的氧化物半导体膜的电特性的变化 可以抑制。

公开(公告)号：US09202929B2

公开(公告)日：2015-12-01

申请号：US12972859

申请日：2010-12-20

申请人： Yasuhiro Jinbo ,  Hideomi Suzawa ,  Hiromichi Godo ,  Shinya Sasagawa

发明人： Yasuhiro Jinbo ,  Hideomi Suzawa ,  Hiromichi Godo ,  Shinya Sasagawa

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78696 ,  H01L29/66765 ,  H01L29/786 ,  H01L29/78663

摘要： An object is to increase the on-state current of a thin film transistor. A solution is to provide a projection in a back-channel portion of the thin film transistor. The projection is provided so as to be off a tangent in the back-channel portion between a source or a drain and a channel formation region. With the projection, a portion where electric charge is trapped and a path of the on-state current can be apart from each other, so that the on-state current can be increased. The shape of a side surface of the back-channel portion may be curved, or may be represented as straight lines in a cross section. Further, a method for forming such a shape by performing one etching step is provided.

摘要翻译： 目的是增加薄膜晶体管的导通电流。 解决方案是在薄膜晶体管的后通道部分中提供投影。 突起被设置成在源极或漏极之间的后部沟道部分和沟道形成区域之间切断切线。 通过投影，电荷被捕获的部分和导通状态电流的路径可以彼此分开，从而可以增加导通电流。 背沟道部分的侧表面的形状可以是弯曲的，或者可以在横截面中表示为直线。 此外，提供了通过执行一个蚀刻步骤来形成这种形状的方法。