公开(公告)号：US20160190175A1

公开(公告)日：2016-06-30

申请号：US15063664

申请日：2016-03-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroki Ohara ,  Toshinari Sasaki ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/1368 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/24 ,  H01L29/517 ,  H01L29/78609 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

公开(公告)号：US09318618B2

公开(公告)日：2016-04-19

申请号：US14580590

申请日：2014-12-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda

IPC: H01L29/786 ,  H01L27/088 ,  H01L29/16

CPC classification number: H01L29/7869 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78648 ,  H01L29/78696

Abstract: To provide a transistor with stable electric characteristics, provide a transistor having a small current in a non-conductive state, provide a transistor having a large current in a conductive state, provide a semiconductor device including the transistor, or provide a durable semiconductor device, a semiconductor device includes a first insulator containing excess oxygen, a semiconductor over the first insulator, a second insulator over the semiconductor, and a conductor having a region overlapping with the semiconductor with the second insulator provided therebetween. A region containing boron or phosphorus is located between the first insulator and the semiconductor.

Abstract translation: 为了提供具有稳定电特性的晶体管，提供具有非导通状态的小电流的晶体管，提供具有导通状态的大电流的晶体管，提供包括晶体管的半导体器件，或提供耐用的半导体器件， 半导体器件包括含有过量氧的第一绝缘体，在第一绝缘体上的半导体，半导体上的第二绝缘体，以及具有与半导体重叠的区域的导体，其间设置有第二绝缘体。 含有硼或磷的区域位于第一绝缘体和半导体之间。

公开(公告)号：US09293590B2

公开(公告)日：2016-03-22

申请号：US14721510

申请日：2015-05-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tadashi Nakano ,  Mai Sugikawa ,  Kosei Noda

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/0684 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/78606

Abstract: A semiconductor device of stable electrical characteristics, whose oxygen vacancies in a metal oxide is reduced, is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a first metal oxide film over the gate insulating film, a source electrode and a drain electrode which are in contact with the first metal oxide film, and a passivation film over the source electrode and the drain electrode. A first insulating film, a second metal oxide film, and a second insulating film are stacked sequentially in the passivation film.

公开(公告)号：US09082864B2

公开(公告)日：2015-07-14

申请号：US14537232

申请日：2014-11-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Kosei Noda ,  Yuta Endo

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/04

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/24 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. A p-type oxide semiconductor material is contained in an n-type oxide semiconductor film, whereby carriers which are generated in the oxide semiconductor film without intention can be reduced. This is because electrons generated in the n-type oxide semiconductor film without intention are recombined with holes generated in the p-type oxide semiconductor material to disappear. Accordingly, it is possible to reduce carriers which are generated in the oxide semiconductor film without intention.

Abstract translation: 通过对使用氧化物半导体膜的晶体管赋予稳定的电特性来制造高可靠性的半导体器件。 p型氧化物半导体材料包含在n型氧化物半导体膜中，由此可以减少在氧化物半导体膜中产生的载流子。 这是因为在n型氧化物半导体膜中产生的电子没有意图与在p型氧化物半导体材料中产生的空穴重新组合而消失。 因此，可以无意地减少在氧化物半导体膜中产生的载流子。

公开(公告)号：US09059298B2

公开(公告)日：2015-06-16

申请号：US14472618

申请日：2014-08-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroki Ohara ,  Toshinari Sasaki ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/51

Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

公开(公告)号：US20150041803A1

公开(公告)日：2015-02-12

申请号：US14451854

申请日：2014-08-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda ,  Yuichi Sato

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/467 ,  H01L29/06

CPC classification number: H01L21/02554 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/31155 ,  H01L21/461 ,  H01L21/823437 ,  H01L21/823857 ,  H01L29/0653 ,  H01L29/4908 ,  H01L29/4933 ,  H01L29/6659 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A transistor that is formed using an oxide semiconductor film is provided. A transistor that is formed using an oxide semiconductor film with reduced oxygen vacancies is provided. A transistor having excellent electrical characteristics is provided. A semiconductor device includes a first insulating film, a first oxide semiconductor film, a gate insulating film, and a gate electrode. The first insulating film includes a first region and a second region. The first region is a region that transmits less oxygen than the second region does. The first oxide semiconductor film is provided at least over the second region.

Abstract translation: 提供了使用氧化物半导体膜形成的晶体管。 提供了使用具有减少的氧空位的氧化物半导体膜形成的晶体管。 提供具有优异电特性的晶体管。 半导体器件包括第一绝缘膜，第一氧化物半导体膜，栅极绝缘膜和栅电极。 第一绝缘膜包括第一区域和第二区域。 第一区域是比第二区域透过少氧的区域。 第一氧化物半导体膜至少设置在第二区域上。

公开(公告)号：US20140367680A1

公开(公告)日：2014-12-18

申请号：US14472618

申请日：2014-08-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroki Ohara ,  Toshinari Sasaki ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/786

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/1368 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/24 ,  H01L29/517 ,  H01L29/78609 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

Abstract translation: 目的在于提供一种半导体器件，其具有可以充分降低布线之间的寄生电容的结构。 用作沟道保护层的氧化物绝缘层形成在与栅电极层重叠的氧化物半导体层的一部分上。 在与氧化物绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的周边部分的氧化物绝缘层。 设置覆盖氧化物半导体层的周边部分的氧化物绝缘层以增加栅极电极层与形成在栅电极层的上方或周围的布线层之间的距离，从而降低寄生电容。

公开(公告)号：US08637348B2

公开(公告)日：2014-01-28

申请号：US13949329

申请日：2013-07-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda ,  Toshinari Sasaki

IPC: H01L21/00

CPC classification number: H01L29/66969 ,  H01L21/02164 ,  H01L21/02367 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/66742 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/7869

Abstract: An insulating layer which releases a large amount of oxygen is used as an insulating layer in contact with a channel region of an oxide semiconductor layer, and an insulating layer which releases a small amount of oxygen is used as an insulating layer in contact with a source region and a drain region of the oxide semiconductor layer. By releasing oxygen from the insulating layer which releases a large amount of oxygen, oxygen deficiency in the channel region and an interface state density between the insulating layer and the channel region can be reduced, so that a highly reliable semiconductor device having small variation in electrical characteristics can be manufactured. The source region and the drain region are provided in contact with the insulating layer which releases a small amount of oxygen, thereby suppressing the increase of the resistance of the source region and the drain region.

Abstract translation: 使用释放大量氧的绝缘层作为与氧化物半导体层的沟道区域接触的绝缘层，并且使用释放少量氧的绝缘层作为与源极接触的绝缘层 区域和氧化物半导体层的漏极区域。 通过从释放大量氧的绝缘层释放氧气，可以减少沟道区域中的氧缺乏以及绝缘层和沟道区域之间的界面态密度，从而可以降低电子变化小的高度可靠的半导体器件 特性可以制造。 源极区域和漏极区域设置成与释放少量氧气的绝缘层接触，从而抑制源极区域和漏极区域的电阻的增加。

公开(公告)号：US20130240875A1

公开(公告)日：2013-09-19

申请号：US13793605

申请日：2013-03-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yuta Endo ,  Kosei Noda

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/7869

Abstract: A semiconductor device in which the parasitic resistance affected by a source and a drain is reduced and the parasitic capacitance is small is provided. The semiconductor device includes a pair of semiconductor layers; a semiconductor film in contact with each of the pair of semiconductor layers; a gate electrode overlapping with the semiconductor film and at least partly overlapping with the pair of semiconductor layers; and a gate insulating film between the semiconductor film and the gate electrode. A region which is in the pair of semiconductor layers and overlaps with the gate electrode and the semiconductor film has higher resistance than regions other than the region in the pair of semiconductor layers.

Abstract translation: 提供了由源极和漏极影响的寄生电阻减小并且寄生电容小的半导体器件。 半导体器件包括一对半导体层; 与所述一对半导体层中的每一个接触的半导体膜; 栅电极与所述半导体膜重叠并且与所述一对半导体层至少部分重叠; 以及在半导体膜和栅电极之间的栅极绝缘膜。 在该对半导体层中与栅电极和半导体膜重叠的区域具有比该对半导体层中的区域以外的区域更高的电阻。

公开(公告)号：US20130193434A1

公开(公告)日：2013-08-01

申请号：US13799246

申请日：2013-03-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/26

CPC classification number: H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

Abstract translation: 目的是减少用于LSI，CPU或存储器的晶体管的泄漏电流和寄生电容。 使用薄膜晶体管制造诸如LSI，CPU或存储器的半导体集成电路，其中使用氧化物半导体形成沟道形成区域，该氧化物半导体通过去除作为电子给体的杂质而成为本征或本质上的半导体 （供体），并且具有比硅半导体更大的能隙。 通过使用具有充分降低的氢浓度的高度净化的氧化物半导体层的薄膜晶体管，可以实现由于漏电流而具有低功耗的半导体器件。