公开(公告)号：US20180182834A1

公开(公告)日：2018-06-28

申请号：US15854067

申请日：2017-12-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka ,  Kei Takahashi ,  Hideaki Shishido ,  Shunpei Yamazaki

IPC: H01L27/32 ,  H01L27/02 ,  H01L51/56 ,  G09G3/20 ,  G06F3/041

CPC classification number: H01L27/3262 ,  G06F3/0412 ,  G06F2203/04101 ,  G06F2203/04103 ,  G09G3/2007 ,  G09G3/3233 ,  G09G2310/027 ,  G09G2330/04 ,  G09G2330/06 ,  G09G2354/00 ,  H01L27/0251 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/3218 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L51/56 ,  H01L2227/323

Abstract: A novel display panel that is highly convenient or reliable is provided. The display panel includes a display region, and the display region includes a first group of pixels, a second group of pixels, a third group of pixels, a fourth group of pixels, a first scan line, a second scan line, a first signal line, and a second signal line. The first group of pixels include a first pixel and are arranged in a row direction. The second group of pixels include a second pixel and are arranged in the row direction. The third group of pixels include a first pixel and are arranged in a column direction that intersects the row direction. The fourth group of pixels include a second pixel and are arranged in the column direction. The first signal line is electrically connected to the third group of pixels and the second signal line is electrically connected to the fourth group of pixels. The first scan line is electrically connected to the first group of pixels and the second scan line is electrically connected to the second group of pixels.

公开(公告)号：US20180180951A1

公开(公告)日：2018-06-28

申请号：US15841866

申请日：2017-12-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka

IPC: G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/134336 ,  G02F1/133345 ,  H01L27/32 ,  H01L27/3204 ,  H01L27/3218 ,  H01L27/3246 ,  H01L27/3258 ,  H01L27/3283 ,  H01L27/3295 ,  H01L51/5203 ,  H01L51/5212

Abstract: A display device having high display quality is provided. In the display device including a plurality of pixels, adjacent pixel electrodes are formed over different insulating layers. Accordingly, when seen in a plan view, the adjacent pixel electrodes can be close to each other without constraints of design rules. Openings (light-emitting regions) of the adjacent pixels can be close to each other, leading to an improvement in graininess of an image. With the use of a step provided between the adjacent pixel electrodes, the resistance of an EL layer across the adjacent pixels can be increased to reduce crosstalk.

公开(公告)号：US09954011B2

公开(公告)日：2018-04-24

申请号：US15381702

申请日：2016-12-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki Shishido ,  Hiroyuki Miyake ,  Kouhei Toyotaka ,  Makoto Kaneyasu

IPC: H01L27/32 ,  H01L27/12 ,  G02F1/1362 ,  H01L33/62 ,  G02F1/1343 ,  G09G3/36 ,  G09G3/20

CPC classification number: H01L27/124 ,  G02F1/134309 ,  G02F1/134336 ,  G02F1/13624 ,  G02F1/136277 ,  G02F1/136286 ,  G02F2201/52 ,  G09G3/2085 ,  G09G3/3607 ,  G09G3/3611 ,  G09G3/3659 ,  G09G2300/0465 ,  G09G2300/08 ,  H01L27/1255 ,  H01L27/3211 ,  H01L27/3213 ,  H01L27/3216 ,  H01L27/3218 ,  H01L27/323 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/326 ,  H01L27/3262 ,  H01L27/3276 ,  H01L33/62

Abstract: Provided is a display device with high resolution, high display quality, or high aperture ratio. A pixel includes three subpixels and is electrically connected to two gate lines. One of the gate lines is electrically connected to a gate of a transistor included in each of the two subpixels, and the other gate line is electrically connected to a gate of a transistor included in the other subpixel. Display elements of the three subpixels are arranged in the same direction. Three pixel electrodes of the three subpixels are arranged in the same direction.

公开(公告)号：US09939692B2

公开(公告)日：2018-04-10

申请号：US15344795

申请日：2016-11-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Kouhei Toyotaka ,  Masahiko Hayakawa ,  Daisuke Matsubayashi ,  Shinpei Matsuda

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/1343 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.

公开(公告)号：US09817520B2

公开(公告)日：2017-11-14

申请号：US14273677

申请日：2014-05-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takayuki Ikeda ,  Seiko Inoue ,  Hiroyuki Miyake ,  Kouhei Toyotaka ,  Takashi Nakagawa

IPC: G06F3/042 ,  H01L27/15 ,  G06F3/041

CPC classification number: G06F3/042 ,  G06F3/0412 ,  G06F3/0416 ,  G06F2203/04102 ,  G06F2203/04103

Abstract: A novel transmissive imaging panel, a novel imaging panel with a display function, or a novel imaging device is provided. The imaging panel that includes a plurality of windows or pixels arranged in matrix, a photoelectric conversion element extending between the plurality of windows or pixels, and a sensor circuit supplied with a signal from the photoelectric conversion element has been devised.

公开(公告)号：US09525034B2

公开(公告)日：2016-12-20

申请号：US13799246

申请日：2013-03-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/26 ,  H01L27/12 ,  H01L29/786

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US09514696B2

公开(公告)日：2016-12-06

申请号：US14959777

申请日：2015-12-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki Miyake ,  Kouhei Toyotaka ,  Shunpei Yamazaki

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0809 ,  G09G2310/0286 ,  G09G2310/0291 ,  G11C19/28 ,  H01L27/1222 ,  H01L27/124

Abstract: To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n−3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.

公开(公告)号：US09478564B2

公开(公告)日：2016-10-25

申请号：US14989927

申请日：2016-01-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kosei Noda ,  Kouhei Toyotaka ,  Kazunori Watanabe ,  Hikaru Harada

IPC: H01L29/04 ,  H01L29/12 ,  H01L29/78 ,  H01L27/12 ,  H01L27/108 ,  H01L27/11 ,  H01L49/02 ,  H01L29/786 ,  G06F15/76 ,  H01L29/24 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/7869 ,  G06F15/76 ,  H01L27/10805 ,  H01L27/10873 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1112 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L28/60 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78696

Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.

公开(公告)号：US09396812B2

公开(公告)日：2016-07-19

申请号：US14245097

申请日：2014-04-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko Amano ,  Kouhei Toyotaka ,  Hiroyuki Miyake ,  Aya Miyazaki ,  Hideaki Shishido ,  Koji Kusunoki

IPC: G11C19/00 ,  G11C19/18 ,  G11C19/28 ,  H03K19/00 ,  H01L25/03 ,  H05K7/02

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/0286 ,  G11C19/184 ,  H01L25/03 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L2924/0002 ,  H03K19/0013 ,  H05K7/02 ,  H01L2924/00

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

公开(公告)号：US09362417B2

公开(公告)日：2016-06-07

申请号：US13751753

申请日：2013-01-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC: H01L27/01 ,  H01L29/786 ,  H01L29/417

CPC classification number: H01L29/78693 ,  H01L29/41733 ,  H01L29/7869

Abstract: To provide a highly reliable semiconductor device in which a transistor including an oxide semiconductor film has stable electric characteristics. The semiconductor device includes a gate electrode layer over a substrate, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a drain electrode layer which is over the oxide semiconductor film so as to overlap with the gate electrode layer, and a source electrode layer provided so as to cover part of an outer edge portion of the oxide semiconductor film. An outer edge portion of the drain electrode layer is on an inner side than an outer edge portion of the gate electrode layer.

Abstract translation: 为了提供一种高可靠性的半导体器件，其中包括氧化物半导体膜的晶体管具有稳定的电特性。 半导体器件包括在基板上的栅极电极层，栅极电极层上的栅极绝缘膜，栅极绝缘膜上的氧化物半导体膜，位于氧化物半导体膜上方以与栅极重叠的漏极层 电极层和设置为覆盖氧化物半导体膜的外缘部的一部分的源电极层。 漏电极层的外缘部位于比栅电极层的外缘部更内侧。