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公开(公告)号：US06287959B1
公开(公告)日：2001-09-11
申请号：US09065352
申请日：1998-04-23
IPC分类号： H01L214763
CPC分类号： H01L21/0276 , H01L21/31116 , H01L21/3144 , H01L21/76802 , Y10S438/952 , Y10S438/97
摘要： Reflection of incident optical radiation from a highly reflective metal layer (12), such as aluminum, copper or titanium, into a photoresist layer (16) is reduced by interposing a layer of silicon oxynitride (14) between the metal and photoresist layers. The silicon oxynitride layer (14) is pre-treated with an oxidizing plasma to deplete surface nitrogen and condition the silicon oxynitride layer (14) to be more compatible with deep ultraviolet photoresists. The silicon oxynitride layer (14) further serves as an etch stop in the formation of interconnect openings (40), such as vias, contacts and trenches. The interconnect opening (40) is filled with a second metallization layer to achieve multi-layer electrical interconnection.
摘要翻译： 通过在金属和光致抗蚀剂层之间插入一层氮氧化硅（14），将来自诸如铝，铜或钛的高反射金属层（12）的入射光辐射反射到光致抗蚀剂层（16）中。 氮氧化硅层（14）用氧化等离子体进行预处理以消除表面氮，并且使氮氧化硅层（14）与深紫外光致抗蚀剂更相容。 氧氮化硅层（14）还用作形成互连开口（40）的蚀刻停止层，例如通路，触点和沟槽。 互连开口（40）填充有第二金属化层以实现多层电互连。
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公开(公告)号：US06270929B1
公开(公告)日：2001-08-07
申请号：US09619789
申请日：2000-07-20
IPC分类号： H01L21302
CPC分类号： H01L21/28114 , H01L21/0273 , H01L21/0338 , H01L21/31144 , H01L21/76802 , H01L29/42376
摘要： A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. A photoresist layer is formed over the insulating layer. An opening is the formed extending through the photoresist layer and partially into the insulating layer. The opening in the insulating layer extends from a top surface of the insulating layer to a first depth. The photoresist layer is swelled to reduce the size of the opening in the photoresist layer. The opening is then extended in the insulating layer from the first depth to a second depth. The opening is wider from the top surface of the insulating layer to the first depth than the opening is from the first depth to the second depth. The opening is then filled with a conductive material to form a T-gate structure.
摘要翻译： 提供了一种制造T型栅结构的方法。 提供一种结构，其具有硅层，该硅层具有栅极氧化物层，栅极氧化物层上的多晶硅层和栅极氧化物层上的绝缘层。 在绝缘层上形成光致抗蚀剂层。 开口形成为延伸穿过光致抗蚀剂层并部分地进入绝缘层。 绝缘层中的开口从绝缘层的顶表面延伸到第一深度。 光致抗蚀剂层被膨胀以减小光致抗蚀剂层中的开口的尺寸。 然后将开口在绝缘层中从第一深度延伸到第二深度。 开口从绝缘层的顶表面到比第一深度从第一深度到第二深度的第一深度更宽。 然后用导电材料填充开口以形成T形栅结构。
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73.发明授权
公开(公告)号：US6143624A
公开(公告)日：2000-11-07
申请号：US172088
申请日：1998-10-14
申请人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
发明人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
IPC分类号： H01L21/762
CPC分类号： H01L21/76235 , H01L21/76237 , Y10S438/966 , Y10S438/981
摘要： An insulated trench isolation structure is formed by ion implanting impurities proximate the trench edges to enhance the silicon oxidation rate and, hence, increase the thickness of the resulting oxide at the trench edges. Embodiments include masking and etching a barrier nitride layer, forming protective spacers on portions of the substrate corresponding to subsequently formed trench edges, etching the trench, removing the protective spacers, ion implanting impurities into those portions of the substrate previously covered by the protective spacers, and then growing an oxide liner. The resulting oxide formed on the trench edges is thick due to the enhanced silicon oxidation rate, thereby avoiding overlap of a subsequently deposited polysilicon layer and breakdown problems attendant upon a thinned gate oxide at the trench edges.
摘要翻译： 通过离子注入靠近沟槽边缘的杂质形成绝缘沟槽隔离结构，以增强硅的氧化速率，并因此增加在沟槽边缘处产生的氧化物的厚度。 实施例包括掩蔽和蚀刻阻挡氮化物层，在对应于随后形成的沟槽边缘的衬底的部分上形成保护性间隔物，蚀刻沟槽，去除保护性间隔物，将先前被保护隔离层覆盖的衬底的离子注入杂质， 然后生长氧化物衬垫。 形成在沟槽边缘上的所得氧化物由于硅氧化速率的增强而变厚，从而避免随后沉积的多晶硅层的重叠以及伴随沟槽边缘处的薄化栅极氧化物的破坏问题。
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公开(公告)号：US06057206A
公开(公告)日：2000-05-02
申请号：US410526
申请日：1999-10-01
IPC分类号： H01L23/544 , H01L21/76
CPC分类号： H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2223/54493 , H01L2924/0002
摘要： A method of forming an alignment mark protection structure is disclosed and includes forming an alignment mark protection layer over a substrate which has an alignment mark associated therewith. The method also includes forming a negative photoresist layer over the alignment mark protection layer and removing a portion of the negative photoresist layer which does not overlie the alignment mark. The removal exposes a portion of the alignment mark protection layer which does not overlie the alignment mark and the exposed portion of the alignment mark protection layer is then removed. Preferably, the removal of a portion of the negative photoresist includes selectively exposing a peripheral portion thereof using an edge-bead removal tool, thereby allowing for the formation of an alignment mark protection structure without an extra masking step.
摘要翻译： 公开了一种形成对准标记保护结构的方法，并且包括在具有与其相关联的对准标记的衬底上形成对准标记保护层。 该方法还包括在对准标记保护层上形成负光致抗蚀剂层，并且去除不覆盖对准标记的负光致抗蚀剂层的一部分。 去除暴露出不覆盖对准标记的对准标记保护层的一部分，然后去除对准标记保护层的暴露部分。 优选地，去除负光致抗蚀剂的一部分包括使用边缘珠去除工具选择性地暴露其周边部分，从而允许形成对准标记保护结构而没有额外的掩模步骤。
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公开(公告)号：US6037671A
公开(公告)日：2000-03-14
申请号：US184861
申请日：1998-11-03
申请人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
发明人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
IPC分类号： G03F9/00 , H01L23/544
CPC分类号： G03F9/7076 , G03F9/70 , H01L23/544 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S438/975
摘要： Accurate photolighographic processing is achieved employing a stepper global alignment structure enabling formation thereon of a substantially transparent layer having a substantially planar upper surface. Embodiments include a set of global alignment marks comprising spaced apart trenches, each trench segmented into a plurality of narrow trenches spaced apart by uprights and forming a dummy topographical area of narrow trenches surrounding the set of alignment marks. The segmented trenches and the dummy topographical area effectively provide a substantially uniform topography enabling deposition of a transparent layer without steps and effective local planarization. Since the upper surface of the transparent layer is substantially planar, layers of material deposited on the transparent layer during subsequent processing also have a substantially planar upper surface, thereby enabling transmission of the signal produced by the alignment marks to the stepper with minimal distortion.
摘要翻译： 使用步进全局对准结构可实现准确的视差处理，该结构能够在其上形成具有基本平坦的上表面的基本上透明的层。 实施例包括一组包括间隔开的沟槽的全局对准标记，每个沟槽被分段成由立柱间隔开的多个窄沟槽，并形成围绕该组对准标记的窄沟槽的虚拟地形区域。 分段沟槽和虚拟地形区域有效地提供基本均匀的形貌，使得能够沉积透明层而无需步骤和有效的局部平面化。 由于透明层的上表面基本上是平面的，因此在随后的处理期间沉积在透明层上的材料层也具有基本平坦的上表面，从而能够以最小的变形将由对准标记产生的信号传输到步进机。
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公开(公告)号：US5970363A
公开(公告)日：1999-10-19
申请号：US993827
申请日：1997-12-18
申请人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
发明人： Nick Kepler , Olov Karlsson , Larry Wang , Basab Bandyopadhyay , Effiong Ibok , Christopher F. Lyons
IPC分类号： H01L21/762 , H01L21/8242
CPC分类号： H01L21/76232
摘要： A shallow trench isolation structure is formed which enables the growth of a high quality gate oxide at the trench edges. Embodiments include forming a photoresist mask directly on a pad oxide layer which, in turn, is formed on a main surface of a semiconductor substrate or an epitaxial layer on a semiconductor substrate. After masking, the substrate is etched to form a trench, an oxide liner is grown in the trench surface, and a polish stop layer is deposited over the oxide liner and the pad oxide layer. The polish stop layer is then masked to the trench edges, and the polish stop in the trench etched away. The trench is then filled with an insulating material, the insulating material is planarized, and the polish stop is removed by etching. Thus, the oxide liner is allowed to grow on the trench edges without the restraint of a polish stop, resulting in a thick, rounded oxide on the trench edges. Additionally, no polish stop layer remains in the trench to cause unwanted electrical effects.
摘要翻译： 形成浅沟槽隔离结构，其能够在沟槽边缘处生长高质量的栅极氧化物。 实施例包括直接在衬垫氧化物层上形成光致抗蚀剂掩模，衬垫氧化物层又形成在半导体衬底的主表面或半导体衬底上的外延层上。 在掩模之后，蚀刻衬底以形成沟槽，在沟槽表面生长氧化物衬垫，并且抛光停止层沉积在氧化物衬垫和衬垫氧化物层上。 然后抛光停止层被掩蔽到沟槽边缘，并且沟槽中的抛光停止被蚀刻掉。 然后用绝缘材料填充沟槽，将绝缘材料平坦化，并通过蚀刻去除抛光止动件。 因此，允许氧化物衬垫在沟槽边缘上生长而不受抛光停止的限制，导致沟槽边缘上的厚的圆形氧化物。 此外，沟槽中不留下抛光停止层，引起不必要的电气效应。
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公开(公告)号：US5970362A
公开(公告)日：1999-10-19
申请号：US992488
申请日：1997-12-18
申请人： Christopher F. Lyons , Basab Bandyopadhyay , Nick Kepler , Olov Karlsson , Larry Wang , Effiong Ibok
发明人： Christopher F. Lyons , Basab Bandyopadhyay , Nick Kepler , Olov Karlsson , Larry Wang , Effiong Ibok
IPC分类号： H01L21/762 , H01L21/76
CPC分类号： H01L21/76232
摘要： An insulated trench isolation structure is formed in a semiconductor substrate omitting a barrier nitride polish stop layer, thereby simplifying the formation of the trench isolating structure, and enabling the substrate to be polished substantially flush with the trench fill. The planar trench fill-substrate interface avoids additional topography, thereby facilitating application of, and enhancing the accuracy of, photolithographic techniques in forming features with minimal dimensions.
摘要翻译： 在省略了阻挡氮化物抛光停止层的半导体衬底中形成绝缘沟槽隔离结构，从而简化了沟槽隔离结构的形成，并使衬底能够与沟槽填充基本齐平。 平面沟槽填充 - 衬底接口避免了额外的形貌，从而有助于光刻技术在最小尺寸形成特征时的应用和提高光刻技术的准确性。
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公开(公告)号：US5821036A
公开(公告)日：1998-10-13
申请号：US960105
申请日：1997-10-27
CPC分类号： G03F7/322
摘要： A method and composition for developing positive photoresists is illustrated. The developer of the present invention includes an ammonium hydroxide aqueous base and a surfactant of the fluorinated alkyl alkoxylate class most preferably present in an amount of from 10 to 30 ppm. A particularly preferred surfactant includes sulfonyl and amine moieties.
摘要翻译： 示出了用于开发正性光致抗蚀剂的方法和组合物。 本发明的显影剂包括氢氧化铵水性碱和氟化烷基烷氧基化物类的表面活性剂，最优选以10至30ppm的量存在。 特别优选的表面活性剂包括磺酰基和胺部分。
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公开(公告)号：US5227280A
公开(公告)日：1993-07-13
申请号：US754847
申请日：1991-09-04
CPC分类号： G03F7/0045 , G03F7/094
摘要： A PMGI bilayer resist for integrated circuit fabrication having increased sensitivity to light and formed by the addition of cyclic anhydrides to the resist and the formation of an accompanying bilayer resist structure of a portable conforming mask having a desirable undercut profile for lift-off of patterned metallic circuitry.
摘要翻译： 用于集成电路制造的PMGI双层抗蚀剂具有增加的光的灵敏度并通过向抗蚀剂添加环状酸酐形成，并形成具有用于剥离图案化金属的期望的底切轮廓的便携式贴合掩模的伴随双层抗蚀剂结构 电路。
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公开(公告)号：US07608855B2
公开(公告)日：2009-10-27
申请号：US10817467
申请日：2004-04-02
申请人： Christopher F. Lyons
发明人： Christopher F. Lyons
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0016 , G11C13/0069 , G11C2013/009 , G11C2213/71 , G11C2213/77 , H01L27/285 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0041 , H01L51/0042 , H01L51/0078 , H01L51/0094 , H01L51/0583 , H01L2924/0002 , H01L2924/00
摘要： Disclosed are semiconductor devices containing a polymer dielectric and at least one active device containing an organic semiconductor material and a passive layer. Also disclosed are semiconductor devices further containing a conductive polymer. Such devices are characterized by light weight and robust reliability.
摘要翻译： 公开了包含聚合物电介质的半导体器件和包含有机半导体材料和无源层的至少一个有源器件。 还公开了还包含导电聚合物的半导体器件。 这样的装置的特征在于重量轻和鲁棒的可靠性。
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