公开(公告)号：US20060292816A1

公开(公告)日：2006-12-28

申请号：US11415069

申请日：2006-05-02

申请人： Takumi Mikawa ,  Toru Nasu

发明人： Takumi Mikawa ,  Toru Nasu

IPC分类号： H01L21/20 ,  H01L29/00

CPC分类号： H01L28/55 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65 ,  H01L28/91

摘要： A semiconductor device comprises: an insulating film formed over a semiconductor substrate and having a first recess; a plurality of capacitor elements each of which is composed of a capacitor lower electrode formed on wall and bottom portions of the first recess and having a second recess, a capacitor insulating film of a dielectric film formed on wall and bottom portions of the second recess and having a third recess, and a capacitor upper electrode formed on wall and bottom portions of the third recess; and a conductive layer (referred hereinafter to as a low-resistance conductive layer) which is formed to cover at least portions of the respective capacitor upper electrodes constituting the plurality of capacitor elements and to extend across the plurality of capacitor elements and which has a lower resistance than the capacitor upper electrode.

摘要翻译： 半导体器件包括：形成在半导体衬底上并具有第一凹槽的绝缘膜; 多个电容器元件，每个电容器元件由形成在第一凹部的壁和底部上的电容器下电极组成，并具有第二凹部，形成在第二凹部的壁和底部上的电介质膜的电容绝缘膜， 具有第三凹部和形成在第三凹部的壁部和底部上的电容器上电极; 以及形成为覆盖构成多个电容器元件的各个电容器上电极的至少一部分并且跨越多个电容器元件并且具有较低电容器元件的导电层（以下称为低电阻导电层） 电阻比电容器上电极。

公开(公告)号：US07115937B2

公开(公告)日：2006-10-03

申请号：US11270156

申请日：2005-11-09

申请人： Takumi Mikawa ,  Yuuji Jyuudai ,  Shinya Natsume

发明人： Takumi Mikawa ,  Yuuji Jyuudai ,  Shinya Natsume

IPC分类号： H01L27/108

CPC分类号： H01L28/60 ,  H01L21/31053 ,  H01L27/11502 ,  H01L27/11507

摘要： A method for manufacturing a semiconductor device includes the steps of forming a conductive layer over a first insulating layer formed on a substrate, and over a plurality of contact plugs formed in the first insulating layer; forming a plurality of capacitor element lower electrodes by patterning the conductive layer; forming a second insulating layer on the first insulating layer and the capacitor element lower electrodes; forming recesses in the second insulating layer at a region above the capacitor element lower electrodes; planarizing the second insulating layer by polishing; exposing the capacitor element lower electrodes; and forming a capacitive insulating film and capacitor element upper electrodes above the capacitor element lower electrodes. In polishing the second insulating layer, leveling of steps can be accelerated, insufficient polishing, peeling of the lower electrodes and generation of scratches can be suppressed, and the global step difference can be reduced.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在形成于基板上的第一绝缘层上形成导电层，以及形成在第一绝缘层中的多个接触插塞; 通过图案化导电层形成多个电容器元件下电极; 在所述第一绝缘层和所述电容器元件下电极上形成第二绝缘层; 在所述电容器元件下电极上方的区域中在所述第二绝缘层中形成凹部; 通过抛光来平坦化第二绝缘层; 暴露电容元件下电极; 以及在电容器元件下电极之上形成电容绝缘膜和电容元件上电极。 在第二绝缘层的研磨中，可以加速台阶的调平，不足的研磨，下部电极的剥离和划痕的产生也可以抑制，从而可以降低全局的步进差。

公开(公告)号：US06963095B2

公开(公告)日：2005-11-08

申请号：US10632931

申请日：2003-08-04

申请人： Takumi Mikawa ,  Toshie Kutsunai ,  Yuji Judai

发明人： Takumi Mikawa ,  Toshie Kutsunai ,  Yuji Judai

IPC分类号： H01L27/105 ,  H01L21/02 ,  H01L21/321 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/72

CPC分类号： H01L28/65 ,  H01L21/3212 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： The ferroelectric memory device has a plurality of capacitor elements each formed on a semiconductor substrate and composed of a lower electrode, a capacitor insulating film made of a ferroelectric material formed on the lower electrode, and an upper electrode formed on the capacitor insulating film. Each of the lower electrodes is buried in a burying insulating film to have an upper surface planarized relative to the upper surface of the burying insulating film and has a plane configuration such that the distance from an arbitrary position on the upper surface of the lower electrode to the nearest end portion thereof is 0.6 μm or less.

摘要翻译： 铁电存储器件具有多个电容器元件，每个电容器元件形成在半导体衬底上，由下电极，形成在下电极上的铁电材料制成的电容器绝缘膜和形成在电容器绝缘膜上的上电极组成。 每个下电极被埋在埋入绝缘膜中以使上表面相对于掩埋绝缘膜的上表面平坦化，并且具有平面构造，使得从下电极的上表面上的任意位置到下电极的距离 其最接近的端部为0.6μm以下。

公开(公告)号：US06960800B2

公开(公告)日：2005-11-01

申请号：US09734176

申请日：2000-12-12

申请人： Takumi Mikawa ,  Yuji Judai

发明人： Takumi Mikawa ,  Yuji Judai

IPC分类号： H01G4/12 ,  H01L21/02 ,  H01L21/203 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/76 ,  H01L23/48 ,  H01L23/52 ,  H01L29/00

CPC分类号： H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A lower electrode is formed on a substrate, a capacitive insulating film is formed out of a ferroelectric film on the lower electrode, and an upper electrode is formed on the capacitive insulating film. A contact layer is formed on the upper electrode. The contact layer is either a single-layer film made of a metal oxide or a metal nitride or a multilayer structure made up of metal oxide and metal nitride films. An insulating film is formed to cover the lower electrode, capacitive insulating film, upper electrode and contact layer. A contact hole is opened through the insulating film and the contact layer to reach the upper electrode. A metal interconnect, which is filled in the contact hole and connected to the upper electrode, is formed on a part of the insulating film.

摘要翻译： 在基板上形成下电极，在下电极上由铁电体膜形成电容绝缘膜，在电容绝缘膜上形成上电极。 接触层形成在上电极上。 接触层是由金属氧化物或金属氮化物制成的单层膜或由金属氧化物和金属氮化物膜构成的多层结构。 形成绝缘膜以覆盖下电极，电容绝缘膜，上电极和接触层。 通过绝缘膜和接触层打开接触孔以到达上电极。 填充在接触孔中并连接到上电极的金属互连件形成在绝缘膜的一部分上。

公开(公告)号：US06958508B2

公开(公告)日：2005-10-25

申请号：US09968948

申请日：2001-10-03

申请人： Takumi Mikawa

发明人： Takumi Mikawa

IPC分类号： H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8239 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L27/108

CPC分类号： H01L27/11509 ,  H01L21/28568 ,  H01L21/76895 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.

摘要翻译： 电容器上电极和布线通过使用形成在电容元件下方的插塞和导电层而彼此电连接，而不使用通过其间的层间绝缘膜将电容器上电极直接连接到设置在其上的布线的插头。 或者，电容器上电极被导电氢阻挡膜覆盖，并且电容器上电极和布线通过将布线和导电氢阻挡膜彼此连接的插塞彼此电连接，并且导电氢屏障 电影。

公开(公告)号：US20050082637A1

公开(公告)日：2005-04-21

申请号：US10964703

申请日：2004-10-15

申请人： Takumi Mikawa ,  Eiji Fujii

发明人： Takumi Mikawa ,  Eiji Fujii

IPC分类号： H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/768 ,  H01L21/8242 ,  H01L29/00

CPC分类号： H01L28/55 ,  H01L21/7687 ,  H01L28/56 ,  H01L28/65 ,  H01L28/75 ,  H01L28/91

摘要： A semiconductor device is provided with an insulating film which is formed on a semiconductor substrate and has a first recess, a capacitor lower electrode which is formed on the walls and the bottom of the first recess and has a second recess, and a capacitor insulating film which is formed on the walls and the bottom of the second recess and has a third recess, and a capacitor upper electrode embedded in the third recess.

摘要翻译： 半导体器件设置有绝缘膜，该绝缘膜形成在半导体衬底上并且具有第一凹部，形成在第一凹部的壁和底部上并具有第二凹部的电容器下电极，以及电容器绝缘膜 其形成在第二凹部的壁和底部上，并且具有第三凹部，以及嵌入在第三凹部中的电容器上电极。

公开(公告)号：US20050041505A1

公开(公告)日：2005-02-24

申请号：US10957618

申请日：2004-10-05

申请人： Takumi Mikawa

发明人： Takumi Mikawa

IPC分类号： H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8239 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  G11C7/00

CPC分类号： H01L27/11509 ,  H01L21/28568 ,  H01L21/76895 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A capacitor upper electrode and a wiring are electrically connected to each other by using a plug and a conductive layer formed below a capacitive element without using a plug that directly connects the capacitor upper electrode to the wiring provided thereon via an interlayer insulating film therebetween. Alternatively, the capacitor upper electrode is covered by a conductive hydrogen barrier film, and the capacitor upper electrode and the wiring are electrically connected to each other via both a plug connecting the wiring and the conductive hydrogen barrier film to each other and the conductive hydrogen barrier film.

公开(公告)号：US06753566B2

公开(公告)日：2004-06-22

申请号：US10441118

申请日：2003-05-20

申请人： Toshie Kutsunai ,  Shinichiro Hayashi ,  Takumi Mikawa ,  Yuji Judai

发明人： Toshie Kutsunai ,  Shinichiro Hayashi ,  Takumi Mikawa ,  Yuji Judai

IPC分类号： H01L27108

CPC分类号： H01L28/55

摘要： An impurity diffusion layer serving as the source or the drain of a transistor is formed in a semiconductor substrate, and a protection insulating film is formed so as to cover the transistor. A capacitor lower electrode, a capacitor dielectric film of an oxide dielectric film and a capacitor upper electrode are successively formed on the protection insulating film. A plug for electrically connecting the impurity diffusion layer of the transistor to the capacitor lower electrode is buried in the protection insulating film. An oxygen barrier layer is formed between the plug and the capacitor lower electrode. The oxygen barrier layer is made from a composite nitride that is a mixture or an alloy of a first nitride having a conducting property and a second nitride having an insulating property.

摘要翻译： 在半导体衬底中形成用作晶体管的源极或漏极的杂质扩散层，形成覆盖晶体管的保护绝缘膜。 在保护绝缘膜上依次形成电容器下电极，氧化物电介质膜的电容电介质膜和电容器上电极。 用于将晶体管的杂质扩散层电连接到电容器下电极的插头埋入保护绝缘膜中。 在塞子和电容器下电极之间形成氧阻隔层。 氧阻隔层由作为具有导电性的第一氮化物和具有绝缘性的第二氮化物的混合物或合金的复合氮化物制成。

公开(公告)号：US06750492B2

公开(公告)日：2004-06-15

申请号：US10053693

申请日：2002-01-24

申请人： Takumi Mikawa ,  Toshie Kutsunai ,  Yuji Judai

发明人： Takumi Mikawa ,  Toshie Kutsunai ,  Yuji Judai

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10894 ,  H01L27/11507 ,  H01L28/55

摘要： A semiconductor memory device of the present invention includes: a semiconductor substrate; a memory cell capacitor for storing data, including a first electrode provided above the semiconductor substrate, a capacitance insulating film formed on the first electrode, and a second electrode provided on the capacitance insulating film; a step reducing film covering an upper surface and a side surface of the memory cell capacitor; and an overlying hydrogen barrier film covering the step reducing film.

摘要翻译： 本发明的半导体存储器件包括：半导体衬底; 用于存储数据的存储单元电容器，包括设置在半导体衬底上的第一电极，形成在第一电极上的电容绝缘膜和设置在电容绝缘膜上的第二电极; 覆盖所述存储单元电容器的上表面和侧面的阶梯降低膜; 以及覆盖降低层的覆盖氢阻挡膜。

公开(公告)号：US08871561B2

公开(公告)日：2014-10-28

申请号：US13805233

申请日：2012-01-30

申请人： Ichirou Takahashi ,  Takumi Mikawa

发明人： Ichirou Takahashi ,  Takumi Mikawa

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L45/00 ,  H01L27/24

CPC分类号： H01L45/1683 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/146 ,  H01L45/1625

摘要： Provided is a method for manufacturing a variable resistance nonvolatile storage device, which prevents electrical conduction between lower electrodes and upper electrodes of variable resistance elements in the memory cell holes. The method includes: forming lower copper lines; forming a third interlayer insulating layer; forming memory cell holes in the third interlayer insulating layer, an opening diameter of upper portions of the memory cell holes being smaller than bottom portions; forming a metal electrode layer on the bottom of each memory cell holes by sputtering; embedding and forming a variable resistance layer in each memory cell hole; and forming upper copper lines connected to the variable resistance layer embedded and formed in each memory cell hole.

摘要翻译： 提供一种制造可变电阻非易失性存储装置的方法，其防止存储单元孔中的下电极和可变电阻元件的上电极之间的导电。 该方法包括：形成较低的铜线; 形成第三层间绝缘层; 在第三层间绝缘层中形成存储单元孔，存储单元孔的上部的开口直径小于底部; 通过溅射在每个存储单元孔的底部形成金属电极层; 在每个存储单元孔中嵌入并形成可变电阻层; 并且形成连接到嵌入并形成在每个存储单元孔中的可变电阻层的上铜线。