公开(公告)号：US3771141A

公开(公告)日：1973-11-06

申请号：US3771141D

申请日：1971-11-08

申请人： CULLER HARRISON INC

发明人： CULLER G

IPC分类号： G06F9/38 ,  G06F9/16

CPC分类号： G06F9/3889 ,  G06F9/3867

摘要： An electronic digital data processor particularly useful for performing tasks requiring substantial list processing computation in real (or neat real) time. The processor is organized in a manner which permits multiple operations, including arithmetic and data transfer operations, to be executed in parallel at each clock time in response to a single instruction drawn from an instruction memory. This parallel operation is achieved as a consequence of implementing the internal data registers and arithmetic circuits with multiple data inputs and by controlling them in response to a particular instruction format. Data is held constantly available at each register input bit position. The particular data input selected at any clock time for transfer into a register is determined by the particular instruction concurrently contained within an instruction buffer register. Instructions are drawn one at a time into the instruction buffer from a high speed internal instruction memory which in turn is normally loaded, one instruction block at a time, from a core memory. The instruction format includes multiple fields which separately identify operations to be executed in parallel.

公开(公告)号：US3736563A

公开(公告)日：1973-05-29

申请号：US3736563D

申请日：1971-03-30

申请人： SIEMENS AG

发明人： BECKINGER G ,  GOULLON H ,  WIEST G ,  WEHREND K ,  KIESSLING H

IPC分类号： G06F9/26 ,  G06F9/12 ,  G06F9/16

CPC分类号： G06F9/261

摘要： A program control unit for a digital data processing installation is described. The program control delivers macrocommands from a macro-command memory, and micro-commands from a micro-command memory. The micro-commands can be delivered singly or in selected combinations. In addition to the main commands in the macro-command memory which act as macro-commands for directly releasing micro-programs, there are also main commands which follow each other and indirectly cause the delivery of one or more micro-commands. Indirect delivery of micro-commands is caused in any case by a machine address of a memory cell, belonging to the pertinent main command, related to the macrocommand memory for another macro-command. At least one auxiliary command which can be called up by different main commands is contained in a memory cell of this type. Each auxiliary command determines, by means of a micro-command machine address related thereto of the memory cell in the micro-command memory, the delivery of this micro-command or the delivery of this microcommand and the micro-command which follows in the micro-command memory.

摘要翻译： 描述用于数字数据处理装置的程序控制单元。 程序控制从宏指令存储器和微指令存储器提供微指令。 微指令可以单独传输或以选定的组合传送。 宏命令存储器中的主命令除了作为直接释放微程序的宏命令之外，还有一些主命令可以彼此跟随，间接导致一个或多个微命令的传送。 在任何情况下，通过属于相关主命令的与另一个宏指令的宏指令存储器相关的存储单元的机器地址，导致微指令的间接发送。 这种类型的存储单元中包含至少一个可由不同主命令调用的辅助命令。 每个辅助命令通过与微指令存储器中的存储器单元有关的微指令机地址来确定该微命令的传递或该微命令的传送以及随后的微命令 微指令存储器。

公开(公告)号：US4618925A

公开(公告)日：1986-10-21

申请号：US630991

申请日：1984-07-13

申请人： Richard G. Bratt ,  Ronald H. Gruner ,  Thomas M. Jones ,  James T. Nealon

发明人： Richard G. Bratt ,  Ronald H. Gruner ,  Thomas M. Jones ,  James T. Nealon

IPC分类号： G06F9/45 ,  G06F9/16

CPC分类号： G06F8/47

摘要： The processor of the present invention can execute any of a plurality of dialects of "S-Language" instructions. S-Languages are of a higher order than typical machine languages but of a lower order than the user's own high order language. They can be tailored for compatibility with user high order languages. Each instruction of a particular S-Language is interpreted by a sequence of microinstructions. In the processor of the present invention, dispatching to the microinstruction sequencer is controlled jointly by the instruction bit pattern and the current contents of a dialect register. Each procedure to be executed carries with it information from which the appropriate contents of the dialect register may be determined. Thus, the processor of the present invention can always operate as an effective optimum processor for executing the procedure regardless of the source language chosen for writing that procedure.

摘要翻译： 本发明的处理器可以执行“S语言”指令的多个方言中的任何一种。 S语言的排序比典型的机器语言高，但比用户自己的高级语言的顺序要低。 它们可以根据用户高阶语言进行定制。 特定S语言的每个指令由微指令序列解释。 在本发明的处理器中，通过指令位模式和方言寄存器的当前内容共同地控制对微指令定序器的调度。 要执行的每个过程携带有可以确定方言寄存器的适当内容的信息。 因此，本发明的处理器可以始终作为用于执行该过程的有效的最佳处理器来操作，而不管选择用于写入该过程的源语言。

公开(公告)号：US4179731A

公开(公告)日：1979-12-18

申请号：US784459

申请日：1977-04-04

申请人： Isamu Yamazaki

发明人： Isamu Yamazaki

IPC分类号： G06F9/28 ,  G06F9/22 ,  G06F9/26 ,  G06F9/32 ,  G06F9/38 ,  G06F9/16 ,  G06F9/20

CPC分类号： G06F9/267

摘要： A microprogrammed control system comprises: a memory for storing a microprogram programmed with microinstructions; a memory for storing microinstructions for branching microinstruction; an address register for storing the address of the microinstruction to be next executed; and a microinstruction register for storing the microinstruction to be executed. The program operation of the microprogrammed control system depends on whether the micro-instruction stored in the microinstruction register is the branching one or not. In the case of non-branching microinstruction, the operation of ordinary microinstructions is executed. In the case of branching microinstruction, a special operation is executed for making the operation of the branching microinstruction equivalent to that of the ordinary microinstruction.

摘要翻译： 微程序控制系统包括：存储器，用于存储用微指令编程的微程序; 用于存储分支微指令的微指令的记忆体; 用于存储要下一次执行的微指令的地址的地址寄存器; 以及用于存储要执行的微指令的微指令寄存器。 微程序控制系统的程序操作取决于存储在微指令寄存器中的微指令是否分支。 在非分支微指令的情况下，执行普通微指令的操作。 在分支微指令的情况下，执行特殊操作以使分支微指令的操作等同于普通微指令。

公开(公告)号：US4159521A

公开(公告)日：1979-06-26

申请号：US729911

申请日：1976-10-05

申请人： Donivan L. Hall ,  Edward G. Pryor

发明人： Donivan L. Hall ,  Edward G. Pryor

IPC分类号： G01G3/14 ,  G01G19/414 ,  G01G19/417 ,  G01G23/00 ,  G01G23/16 ,  G01G23/37 ,  G01G23/46 ,  G06Q30/04 ,  G01G23/36 ,  G06F9/16

CPC分类号： G06Q30/04 ,  G01G19/414 ,  G01G19/417 ,  G01G23/00 ,  G01G23/163 ,  G01G23/3707 ,  G01G23/46 ,  G01G3/1406

摘要： Improved electronic apparatus for weighing and computing the value from the weight and price per unit weight, for each of a plurality of successive weighing operations. An integrated circuit microcomputer is supplied with the article weight from a load cell and an analog-to-digital converter. The price per unit weight is supplied from a manual keyboard. The microcomputer includes as an arithmetic logic unit, data registers and sequence controller which is programmed to correct for scale errors, to check for no motion of the scale, to compensate the measured gross weight for any tare weight, to check various interlocks, and to compute an article value for each successive weighing. Null or zeroing and tare interlocks, checks, and safeguards are provided to reduce the possibility of fraud.

摘要翻译： 改进的电子设备，用于对多个连续加权操作中的每一个进行称重和计算每单位重量的重量和价格的值。 从称重传感器和模数转换器向集成电路微型计算机提供物品重量。 每单位重量的价格由手动键盘提供。 该微计算机包括作为算术逻辑单元的数据寄存器和序列控制器，其被编程以校正刻度误差，以检查标尺的运动，以补偿任何皮重的测量毛重，以检查各种互锁，以及 计算每个连续称量的物品值。 提供零或归零和去皮互锁，支票和保障措施以减少欺诈的可能性。

公开(公告)号：US4156796A

公开(公告)日：1979-05-29

申请号：US855578

申请日：1977-11-29

申请人： Douglas M. O'Neal ,  Donald V. Wildes

发明人： Douglas M. O'Neal ,  Donald V. Wildes

IPC分类号： H04L29/04 ,  G06F13/00 ,  G06F13/12 ,  G06F13/40 ,  H04Q3/54 ,  G06F9/16

CPC分类号： G06F13/124 ,  G06F13/4022

摘要： A micro processor controlled user programmable communications multiplexer subsystem (herein referred to by the symbol PCS) capable of transmitting and receiving data on any one or more of 32 communications lines simultaneously. Each line may be dynamically assigned to a variety of communication characteristics, such as line speeds, character lengths, synchronous, or asynchronous operation, and code structures as well as protocol selections.The system of the invention provides the capability for the user to write his communications programs using novel operations commands that provide code structure and protocol independence as well as communication line independence. Various hardware features and queuing techniques are employed in order to maintain high transmission rates.Variable line scanning in the Teleprocessing Time Division Multiplexer of the PCS is programmably permissible; i.e., the time base for line scanning is fixed and is a multiple of the communication line rate, although the actual line to be scanned is programmably variable. The program ability is provided by a continuously scanned storage array which contains physical line addresses of the time division multiplexer. The scanning mechanism, while running, prioritizes the transmit buffer servicing of the individual lines.

摘要翻译： 一种微处理器控制的用户可编程通信多路复用器子系统（这里称为符号PCS），能够同时在32个通信线路中的任何一个或多个通信线路上发送和接收数据。 每行可以动态分配给各种通信特性，例如线路速度，字符长度，同步或异步操作，以及代码结构以及协议选择。

公开(公告)号：US4145736A

公开(公告)日：1979-03-20

申请号：US768089

申请日：1977-02-14

申请人： Takahiko Yamada ,  Shigeki Yamada ,  Yoshio Sakurai ,  Kazuo Furukawa ,  Syoji Kajitsuka ,  Toshio Awaji

发明人： Takahiko Yamada ,  Shigeki Yamada ,  Yoshio Sakurai ,  Kazuo Furukawa ,  Syoji Kajitsuka ,  Toshio Awaji

IPC分类号： G06F9/26 ,  G06F9/22 ,  G06F9/28 ,  G06F13/12 ,  G06F9/16 ,  G06F9/18

CPC分类号： G06F9/28

摘要： A control device which controls a plurality of controlled devices by time shared control in a microprogram control system and has one control memory, a plurality of microinstruction registers, the outputs of which are applied to the controlled devices, circuits for memorizing microinstruction execution requests corresponding to microinstruction type and the controlled devices, and a selecting circuit for selecting a microinstruction register for storing a microinstruction read out from said control memory in each machine cycle and the controlled devices to be controlled. The field of the microinstruction indicates the execution and type of the next microinstruction after the next machine cycle to a given controlled device. When the execution of the next microinstruction is indicated, this request and the microinstruction type are memorized by microinstruction request holding circuits corresponding to the controlled circuits respectively and any selected controlled circuit, and the microinstruction is read out of the control memory. Consequently, the instruction stored in one microinstruction register may control one controlled circuit while other instructions stored in the other microinstruction registers may control the other controlled circuits in time-shared parallel relationship.

摘要翻译： 一种控制装置，其通过微程序控制系统中的时间共享控制来控制多个受控装置，并具有一个控制存储器，多个微指令寄存器，其输出应用于受控装置，用于存储与微控制装置对应的微指令执行请求的电路 微指令类型和受控设备;以及选择电路，用于选择用于存储在每个机器周期中从所述控制存储器读出的微指令的微指令寄存器和要被控制的受控设备。 微指令的字段指示在下一个机器周期之后到给定受控设备的下一个微指令的执行和类型。 当指示下一个微指令的执行时，该请求和微指令类型由分别对应于受控电路的微指令请求保持电路和任何选择的控制电路存储，并且微指令从控制存储器读出。 因此，存储在一个微指令寄存器中的指令可以控制一个受控电路，而存储在其他微指令寄存器中的其他指令可以以时间共享的并行关系来控制其他受控电路。

公开(公告)号：US4129901A

公开(公告)日：1978-12-12

申请号：US784810

申请日：1977-04-05

申请人： Ikuro Masuda

发明人： Ikuro Masuda

IPC分类号： G06F9/32 ,  G05B19/05 ,  G05B11/00 ,  G06F9/16

CPC分类号： G05B19/05 ,  G05B2219/13008

摘要： A sequence control system is disclosed which is suitable for control of plural objects to at least some of which similar control sequence operations are performed. In addition to a logical operation unit for receiving signals representative of states of the controlled objects through an I/O device to perform the operations for the desired controls, and a memory unit for storing programmed instructions for logical operations by the logical operation unit at predetermined program addresses, the system is provided with a device for executing repeatedly the processings common to the objects to be controlled. The time required for the processing in the logical operation unit for controlling the objects requiring similar control operations can be remarkably reduced. The system has an excellent utility in applications such as numerical control apparatus in which many objects have substantially identical control operations and are to be controlled at high rate.

摘要翻译： 公开了一种顺序控制系统，其适用于对至少一些类似的控制顺序操作进行控制的多个对象的控制。 除了用于通过I / O设备接收表示受控对象的状态以执行所需控制的操作的信号的逻辑运算单元以及存储单元，用于存储由逻辑运算单元预定的逻辑运算的编程指令 程序地址时，该系统具有用于重复执行要被控制的对象共同的处理的设备。 可以显着地减少用于控制需要类似控制操作的对象的逻辑运算单元中的处理所需的时间。 该系统在许多物体具有基本相同的控制操作并且以高速率控制的应用中具有极好的效用。

公开(公告)号：US4126896A

公开(公告)日：1978-11-21

申请号：US783637

申请日：1977-04-01

申请人： Isamu Yamazaki

发明人： Isamu Yamazaki

IPC分类号： G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  G06F9/16

CPC分类号： G06F9/268 ,  G06F9/261

摘要： A microprogrammed LSI microprocessor comprises a read only memory (ROM) for storing therein microprograms and a decode table for the operation code of macroinstructions, and an arithmetic logic control section constructed into a one package of LSI circuit. The arithmetic logic control section is constructed into a circuit arrangement which, on the assumption that the operation code of macroinstructions be an address, sets the starting address of a corresponding macroinstruction read from the ROM in a location counter, reads from the ROM a microinstruction corresponding to the starting address set in the location counter to set this microinstruction in a microinstruction register, and arithmetically executes the microinstruction stored in the microinstruction register.

摘要翻译： 微程序LSI微处理器包括用于存储微程序的只读存储器（ROM）和用于宏指令的操作代码的解码表，以及构造成一个LSI封装的算术逻辑控制部分。 算术逻辑控制部分被构造成电路装置，在宏指令的操作码为地址的情况下，将从ROM中读取的相应宏指令的起始地址设置在位置计数器中，从ROM读取微指令对应的 到位置计数器中设置的起始地址，以将该微指令设置在微指令寄存器中，并且算术地执行存储在微指令寄存器中的微指令。

公开(公告)号：US4115852A

公开(公告)日：1978-09-19

申请号：US748179

申请日：1976-12-07

申请人： James O. Rozell

发明人： James O. Rozell

IPC分类号： G06F9/22 ,  G06F13/12 ,  G06F9/16

CPC分类号： G06F9/226 ,  G06F13/124

摘要： A microprogrammed controller for interconnection between a central processor unit and at least one peripheral unit for controlling the transfer of data therebetween in response to instructions from the central processor unit provides for simplified bit manipulation through a feedback circuit which feeds the data to be supplied to the peripheral unit back to the input bus of the controller for further processing. In this way bit manipulation can be accomplished with a single microinstruction to provide for higher speed and efficiency of operation.

摘要翻译： 用于在中央处理器单元和至少一个外围单元之间进行互连的微程序控制器，用于响应于来自中央处理器单元的指令来控制数据之间的传输，通过反馈电路提供简化的比特操作，该反馈电路将要提供给 外围设备回到控制器的输入总线进行进一步处理。 以这种方式，可以通过单个微指令来实现位操作，以提供更高的速度和操作效率。