Frequency uniformity of film bulk acoustic resonators
    81.
    发明授权
    Frequency uniformity of film bulk acoustic resonators 失效
    薄膜体声共振器的频率均匀性

    公开(公告)号:US06949268B2

    公开(公告)日:2005-09-27

    申请号:US10185399

    申请日:2002-06-28

    摘要: The frequency uniformity of a film bulk acoustic resonator may be improved by controlling the thickness across a wafer of one or more layers of the film bulk acoustic resonator. One or more layers of the film bulk acoustic resonator may be deposited in a way that irregularities in the deposition process from one die to another may be controlled.

    摘要翻译: 通过控制薄膜体声波谐振器的一个或多个层的晶片上的厚度可以改善膜体声波谐振器的频率均匀性。 可以以使得可以控制从一个管芯到另一个管芯的沉积工艺中的不规则性的方式来沉积薄膜体声波谐振器的一个或多个层。

    Structure for reducing die corner and edge stresses in microelectronic packages
    86.
    发明授权
    Structure for reducing die corner and edge stresses in microelectronic packages 失效
    用于减少微电子封装中的管芯拐角和边缘应力的结构

    公开(公告)号:US06617682B1

    公开(公告)日:2003-09-09

    申请号:US09675112

    申请日:2000-09-28

    IPC分类号: H01L2334

    摘要: A microelectronic die is aligned with a package substrate and attached to it using solder balls. A specially shaped heat spreader, preferably with a coefficient of thermal expansion (CTE) similar to that of silicon, is attached to the back side of the die using a heat-conducting adhesive. An epoxy-based material is flowed into the gap between the die, the substrate, and the heat spreader via a through-hole in either the substrate or the heat spreader using a dispense process or a transfer molding process. By positioning the heat spreader to abut the die corners and/or edges, the stresses on the die are substantially reduced or eliminated.

    摘要翻译: 微电子管芯与封装衬底对准,并使用焊球与其连接。 使用导热粘合剂将特别形状的散热器,优选具有类似于硅的热膨胀系数(CTE)附着到模具的背面。 使用分配工艺或传递模塑工艺,环氧基材料通过衬底或散热器中的通孔流入模具,衬底和散热器之间的间隙中。 通过定位散热器以抵靠模具的拐角和/或边缘,模具上的应力被显着地减少或消除。

    Integrated circuit guard ring structures
    87.
    发明授权
    Integrated circuit guard ring structures 有权
    集成电路保护环结构

    公开(公告)号:US06509622B1

    公开(公告)日:2003-01-21

    申请号:US09644639

    申请日:2000-08-23

    IPC分类号: H01L27095

    摘要: An integrated circuit including a die having a circuit area and a plurality of guard rings. The circuit area includes active devices, passive devices, and interconnects connected to form an integrated circuit. The plurality of guard rings includes a plurality of stacked guard rings having substantially equal widths and encircling the circuit area. Alternatively, the plurality of guard rings includes metallization level guard rings interleaved with one or more via level guard rings. Each of the one or more via level guard rings includes one or more guard rings encircling the circuit area. Alternatively, the plurality of guard rings includes a plurality of concentric guard rings encircling the circuit area. Each of the plurality of guard rings is fabricated from a metal, such as aluminum, copper, or silver, or an alloy of aluminum, copper, or silver.

    摘要翻译: 一种集成电路,包括具有电路区域和多个保护环的管芯。 电路区域包括有源器件,无源器件和互连,形成集成电路。 多个保护环包括多个具有基本上相等的宽度并且围绕电路区域的堆叠保护环。 或者,多个保护环包括与一个或多个通孔级保护环交错的金属化水平保护环。 一个或多个通孔级保护环中的每一个包括环绕电路区域的一个或多个保护环。 或者,多个保护环包括环绕电路区域的多个同心保护环。 多个保护环中的每一个由诸如铝,铜或银的金属或铝,铜或银的合金制成。

    Semiconductor device having a low-K dielectric layer
    88.
    发明授权
    Semiconductor device having a low-K dielectric layer 有权
    具有低K电介质层的半导体器件

    公开(公告)号:US06914335B2

    公开(公告)日:2005-07-05

    申请号:US10038343

    申请日:2002-01-02

    IPC分类号: H01L21/768 H01L29/40

    摘要: An improved semiconductor device is described. That semiconductor device includes a first insulating layer, having a low-k dielectric constant that preferably comprises a carbon doped oxide, that is formed on a substrate. The device further includes a second layer, which is formed on the first layer, that has a relatively high dielectric constant and superior mechanical strength. The second layer is preferably under compressive stress. A third layer may be formed on the second layer, which has a relatively low dielectric constant and relatively poor mechanical strength, and a fourth layer may be formed on the third layer, which has a relatively high dielectric constant and superior mechanical strength.

    摘要翻译: 描述了改进的半导体器件。 该半导体器件包括形成在衬底上的具有低k介电常数的第一绝缘层,该第一绝缘层优选包含掺碳氧化物。 该器件还包括形成在第一层上的具有相对高的介电常数和优异的机械强度的第二层。 第二层优选在压应力下。 可以在第二层上形成第三层,其具有相对低的介电常数和相对较差的机械强度,并且可以在第三层上形成第四层,第三层具有相对高的介电常数和优异的机械强度。

    Microelectronic package having multiple conductive paths through an opening in a support substrate
    90.
    发明申请
    Microelectronic package having multiple conductive paths through an opening in a support substrate 有权
    具有通过支撑衬底中的开口的多个导电路径的微电子封装

    公开(公告)号:US20070077747A1

    公开(公告)日:2007-04-05

    申请号:US11240750

    申请日:2005-09-30

    申请人: John Heck Qing Ma

    发明人: John Heck Qing Ma

    IPC分类号: H01L21/4763

    摘要: Microelectronic packages are disclosed. A microelectronic package may include a substrate having first and second sides. Passive components may be located on the first side of the substrate. Interconnects may also be located on the first side of the substrate, and may be electrically coupled with the passive components. Microelectronic components may be located on the first side of the substrate and may be electrically coupled with interconnects. The substrate may include an opening therein. The opening may lead from the second side of the substrate toward the first side of the substrate. A plurality of conductive paths may be at least partially included in the opening. Each of the conductive paths may lead from the second side of the substrate toward the first side of the substrate to communicate electrical signals to interconnects. Methods of making the packages and electronic devices including the packages are also disclosed.

    摘要翻译: 公开了微电子封装。 微电子封装可以包括具有第一和第二侧面的衬底。 无源组件可以位于衬底的第一侧上。 互连件也可以位于衬底的第一侧上,并且可以与无源部件电耦合。 微电子部件可以位于衬底的第一侧上并且可以与互连件电耦合。 衬底可以包括其中的开口。 开口可以从基板的第二侧朝向基板的第一侧。 多个导电路径可以至少部分地包括在开口中。 每个导电路径可以从衬底的第二侧朝向衬底的第一侧引导,以将电信号传送到互连。 还公开了制造包装和包括包装的电子装置的方法。