公开(公告)号：US20160197015A1

公开(公告)日：2016-07-07

申请号：US14589600

申请日：2015-01-05

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/78 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/02 ,  H01L21/67 ,  H01L21/268 ,  H01L21/308

CPC分类号： H01L21/78 ,  H01L21/0275 ,  H01L21/3086 ,  H01L21/67092 ,  H01L21/67207

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the plurality of integrated circuits. The mask is then patterned with a polygon scanning-based laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the plurality of integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the plurality of integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护多个集成电路的层构成。 然后通过基于多边形扫描的激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露多个集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对多个集成电路进行分割。

公开(公告)号：US09224650B2

公开(公告)日：2015-12-29

申请号：US14103534

申请日：2013-12-11

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/46 ,  H01L21/30 ,  H01L21/78 ,  H01L21/308 ,  B23K26/32 ,  B23K26/36 ,  B23K26/40 ,  H01L21/311 ,  H01L21/3213

CPC分类号： H01L21/78 ,  B23K26/32 ,  B23K26/364 ,  B23K26/40 ,  B23K26/402 ,  B23K2103/08 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  B23K2103/56 ,  H01L21/3081 ,  H01L21/31127 ,  H01L21/3213 ,  H01L21/6836 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/54433 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

摘要： Approaches for backside laser scribe plus front side laser scribe and plasma etch dicing of a wafer or substrate are described. For example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side thereof and metallization on a backside thereof involves patterning the metallization on the backside with a first laser scribing process to provide a first plurality of laser scribe lines on the backside. The method also involves forming a mask on the front side. The method also involves patterning, from the front side, the mask with a second laser scribing process to provide a patterned mask with a second plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits, wherein the second plurality of scribe lines is aligned with the first plurality of scribe lines. The method also involves plasma etching the semiconductor wafer through the second plurality of scribe lines to singulate the integrated circuits.

摘要翻译： 描述了用于背面激光划片加正面激光划线和等离子体蚀刻切割晶片或衬底的方法。 例如，在其前侧划分具有多个集成电路的半导体晶片的方法，其背面上的金属化包括用第一激光划线工艺在背面上图案化金属化，以在第一激光划线工艺上提供第一多个激光划线 背面。 该方法还涉及在前侧形成掩模。 该方法还包括利用第二激光划线工艺从正面图案化掩模，以提供具有暴露在集成电路之间的半导体晶片的区域的第二多个划线的图案化掩模，其中第二多个划线是 与第一组多个划线对准。 该方法还包括通过第二多个划线对等离子体蚀刻半导体晶片以对集成电路进行分离。

公开(公告)号：US09112050B1

公开(公告)日：2015-08-18

申请号：US14276683

申请日：2014-05-13

申请人： Wei-Sheng Lei ,  Prabhat Kumar ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Prabhat Kumar ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/82 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/78

CPC分类号： H01L21/82 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/67109 ,  H01L21/67207 ,  H01L21/78

摘要： Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves introducing a substrate supported by a substrate carrier into a plasma etch chamber. The substrate has a patterned mask thereon covering integrated circuits and exposing streets of the substrate. The substrate carrier has a backside. The method also involves supporting at least a portion of the backside of the substrate carrier on a chuck of the plasma etch chamber. The method also involves cooling substantially all of the backside of the substrate carrier, the cooling involving cooling at least a first portion of the backside of the substrate carrier by the chuck. The method also involves plasma etching the substrate through the streets to singulate the integrated circuits while performing the cooling substantially all of the backside of the substrate carrier.

摘要翻译： 对具有多个集成电路的各晶片的切割半导体晶片的方法和装置进行说明。 在一个实例中，对具有多个集成电路的半导体晶片进行切割的方法包括将由衬底载体支撑的衬底引入等离子体蚀刻室。 衬底上具有图案化掩模，其覆盖集成电路并暴露衬底的街道。 衬底载体具有背面。 该方法还涉及将衬底载体的背侧的至少一部分支撑在等离子体蚀刻室的卡盘上。 该方法还包括冷却基板载体的基本上所有背面，冷却涉及通过卡盘冷却基板载体的背面的至少第一部分。 该方法还涉及通过街道等离子体蚀刻衬底以对集成电路进行单片化，同时基本上全部衬底载体的背面进行冷却。

公开(公告)号：US20150214111A1

公开(公告)日：2015-07-30

申请号：US14590910

申请日：2015-01-06

申请人： Wei-Sheng Lei ,  James S. Papanu ,  Prabhat Kumar ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  James S. Papanu ,  Prabhat Kumar ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/82 ,  H01L21/683 ,  H01L21/306 ,  H01L21/56

CPC分类号： H01L21/82 ,  H01L21/30604 ,  H01L21/561 ,  H01L21/67207 ,  H01L21/6836 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/743 ,  H01L2224/16145 ,  H01L2224/27001 ,  H01L2224/27436 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/83191 ,  H01L2924/12042 ,  H01L2924/00

摘要： Methods and systems for dicing a semiconductor wafer including a plurality of integrated circuits (ICs) are described. In one embodiment, a method involves adhering an adhesive tape to a thin water soluble dry film. The method involves applying the thin water soluble dry film adhered to the adhesive tape over a surface of the semiconductor wafer. The method involves removing the adhesive tape from the thin water soluble dry film. The thin water soluble dry film is patterned with a laser scribing process, exposing regions of the semiconductor wafer between the ICs. The method involves etching the semiconductor wafer through gaps in the patterned thin water soluble dry film, and removing the thin water soluble dry film.

摘要翻译： 描述了用于切割包括多个集成电路（IC）的半导体晶片的方法和系统。 在一个实施方案中，一种方法包括将粘合带粘附到薄水溶性干膜上。 该方法包括将粘附到粘合带上的薄水溶性干膜涂覆在半导体晶片的表面上。 该方法包括从薄水溶性干膜中去除粘合带。 用激光刻划工艺对薄水溶性干膜进行图案化，使IC之间的半导体晶片的区域暴露。 该方法包括通过图案化的薄水溶性干膜中的间隙蚀刻半导体晶片，以及去除薄水溶性干膜。

公开(公告)号：US09041198B2

公开(公告)日：2015-05-26

申请号：US14060005

申请日：2013-10-22

申请人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

IPC分类号： H01L23/34 ,  H01L21/78 ,  H01L21/3065 ,  B23K26/40

CPC分类号： H01L21/78 ,  B23K26/0006 ,  B23K26/0624 ,  B23K26/50 ,  B23K26/53 ,  B23K26/57 ,  B23K2101/40 ,  B23K2103/56 ,  H01L21/3065 ,  H01L21/82

摘要： Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.

摘要翻译： 描述了无掩模混合激光划线和等离子体蚀刻晶片切割工艺。 在一个示例中，将具有其上具有多个集成电路的前表面的半导体晶片切割并且具有设置在其上并且覆盖集成电路的金属柱/焊料凸块对之间的钝化层的方法包括激光划线，而不使用 掩模层，钝化层以提供暴露半导体晶片的划线。 该方法还包括通过划线等离子体蚀刻半导体晶片以对集成电路进行分离，其中钝化层在等离子体蚀刻的至少一部分期间保护集成电路。 该方法还涉及使钝化层变薄以部分地暴露集成电路的金属柱/焊料凸块对。

公开(公告)号：US20150111364A1

公开(公告)日：2015-04-23

申请号：US14454656

申请日：2014-08-07

申请人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

IPC分类号： H01L21/82 ,  H01L21/3065

CPC分类号： H01L21/78 ,  B23K26/0006 ,  B23K26/0624 ,  B23K26/50 ,  B23K26/53 ,  B23K26/57 ,  B23K2101/40 ,  B23K2103/56 ,  H01L21/3065 ,  H01L21/82

摘要： Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.

摘要翻译： 描述了无掩模混合激光划线和等离子体蚀刻晶片切割工艺。 在一个示例中，将具有其上具有多个集成电路的前表面的半导体晶片切割并且具有设置在其上并且覆盖集成电路的金属柱/焊料凸块对之间的钝化层的方法包括激光划线，而不使用 掩模层，钝化层以提供暴露半导体晶片的划线。 该方法还包括通过划线等离子体蚀刻半导体晶片以对集成电路进行分离，其中钝化层在等离子体蚀刻的至少一部分期间保护集成电路。 该方法还涉及使钝化层变薄以部分地暴露集成电路的金属柱/焊料凸块对。

公开(公告)号：US08975163B1

公开(公告)日：2015-03-10

申请号：US14249891

申请日：2014-04-10

申请人： Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/46 ,  H01L21/78 ,  H01L23/544

CPC分类号： H01L21/78 ,  H01L21/6836 ,  H01L2221/68318 ,  H01L2221/68327

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer comprising a plurality of integrated circuits involves forming a mask above the semiconductor wafer. The mask includes a layer covering and protecting the integrated circuits. The semiconductor wafer has a thickness. The method also involves laser scribing the mask and a majority of the thickness of the semiconductor wafer to provide scribe lines in the mask and the semiconductor wafer. The scribe lines are formed between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，包括多个集成电路的半导体晶片的切割方法包括在半导体晶片上形成掩模。 掩模包括覆盖并保护集成电路的层。 半导体晶片具有厚度。 该方法还包括激光划线掩模和半导体晶片的大部分厚度，以在掩模和半导体晶片中提供划线。 划线在集成电路之间形成。 该方法还涉及通过划线等离子体蚀刻半导体晶片以对集成电路进行分离。

公开(公告)号：US08932939B1

公开(公告)日：2015-01-13

申请号：US14252597

申请日：2014-04-14

申请人： Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/683 ,  H01L21/78

CPC分类号： H01L21/6836 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/561 ,  H01L21/563 ,  H01L21/67069 ,  H01L21/67115 ,  H01L21/67207 ,  H01L21/78 ,  H01L23/3114 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2924/014

摘要： Methods and systems for forming water soluble masks by dry film lamination are described. Also described are methods of wafer dicing, including formation of a water soluble mask by dry film lamination. In one embodiment, a method involves moisturizing an inner area of a water soluble dry film. The method involves stretching the water soluble dry film over a surface of the semiconductor wafer, and attaching the moistened inner area of the stretched film to the surface of the semiconductor wafer. A method of wafer dicing may further involve patterning the water soluble dry film, exposing regions of the semiconductor wafer between the ICs, and etching the semiconductor wafer through gaps in the patterned water soluble dry film.

摘要翻译： 描述了通过干膜层压形成水溶性掩模的方法和系统。 还描述了晶片切割的方法，包括通过干膜层压形成水溶性掩模。 在一个实施方案中，一种方法涉及保湿水溶性干膜的内部区域。 该方法包括在半导体晶片的表面上拉伸水溶性干膜，并将拉伸膜的湿润内部区域附着到半导体晶片的表面。 晶片切割的方法还可以包括图案化水溶性干膜，暴露半导体晶片在IC之间的区域，以及通过图案化的水溶性干膜中的间隙蚀刻半导体晶片。

公开(公告)号：US09601375B2

公开(公告)日：2017-03-21

申请号：US14697391

申请日：2015-04-27

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Jungrae Park ,  Ajay Kumar ,  James S. Papanu ,  Prabhat Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Jungrae Park ,  Ajay Kumar ,  James S. Papanu ,  Prabhat Kumar

IPC分类号： H01L21/301 ,  H01L21/46 ,  H01L21/78 ,  H01L21/447 ,  H01L21/48 ,  H01L21/50 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/268 ,  H01L21/67 ,  H01L21/683

CPC分类号： H01L21/78 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side of the semiconductor wafer includes adhering a back side the semiconductor wafer on the dicing tape of a substrate carrier. Subsequent to adhering the semiconductor wafer on a dicing tape, the dicing tape is treated with a UV-cure process. Subsequent to treating the dicing tape with the UV-cure process, a dicing mask is formed on the front side of the semiconductor wafer, the dicing mask covering and protecting the integrated circuits. The dicing mask is patterned with a laser scribing process to provide gaps in the dicing mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the dicing mask layer to singulate the integrated circuits.

公开(公告)号：US09349648B2

公开(公告)日：2016-05-24

申请号：US14337810

申请日：2014-07-22

申请人： Wei-Sheng Lei ,  Prabhat Kumar ,  Jungrae Park ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Prabhat Kumar ,  Jungrae Park ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/822 ,  H01L21/02 ,  H01L21/033 ,  H01L21/67

CPC分类号： H01L21/822 ,  B23K26/0732 ,  B23K26/364 ,  B23K2103/56 ,  H01L21/02057 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/31105 ,  H01L21/32131 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/78

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a top hat laser beam profile laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个例子中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护集成电路的层组成。 然后用顶帽激光束轮廓激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。