公开(公告)号：US4056737A

公开(公告)日：1977-11-01

申请号：US720885

申请日：1976-09-07

Applicant: Carlo Heinrich Sequin

Inventor： Carlo Heinrich Sequin

IPC: G11C11/34 ,  G11C19/28 ,  H01L21/339 ,  H01L21/70 ,  H01L29/762 ,  H01L29/768 ,  H03H15/02 ,  H03K3/353 ,  H01L29/78 ,  H03H7/10

CPC classification number: H03H15/02 ,  G11C11/34 ,  G11C19/28 ,  H01L21/70 ,  H01L29/76808

Abstract: An on-chip semiconductor pre-filter device is designed with a prescribed low frequency passband (0 to f) and a prescribed stopband (F.+-.f), with a frequency roll-off therebetween. The pre-filter performs a weighted averaging of signal samples taken from an input electrical signal at a suitable sampling frequency and converts the weighted average into an equivalent charge packet for input by injection into a semiconductor charge coupled device (CCD) driven on the same chip by a clock of frequency F. In this way, the "reflected" parts (in band: F.+-.f) of the frequency spectrum of the CCD are suppressed from the input to the CCD, thereby suppressing undesired aliasing in the CCD.

Abstract translation: 片上半导体预滤波器器件设计成具有规定的低频通带（0至f）和规定的阻带（F +/- f），其间具有频率滚降。 预滤波器以合适的采样频率对从输入电信号中取出的信号样本进行加权平均，并将加权平均值转换为等效电荷分组，以便通过注入到同一芯片上驱动的半导体电荷耦合器件（CCD）中进行输入 以这种方式，CCD的频谱的“反射”部分（在频带：F +/- f）被抑制到CCD的输入，从而抑制CCD中的不期望的混叠。

公开(公告)号：US4048525A

公开(公告)日：1977-09-13

申请号：US609496

申请日：1975-09-02

Applicant: Howard S. Goldberg ,  William E. Engeler

Inventor： Howard S. Goldberg ,  William E. Engeler

IPC: G11C27/04 ,  H01L29/768 ,  H03H15/02 ,  H03K5/20 ,  G11C19/28 ,  H03H7/10 ,  H03K5/08

CPC classification number: H03H15/02 ,  G11C27/04 ,  H01L29/76816

Abstract: The output circuit includes a high gain differential amplifier having an inverting input terminal, a non-inverting input terminal and an output terminal with a feedback capacitance connected between the output terminal and the inverting input terminal. The input terminals are connected to first and second commonly phased lines of the charge transfer transversal filter. A first switchable impedance means is connected between the first line and the output terminal. A second switchable impedance means is connected between the second line and a d-c source of voltage. The lines are charged periodically to the voltage of the source by the first and second switchable impedance means prior to the transfer of charge in a cycle of operation of the filter and are then isolated from the source during the transfer of charge in the filter by the first and second switchable impedance means.

Abstract translation: 输出电路包括具有反相输入端子，非反相输入端子和连接在输出端子和反相输入端子之间的反馈电容器的输出端子的高增益差分放大器。 输入端子连接到电荷转移横向滤波器的第一和第二共同相位线。 第一可切换阻抗装置连接在第一线路和输出端子之间。 第二可切换阻抗装置连接在第二线路和d-c电压源之间。 在滤波器的操作周期中，在电荷转移之前，线路通过第一和第二可切换阻抗装置周期性地被充电到电源电压，然后在滤波器中的电荷转移期间与源极隔离 第一和第二可切换阻抗装置。

公开(公告)号：US4039978A

公开(公告)日：1977-08-02

申请号：US676037

申请日：1976-04-12

Applicant: Lawrence Griffith Heller

Inventor： Lawrence Griffith Heller

IPC: H03H15/02 ,  H03H7/28 ,  G11C11/40 ,  H03H7/14 ,  H03K25/02

CPC classification number: H03H15/02

Abstract: A transversal filter structure employing charge transfer techniques which are embodied in charge-coupled-devices although bucket brigade devices may also be used. In the structure an input analog signal is time sampled and for each sample a sequence of charge packets Q/2, Q/4, Q/8 . . . Q/2.sup.n is generated. Each sequence of charge packets is entered into a serial charge-coupled-device register and each separate charge packet is then entered into a plurality of n parallel charge-coupled-device registers according to the fractional distribution, i.e. Q1/2, Q2/2, Q3/2 . . . Qk/2 in one register, Q1/4, Q2/4, Q3/4 . . . Qk/4 in another register, up to Q1/2.sup.n, Q2/2.sup.n, Q3/2.sup.n. . . Qk/2.sup.n in a last register. The charge packets in the parallel registers represent the time sampled analog input signal divided by 1, 2, 4, 8, . . . 2.sup.n respectively, and tap weights of +1, -1 and 0 are applied by means of logic control and FET switches. The tap weights are bussed together, summed and differenced and the difference signal is the filter output signal.

公开(公告)号：US4034199A

公开(公告)日：1977-07-05

申请号：US638569

申请日：1975-12-08

Applicant: Donald R. Lampe ,  Marvin H. White ,  James H. Mims

Inventor： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

IPC: G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  G11C11/40 ,  H03K5/159

CPC classification number: H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

Abstract: A programmable analog transversal filter is disclosed for processing analog signals and comprising a charge-coupled device (CCD) for receiving a series of discrete analog signals to be delayed by increasing periods and applied to the outputs of the CCD, and a plurality of MNOS memory devices coupled to the taps of the CCD and programmed so that the output of a CCD tap is multiplied by a particular factor. In turn, the outputs of the MNOS memory devices are summed to provide an output signal ##EQU1## where W.sub.k is the weighting factor associated the k.sup.th MNOS memory device. The weighting factors are set into the system by varying the threshold voltage of the corresponding MNOS device. Positive and negative weighting factors are implemented by using first and second MNOS memory elements for each tap of the CCD, whereby depending upon the program incorporated into the system, one of the first and second MNOS memory devices is programmed to give either a positive weighting factor and the other MNOS memory device a negative weighting factor. Further, a reiterative method of setting the weights into the MNOS memory device is used to compare the system output indicative of the weighting factor as set into the MNOS memory devices, with the desired weighting factor as stored in a suitable storage memory such as a ROM, whereby a correction signal is developed to adjust the threshold voltage V.sub.Th of the MNOS memory device in accordance with the stored weighting factor. In one illustrative embodiment, the weighting factors are set in accordance with sinusoidal signals, whereby the system performs a filtering function to provide an output upon receipt of an input signal of desired frequency. In addition, the MNOS devices are reprogrammable, thus permitting a single such system to be used in many different applications. In this regard, this system is particularly adapted for complex signal processing including filtering, generating desired functions, synthetic aperture radar signal processing and target identification processing.

公开(公告)号：US4005377A

公开(公告)日：1977-01-25

申请号：US609414

申请日：1975-09-02

Applicant: William E. Engeler

Inventor： William E. Engeler

IPC: G11C19/28 ,  H01L29/768 ,  H03H15/02 ,  H03H7/28 ,  H01L29/10 ,  H01L29/78 ,  H03K25/02

CPC classification number: H01L29/76866 ,  G11C19/287 ,  H03H15/02

Abstract: In a charge transfer transversal filter a substrate of one conductivity type semiconductor material is provided. A plurality of electrodes insulatingly overlie the substrate and form therewith a plurality of stages of a charge transfer shift register. One electrode of each of the stages is split into a first and a second part with a small gap therebetween. A region of opposite conductivity type is provided in the substrate underlying each of the gaps to electrically couple the pair of storage regions underlying each of the one electrodes. A first clock line is connected to the first parts of the one electrodes. A second clock line is connected to the second parts of the one electrodes. Means are provided for applying phase related voltage to each of the stages of the shift register to effect transfer of charge from stage to stage. The same voltage is applied to the first and second clock lines.

Abstract translation: 在电荷转移横向滤波器中，提供一种导电型半导体材料的衬底。 多个电极绝缘地覆盖在衬底上并与其形成多个级的电荷转移移位寄存器。 每个级的一个电极被分成具有小间隙的第一和第二部分。 在每个间隙下方的衬底中提供相反导电类型的区域，以电耦合一个电极下面的一对存储区域。 第一时钟线连接到一个电极的第一部分。 第二时钟线连接到一个电极的第二部分。 提供了用于向移位寄存器的每个级施加相位相关电压以实现电荷从阶段到阶段的转移的装置。 相同的电压施加到第一和第二时钟线。

公开(公告)号：US3971998A

公开(公告)日：1976-07-27

申请号：US574028

申请日：1975-05-02

Applicant: Bhaskarpillai Gopinath ,  Robert Paul Kurshan

Inventor： Bhaskarpillai Gopinath ,  Robert Paul Kurshan

IPC: H03B5/00 ,  H03B28/00 ,  H03D1/00 ,  H03D3/00 ,  H03H15/00 ,  H03H15/02 ,  H03H17/00 ,  H03H17/04 ,  H03H21/00 ,  H04B1/06 ,  H04B3/04 ,  H04L27/00 ,  H04W84/00 ,  H04B15/00 ,  H03B1/04

CPC classification number: H04W84/00 ,  H03B28/00 ,  H03D1/00 ,  H03D3/00 ,  H03H17/028 ,  H03H17/04 ,  H04B1/06

Abstract: Disclosed is a recursive circuit capable of serving as a signal detector or as a signal generator. The circuit comprises a shift register capable of storing multilevel signals, and a feedback network responsive to an input signal and to the output signals of selected stages of the shift register. In the feedback network, the output signals of the selected stages are each multiplied by prechosen integers, and then added with the input signal to form a sum signal which is applied to the first stage of the shift register. The sum signal is developed by nonmodulo addition, and the multiplying integers are prechosen to cause the characteristic function of the circuit to be a cyclotomic polynomial. Detection of the presence in the input signal of a signal having a chosen frequency is accomplished by the sum signal excluding a predetermined threshold level. Signal generation is accomplished by presetting the register to a nonzero state and allowing the output signal to develop in accordance with the characteristic function of the circuit.

Abstract translation: 公开了能够用作信号检测器或信号发生器的递归电路。 该电路包括能够存储多电平信号的移位寄存器和响应于输入信号和移位寄存器的选定级的输出信号的反馈网络。 在反馈网络中，所选级的输出信号各乘以预选整数，然后与输入信号相加，形成加到移位寄存器的第一级的和信号。 总和信号是通过非模态加法产生的，并且乘法整数被预先选择以使电路的特征函数成为一个循环多项式。 通过除了预定阈值电平之和的和信号来检测在具有选定频率的信号的输入信号中的存在。 通过将寄存器预置到非零状态并根据电路的特征功能允许输出信号产生来实现信号生成。

公开(公告)号：US3935477A

公开(公告)日：1976-01-27

申请号：US512848

申请日：1974-10-07

Applicant: Robert Joseph Strain ,  Robert Henry Walden

Inventor： Robert Joseph Strain ,  Robert Henry Walden

IPC: G11C27/04 ,  H01L21/339 ,  H01L29/762 ,  H01L29/768 ,  H03F3/16 ,  H03H15/02 ,  H03K19/40 ,  H01L27/04 ,  H01L29/80

CPC classification number: G11C27/04 ,  H01L29/76875 ,  H03F3/16 ,  H03H15/02

Abstract: In charge transfer apparatus, an analog inverter comprises a charge storage medium to which are applied varying voltages through a plurality of electrodes, illustratively: a source electrode, a reference electrode and a collector electrode arranged in tandem. Between the source and reference electrodes there is a first control electrode and, in one embodiment, between the reference and collector electrodes there is a second control electrode and a signal electrode. With the electrical signal to be inverted connected to the signal electrode, analog inversion, a form of complementing function, occurs as follows: (1) during the first phase of the clock cycle, a voltage is applied to the first control electrode effective to cause a fixed amount of charge to be transferred from the source to a reference potential well established under the reference electrode; (2) during the second phase of the clock cycle, a voltage is applied to the second control electrode effective to increase the surface potential thereunder and to permit charge to be transferred into a potential well under the collector electrode; this charge establishes a new surface potential which, apart from an additive constant is equal to the inverted signal voltage. In other embodiments in which the analog signal is of a self-strobing type (e.g., the output of a C4D or BB) the second control electrode is not required.

Abstract translation: 在电荷转移装置中，模拟反相器包括电荷存储介质，电荷存储介质通过多个电极施加变化的电压，例如：串联布置的源电极，参考电极和集电极。 在源极和参考电极之间存在第一控制电极，并且在一个实施例中，在参考电极和集电极之间存在第二控制电极和信号电极。 在电信号被反相连接到信号电极的情况下，模拟反相（一种形式的互补功能）发生如下：（1）在时钟周期的第一阶段期间，向第一控制电极施加电压以有效地引起 将固定量的电荷从源极转移到参考电极下良好建立的参考电位; （2）在时钟周期的第二阶段期间，向第二控制电极施加电压，有效地增加其周围的表面电位，并允许电荷转移到集电极下方的势阱中; 该电荷建立新的表面电位，除了加法常数等于反相信号电压之外。 在其中模拟信号具有自选频型（例如，C4D或BB的输出）的其它实施例中，不需要第二控制电极。

公开(公告)号：US3935439A

公开(公告)日：1976-01-27

申请号：US487105

申请日：1974-07-12

Applicant: Dennis Darcy Buss ,  Walter Howard Bailey

Inventor： Dennis Darcy Buss ,  Walter Howard Bailey

IPC: G06G7/19 ,  H03H15/02 ,  G11C11/40

CPC classification number: G06G7/1907 ,  H03H15/02 ,  H03H2015/026

Abstract: A variable tap weight convolution filter comprised of charge transfer devices which may be charge coupled devices, bucket brigade devices or a combination of the two, for performing convolutions of an input signal with tap weights from a second input signal, said tap weights varying as a function of time.

Abstract translation: 一种可变抽头权重卷积滤波器，其包括可以是电荷耦合器件，桶式装置或两者的组合的电荷转移装置，用于执行输入信号与来自第二输入信号的抽头权重的卷积，所述抽头权重变化为 时间的功能

公开(公告)号：US3931510A

公开(公告)日：1976-01-06

申请号：US487104

申请日：1974-07-12

Applicant: Allan R. Kmetz

Inventor： Allan R. Kmetz

IPC: G11C27/04 ,  H03H15/02 ,  G11C11/40 ,  H03K5/159

CPC classification number: H03H15/02 ,  G11C27/04

Abstract: A dispersion compensated CTD controlled data display where a serial-parallel-serial CTD is loaded at a low data rate with clock means to shift data from the CTD at a high data rate. A transversal filter is connected in series with the CTD to provide a dispersion corrected output of the data. The output is applied to the input of the CTD at the high data rate and to a display unit with reloading of the CTD to change the display.

Abstract translation: 色散补偿CTD控制数据显示，其中串行并行串行CTD以低数据速率加载，具有时钟装置，以高数据速率从CTD移位数据。 横向滤波器与CTD串联连接以提供数据的色散校正输出。 输出以高数据速率应用于CTD的输入，并且通过重新加载CTD来更改显示器。

公开(公告)号：US3621402A

公开(公告)日：1971-11-16

申请号：US3621402D

申请日：1970-08-03

Applicant: BELL TELEPHONE LABOR INC

Inventor： GARDNER WILLIAM ALLEN

IPC: H03H15/02 ,  H03K23/00

CPC classification number: H03H15/02

Abstract: A sampled data filter is disclosed comprising a plurality of amplifiers interconnected by delay units and feedback resistors. Each delay unit comprises the cascade connection of actuable switches and storage capacitors. The values of the capacitors and feedback resistors are preselected to obtain a desired transfer function and to nullify the effects of residual capacitor charge.