摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.
摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.
摘要:
Methods and apparatuses for Micro-Electro-Mechanical Systems (MEMS) resonator to monitor temperature in an integrated circuit. Fabricating the resonator in an interconnect layer provides a way to implement thermal detection means which is tolerant of manufacturing process variations. Sensor readout and control circuits can be on silicon if desired, for example, a positive feedback amplifier to form an oscillator in conjunction with the resonator and a counter to count oscillator frequency.
摘要:
Methods and apparatuses for Micro-Electro-Mechanical Systems (MEMS) resonator to monitor temperature in an integrated circuit. Fabricating the resonator in an interconnect layer provides a way to implement thermal detection means which is tolerant of manufacturing process variations. Sensor readout and control circuits can be on silicon if desired, for example, a positive feedback amplifier to form an oscillator in conjunction with the resonator and a counter to count oscillator frequency.
摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.
摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.
摘要:
Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.
摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.
摘要:
Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.
摘要:
A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.