公开(公告)号：US08827550B2

公开(公告)日：2014-09-09

申请号：US12646833

申请日：2009-12-23

申请人： Mohamed A. Abdelmoneum ,  Tawfik M. Rahal-Arabi ,  Gregory F. Taylor ,  Kevin J. Fischer ,  Andrew Yeoh

发明人： Mohamed A. Abdelmoneum ,  Tawfik M. Rahal-Arabi ,  Gregory F. Taylor ,  Kevin J. Fischer ,  Andrew Yeoh

IPC分类号： G01K11/00 ,  G01K7/32

CPC分类号： G01K7/32

摘要： Methods and apparatuses for Micro-Electro-Mechanical Systems (MEMS) resonator to monitor temperature in an integrated circuit. Fabricating the resonator in an interconnect layer provides a way to implement thermal detection means which is tolerant of manufacturing process variations. Sensor readout and control circuits can be on silicon if desired, for example, a positive feedback amplifier to form an oscillator in conjunction with the resonator and a counter to count oscillator frequency.

摘要翻译： 微机电系统（MEMS）谐振器用于监测集成电路中的温度的方法和装置。 在互连层中制造谐振器提供了实现热检测装置的方式，该装置容忍制造工艺变化。 如果需要，传感器读出和控制电路可以在硅上，例如，正反馈放大器以与谐振器一起形成振荡器，并计数振荡器频率。

公开(公告)号：US20110150031A1

公开(公告)日：2011-06-23

申请号：US12646833

申请日：2009-12-23

申请人： Mohamed A. Abdelmoneum ,  Tawfik M. Rahal-Arabi ,  Gregory F. Taylor ,  Kevin J. Fischer ,  Andrew Yeoh

发明人： Mohamed A. Abdelmoneum ,  Tawfik M. Rahal-Arabi ,  Gregory F. Taylor ,  Kevin J. Fischer ,  Andrew Yeoh

IPC分类号： G01K11/26

CPC分类号： G01K7/32

摘要： Methods and apparatuses for Micro-Electro-Mechanical Systems (MEMS) resonator to monitor temperature in an integrated circuit. Fabricating the resonator in an interconnect layer provides a way to implement thermal detection means which is tolerant of manufacturing process variations. Sensor readout and control circuits can be on silicon if desired, for example, a positive feedback amplifier to form an oscillator in conjunction with the resonator and a counter to count oscillator frequency.

摘要翻译： 微机电系统（MEMS）谐振器用于监测集成电路中的温度的方法和装置。 在互连层中制造谐振器提供了实现热检测装置的方式，该装置容忍制造工艺变化。 如果需要，传感器读出和控制电路可以在硅上，例如，正反馈放大器以与谐振器一起形成振荡器，并计数振荡器频率。

公开(公告)号：US20050255694A1

公开(公告)日：2005-11-17

申请号：US11118508

申请日：2005-04-28

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L21/285 ,  H01L21/321 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/53228 ,  H01L21/2855 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76877 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.

摘要翻译： 描述了在半导体制造过程期间减少金属层的CMP的形貌的方法。 在抛光之前将少量溶质引入导电金属层中，导致具有导电性和电迁移性的材料与纯金属非常相似或优于其他材料，同时具有与周围的硬度更接近的硬度 氧化物介电层。 这样可以更好地控制CMP工艺，减少凹陷和氧化物侵蚀。 本发明的次要优点可以是消除由浆料中的磨料颗粒引起的导电层中的表面损伤和嵌入的颗粒。

公开(公告)号：US20050250323A1

公开(公告)日：2005-11-10

申请号：US11181610

申请日：2005-07-13

申请人： John Barnak ,  Gerald Feldewerth ,  Ming Fang ,  Kevin Lee ,  Tzuen-Luh Huang ,  Harry Liang ,  Seshu Sattiraju ,  Margherita Chang ,  Andrew Yeoh

发明人： John Barnak ,  Gerald Feldewerth ,  Ming Fang ,  Kevin Lee ,  Tzuen-Luh Huang ,  Harry Liang ,  Seshu Sattiraju ,  Margherita Chang ,  Andrew Yeoh

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2924/00

摘要： Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.

摘要翻译： 制造凸起下金属化结构的装置和方法包括邻接导电垫的粘附层，邻接粘合层的含钼阻挡层，邻接含钼阻挡层的润湿层和邻接润湿剂的高锡含量焊料 层。 润湿层可以基本上包含在形成金属间化合物层的高含量焊料中。 含钼阻挡层防止高锡含量焊料材料中的锡的移动不会迁移到邻接导电焊盘的电介质层，并可能导致分层和/或攻击可能存在的任何下面的结构，特别是铜结构。

公开(公告)号：US07145244B2

公开(公告)日：2006-12-05

申请号：US11118508

申请日：2005-04-28

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/53228 ,  H01L21/2855 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76877 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.

公开(公告)号：US07285496B2

公开(公告)日：2007-10-23

申请号：US11264893

申请日：2005-11-01

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： H01L21/3212 ,  C23C14/185 ,  C23C14/5853 ,  H01L21/7684 ,  H01L21/76877

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.

摘要翻译： 描述了在半导体制造过程期间减少金属层的CMP的形貌的方法。 在抛光之前将少量溶质引入导电金属层中，导致具有导电性和电迁移性的材料与纯金属非常相似或优于其他材料，同时具有与周围的硬度更接近的硬度 氧化物介电层。 这样可以更好地控制CMP工艺，减少凹陷和氧化物侵蚀。 本发明的次要优点可以是消除由浆料中的磨料颗粒引起的导电层中的表面损伤和嵌入的颗粒。

公开(公告)号：US20060246725A1

公开(公告)日：2006-11-02

申请号：US11264893

申请日：2005-11-01

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/3212 ,  C23C14/185 ,  C23C14/5853 ,  H01L21/7684 ,  H01L21/76877

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.

公开(公告)号：US06979646B2

公开(公告)日：2005-12-27

申请号：US09751215

申请日：2000-12-29

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L21/285 ,  H01L21/321 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L23/53228 ,  H01L21/2855 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76877 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.

公开(公告)号：US20050212133A1

公开(公告)日：2005-09-29

申请号：US10812464

申请日：2004-03-29

申请人： John Barnak ,  Gerald Feldewerth ,  Ming Fang ,  Kevin Lee ,  Tzuen-Luh Huang ,  Harry Liang ,  Seshu Sattiraju ,  Margherita Chang ,  Andrew Yeoh

发明人： John Barnak ,  Gerald Feldewerth ,  Ming Fang ,  Kevin Lee ,  Tzuen-Luh Huang ,  Harry Liang ,  Seshu Sattiraju ,  Margherita Chang ,  Andrew Yeoh

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L21/00 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2924/00

摘要： Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.

摘要翻译： 制造凸起下金属化结构的装置和方法包括邻接导电垫的粘附层，邻接粘合层的含钼阻挡层，邻接含钼阻挡层的润湿层和邻接润湿剂的高锡含量焊料 层。 润湿层可以基本上包含在形成金属间化合物层的高含量焊料中。 含钼阻挡层防止高锡含量焊料材料中的锡的移动不会迁移到邻接导电焊盘的电介质层，并可能导致分层和/或攻击可能存在的任何下面的结构，特别是铜结构。

公开(公告)号：US06909192B2

公开(公告)日：2005-06-21

申请号：US10043736

申请日：2002-01-09

申请人： Andrew Yeoh

发明人： Andrew Yeoh

IPC分类号： H01L21/285 ,  H01L21/321 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L23/53228 ,  H01L21/2855 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76877 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for reducing the topography from CMP of metal layers during the semiconductor manufacturing process is described. Small amounts of solute are introduced into the conductive metal layer before polishing, resulting in a material with electrical conductivity and electromigration properties that are very similar or superior to that of the pure metal, while having hardness that is more closely matched to that of the surrounding oxide dielectric layers. This may allow for better control of the CMP process, with less dishing and oxide erosion a result. A secondary benefit of this invention may be the elimination of superficial damage and embedded particles in the conductive layers caused by the abrasive particles in the slurries.