中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

7 records (took 0.012 seconds)

    Semiconductor Process, Semiconductor Element and Package Having Semiconductor Element
    2.
    发明申请
    Semiconductor Process, Semiconductor Element and Package Having Semiconductor Element 审中-公开
    半导体工艺，具有半导体元件的半导体元件和封装

    公开(公告)号：US20110156268A1

    公开(公告)日：2011-06-30

    申请号：US12818720

    申请日：2010-06-18

    Applicant: Bin-Hong Cheng

    Inventor： Bin-Hong Cheng

    IPC: H01L23/48 ,  H01L21/311

    CPC classification number: H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16238 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2224/05552

    Abstract: The present invention relates to a semiconductor process, a semiconductor element and a package having a semiconductor element. The semiconductor process includes the following steps: (a) providing a semiconductor element including a silicon base material and at least one conductive via structure disposed in the silicon base material; (b) removing part of the silicon base material to form a first surface, wherein the conductive via structure protrudes from the first surface of the silicon base material so as to form a through via structure; (c) forming a protective layer on the first surface of the silicon base material to cover the through via structure, wherein the protective layer is made of photo-sensitive material; (d) removing part of the protective layer to form a first surface, so as to expose the through via structure on the first surface of the protective layer. Whereby, the protective layer disposed on the through via structure is totally removed, so that the yield rate of electrically connecting the through via structure and external elements is ensured.

    Abstract translation: 本发明涉及半导体工艺，半导体元件和具有半导体元件的封装。 半导体工艺包括以下步骤：（a）提供包括硅基材料和设置在硅基材料中的至少一个导电通孔结构的半导体元件; （b）去除所述硅基材料的一部分以形成第一表面，其中所述导电通孔结构从所述硅基材料的所述第一表面突出以形成通孔结构; （c）在硅基材的第一表面上形成保护层以覆盖通孔结构，其中保护层由光敏材料制成; （d）去除保护层的一部分以形成第一表面，以便在保护层的第一表面上暴露通孔结构。 由此，设置在通孔结构上的保护层被完全去除，从而确保了电连接通孔结构和外部元件的成品率。

    Semiconductor Device and Semiconductor Process for Making the Same
    6.
    发明申请
    Semiconductor Device and Semiconductor Process for Making the Same 审中-公开
    半导体器件和半导体工艺相同

    公开(公告)号：US20120049358A1

    公开(公告)日：2012-03-01

    申请号：US12862428

    申请日：2010-08-24

    Applicant: Bin-Hong Cheng

    Inventor： Bin-Hong Cheng

    IPC: H01L23/48 ,  H01L21/768 ,  H01L23/488 ,  H01L21/60

    CPC classification number: H01L21/76898 ,  H01L21/563 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/00

    Abstract: The present invention relates to a semiconductor device and a semiconductor process for making the same. The semiconductor device of the present invention includes a semiconductor substrate, at least one conductive via and at least one insulation ring. The semiconductor substrate has a first surface. The conductive via is disposed in the semiconductor substrate. Each conductive via has a conductor and an insulation wall disposed the peripheral of the conductor, and the conductive via is exposed on the first surface of the semiconductor substrate. The insulation ring is disposed the peripheral of the conductive via, and the depth of the insulation ring is smaller than that of the insulation wall. Since the insulation ring is disposed the peripheral of the conductive via, the insulation ring can protect the end of the conductive via from being damaged. Furthermore, the size of the insulation ring and the conductive via is larger than the conventional conductive via, the semiconductor device of the invention can utilize surface finish layer, RDL or UBM to easily connect the other semiconductor device.

    Abstract translation: 本发明涉及半导体器件及其制造方法。 本发明的半导体器件包括半导体衬底，至少一个导电通孔和至少一个绝缘环。 半导体衬底具有第一表面。 导电通孔设置在半导体衬底中。 每个导电通孔具有布置在导体周边的导体和绝缘壁，并且导电通孔暴露在半导体衬底的第一表面上。 绝缘环设置在导电通孔的周边，绝缘环的深度小于绝缘壁的深度。 由于绝缘环设置在导电通孔的周边，绝缘环可以保护导电通孔的端部不被损坏。 此外，绝缘环和导电通孔的尺寸大于常规导电通孔，本发明的半导体器件可以利用表面光洁度层，RDL或UBM来容易地连接另一半导体器件。

Patent Agency Ranking