Method for fabricating a solid electrolyte memory device and solid electrolyte memory device
    1.
    发明授权
    Method for fabricating a solid electrolyte memory device and solid electrolyte memory device 失效
    固体电解质存储器件和固体电解质存储器件的制造方法

    公开(公告)号:US07658773B2

    公开(公告)日:2010-02-09

    申请号:US11541391

    申请日:2006-09-29

    申请人: Cay-Uwe Pinnow

    发明人: Cay-Uwe Pinnow

    IPC分类号: H01G9/00 H01L21/20

    摘要: A method for fabricating a solid electrolyte memory device comprises a plurality of solid electrolyte memory cells, the solid electrolyte memory cells sharing a common continuous solid electrolyte layer comprising solid electrolyte cell areas and solid electrolyte inter-cell areas, the method comprising the process of introducing mobile ion solubility reducing material or mobile ion mobility reducing material into the solid electrolyte inter-cell areas.

    摘要翻译: 一种制造固体电解质存储器件的方法,包括多个固体电解质存储单元,所述固体电解质存储单元共享包含固体电解质电池区域和固体电解质电池间区域的常见连续固体电解质层,所述方法包括引入 移动离子溶解度降低材料或移动离子迁移率降低材料进入固体电解质细胞间区域。

    Memory cell with nanocrystals or nanodots
    4.
    发明授权
    Memory cell with nanocrystals or nanodots 有权
    具有纳米晶体或纳米点的记忆体

    公开(公告)号:US07119395B2

    公开(公告)日:2006-10-10

    申请号:US10916013

    申请日:2004-08-11

    IPC分类号: H01L29/788

    摘要: The storage layer (6) is in each case present above a region in which the channel region (3) adjoins a source/drain region (2) and is in each case interrupted above an intervening middle part of the channel region (3). The storage layer (6) is formed by material of the gate dielectric (4) and contains silicon or germanium nanocrystals or nanodots introduced through ion implantation. The gate electrode (5) is widened at the flanks by electrically conductive spacers (7).

    摘要翻译: 存储层(6)在每种情况下都存在于沟道区域(3)邻接源极/漏极区域(2)的区域上方,并且在每个情况下都被中断在沟道区域(3)的中间部分之上。 存储层(6)由栅极电介质(4)的材料形成,并且包含通过离子注入引入的硅或锗纳米晶体或纳米点。 栅电极(5)通过导电间隔物(7)在侧面加宽。

    Method for manufacturing an electrolyte material layer in semiconductor memory devices
    5.
    发明申请
    Method for manufacturing an electrolyte material layer in semiconductor memory devices 失效
    在半导体存储器件中制造电解质材料层的方法

    公开(公告)号:US20060205110A1

    公开(公告)日:2006-09-14

    申请号:US11076027

    申请日:2005-03-10

    摘要: A method for manufacturing an electrolyte material layer with a chalcogenide material incorporated or deposited therein for use in semiconductor memory devices, in particular resistively-switching memory devices or components. The method comprises the steps of producing a semiconductor substrate, depositing a binary chalcogenide layer onto the semiconductor substrate, depositing a sulphur-containing layer onto the binary chalcogenide layer, and creating a ternary chalcogenide layer comprising at least two different chalcogenide compounds ASexSy. One component A of the chalcogenide compounds ASexSy comprises materials of the IV elements main group, e.g., Ge, Si, or of a transition metal, preferably of the group consisting of Zn, Cd, Hg, or a combination thereof.

    摘要翻译: 一种用于制造电解质材料层的方法,所述电解质材料层具有结合或沉积在其中用于半导体存储器件,特别是电阻切换存储器件或部件的硫族化物材料。 该方法包括以下步骤:制造半导体衬底,在半导体衬底上沉积二元硫族化物层,在二元硫族化物层上沉积含硫层,以及产生包含至少两种不同硫属化物化合物的三元硫族化物层, x 。 硫属化物化合物的一个组分A包括IV元素主要组分的材料,例如Ge,Si或过渡金属,优选基团 由Zn,Cd,Hg或其组合组成。

    Sub-lithographic structures, devices including such structures, and methods for producing the same
    6.
    发明申请
    Sub-lithographic structures, devices including such structures, and methods for producing the same 有权
    亚光刻结构,包括这种结构的装置及其制造方法

    公开(公告)号:US20060091476A1

    公开(公告)日:2006-05-04

    申请号:US11258367

    申请日:2005-10-26

    摘要: A method which makes it possible to define in a patterning layer openings having a first dimension that is substantially less than the feature size that can be obtained lithographically includes applying a sacrificial layer made of a material that is different from that of the patterning layer in a predetermined layer thickness on the patterning layer. Afterward, a photoresist layer is applied on the surface of the sacrificial layer, and an opening having a second dimension is defined lithographically in the photoresist layer. Afterward, an etching angle is set in a manner dependent on the layer thickness of the sacrificial layer and also the first and second dimensions, and the sacrificial layer is etched at the etching angle set. Afterward, the patterning layer is etched, the sacrificial layer is removed and a filling material is introduced into the opening produced in the patterning layer.

    摘要翻译: 可以在图案化层中限定具有基本上小于可以光刻获得的特征尺寸的第一尺寸的开口的方法,包括将由不同于图案形成层的材料制成的牺牲层 图案化层上的预定层厚度。 之后,在牺牲层的表面上施加光致抗蚀剂层,并且在光致抗蚀剂层中光刻地限定具有第二尺寸的开口。 之后,以取决于牺牲层的层厚度以及第一和第二尺寸的方式设置蚀刻角度,并且以蚀刻角度设置蚀刻牺牲层。 之后,蚀刻图形层,去除牺牲层,并将填充材料引入图案化层中产生的开口中。

    Method for producing memory having a solid electrolyte material region
    7.
    发明授权
    Method for producing memory having a solid electrolyte material region 有权
    具有固体电解质材料区域的记忆体的制造方法

    公开(公告)号:US08062694B2

    公开(公告)日:2011-11-22

    申请号:US12913565

    申请日:2010-10-27

    IPC分类号: C30B29/10

    摘要: A method for producing a solid electrolyte material region for a memory element of a solid electrolyte memory cell. A first material is formed in substantially pure form. A thermal treatment is carried out in the presence of at least one second material, and the chalcogenide material of the solid electrolyte material region thereby being produced.

    摘要翻译: 一种固体电解质存储单元的存储元件固体电解质材料区域的制造方法。 第一材料以基本上纯的形式形成。 在至少一种第二材料的存在下进行热处理,由此生产固体电解质材料区域的硫族化物材料。

    Method for producing memory having a solid electrolyte material region
    8.
    发明授权
    Method for producing memory having a solid electrolyte material region 有权
    具有固体电解质材料区域的记忆体的制造方法

    公开(公告)号:US07829134B2

    公开(公告)日:2010-11-09

    申请号:US11153964

    申请日:2005-06-16

    IPC分类号: B05D5/12

    摘要: A method for producing a solid electrolyte material region for a memory element of a solid electrolyte memory cell. A first material is formed in substantially pure form. A thermal treatment is carried out in the presence of at least one second material, and the chalcogenide material of the solid electrolyte material region thereby being produced.

    摘要翻译: 一种固体电解质存储单元的存储元件固体电解质材料区域的制造方法。 第一材料以基本上纯的形式形成。 在至少一种第二材料的存在下进行热处理,由此生产固体电解质材料区域的硫族化物材料。

    Method for manufacturing an integrated circuit including an electrolyte material layer
    9.
    发明授权
    Method for manufacturing an integrated circuit including an electrolyte material layer 失效
    制造包括电解质材料层的集成电路的方法

    公开(公告)号:US07749805B2

    公开(公告)日:2010-07-06

    申请号:US11076027

    申请日:2005-03-10

    IPC分类号: H01L21/06

    摘要: A method for manufacturing an electrolyte material layer with a chalcogenide material incorporated or deposited therein for use in semiconductor memory devices, in particular resistively-switching memory devices or components. The method comprises the steps of producing a semiconductor substrate, depositing a binary chalcogenide layer onto the semiconductor substrate, depositing a sulphur-containing layer onto the binary chalcogenide layer, and creating a ternary chalcogenide layer comprising at least two different chalcogenide compounds ASexSy. One component A of the chalcogenide compounds ASexSy comprises materials of the IV elements main group, e.g., Ge, Si, or of a transition metal, preferably of the group consisting of Zn, Cd, Hg, or a combination thereof.

    摘要翻译: 一种用于制造电解质材料层的方法,所述电解质材料层具有结合或沉积在其中用于半导体存储器件,特别是电阻切换存储器件或部件的硫族化物材料。 该方法包括以下步骤:制造半导体衬底,在半导体衬底上沉积二元硫族化物层,在二元硫族化物层上沉积含硫层,以及产生包含至少两种不同硫属化物化合物ASexSy的三元硫族化物层。 硫族化合物ASexSy的一个组分A包括IV元素主要基团的材料,例如Ge,Si或过渡金属,优选由Zn,Cd,Hg或它们的组合组成的组。