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    Semiconductor device having a monotonically decreasing impurity concentration
    2.
    发明授权
    Semiconductor device having a monotonically decreasing impurity concentration 失效
    具有单调递减的杂质浓度的半导体器件

    公开(公告)号：US6060745A

    公开(公告)日：2000-05-09

    申请号：US3359

    申请日：1998-01-06

    申请人： Chihiro Tadokoro ,  Junichi Yamashita

    发明人： Chihiro Tadokoro ,  Junichi Yamashita

    IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L29/08 ,  H01L29/78 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L29/66712 ,  H01L29/0878 ,  H01L29/7802 ,  Y10S438/923

    摘要： An n.sup.- layer (2E) having a low impurity concentration is epitaxially grown on a surface (S1) of an n.sup.+ silicon substrate (1) having a high impurity concentration to a depth (D), and phosphorus ions (P) are implanted from the surface (S1) to the inside of the n.sup.- layer (2E). A SiO.sub.2 film is formed on the surface S1 by thermal oxidation, and an opening hole is formed in the SiO.sub.2 film. Using the opening hole, p-type impurities are implanted and diffused by thermal oxidation in the ion-implanted n.sup.- layer (2E), forming a p-type diffusion layer (well) from the surface (S1) to a predetermined depth. In this way, an n layer is formed in place of the n.sup.- layer (2E). The concentration distribution of impurity in the n layer monotonically decreases from the side of the surface (S1) and reaches its minimum on the side of an interface (BS). Then, a predetermined electrode is formed, completing the device. Thus, variations in both on-state resistance and breakdown voltage are reduced in a semiconductor device having a pn junction.

    摘要翻译： 在具有高杂质浓度的n +硅衬底（1）的深度（D）的表面（S1）上外延生长具有低杂质浓度的n层（2E），并从磷离子（P）中注入磷离子 表面（S1）到n层（2E）的内部。 通过热氧化在表面S1上形成SiO 2膜，并且在SiO 2膜中形成开孔。 使用开孔，在离子注入的n层（2E）中通过热氧化注入并扩散p型杂质，从表面（S1）形成p型扩散层（well）至预定深度。 以这种方式，形成n层代替n-层（2E）。 n层中的杂质的浓度分布从表面的一侧单调减小（S1），并在界面（BS）侧达到其最小值。 然后，形成预定电极，从而完成该装置。 因此，在具有pn结的半导体器件中，导通状态电阻和击穿电压的变化减小。

    Semiconductor device including switching element and two diodes
    3.
    发明授权
    Semiconductor device including switching element and two diodes 失效
    半导体器件包括开关元件和两个二极管

    公开(公告)号：US07755167B2

    公开(公告)日：2010-07-13

    申请号：US11776913

    申请日：2007-07-12

    申请人： Yoshihiko Hirota ,  Chihiro Tadokoro

    发明人： Yoshihiko Hirota ,  Chihiro Tadokoro

    IPC分类号： H01L27/06

    CPC分类号： H01L27/0761 ,  H01L27/0727 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A semiconductor device includes a transistor, a first diode, and a second diode. A collector of the transistor and a cathode of the first diode are electrically connected. The collector of the transistor and a cathode of the second diode are electrically connected, and an emitter of the transistor and an anode of the second diode are electrically connected. The first diode and the second diode are formed in an identical substrate. Thereby, the semiconductor device can be produced in a smaller size and in less steps.

    摘要翻译： 半导体器件包括晶体管，第一二极管和第二二极管。 晶体管的集电极和第一二极管的阴极电连接。 晶体管的集电极和第二二极管的阴极电连接，晶体管的发射极和第二二极管的阳极电连接。 第一二极管和第二二极管形成在相同的衬底中。 由此，半导体器件可以以较小的尺寸和较小的步骤制造。

    SEMICONDUCTOR DEVICE INCLUDING SWITCHING ELEMENT AND TWO DIODES
    5.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING SWITCHING ELEMENT AND TWO DIODES 失效
    包括开关元件和两个二极管的半导体器件

    公开(公告)号：US20080179704A1

    公开(公告)日：2008-07-31

    申请号：US11776913

    申请日：2007-07-12

    申请人： Yoshihiko HIROTA ,  Chihiro TADOKORO

    发明人： Yoshihiko HIROTA ,  Chihiro TADOKORO

    IPC分类号： H01L29/417 ,  H01L27/07

    CPC分类号： H01L27/0761 ,  H01L27/0727 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A semiconductor device includes a transistor, a first diode, and a second diode. A collector of the transistor and a cathode of the first diode are electrically connected. The collector of the transistor and a cathode of the second diode are electrically connected, and an emitter of the transistor and an anode of the second diode are electrically connected. The first diode and the second diode are formed in an identical substrate. Thereby, the semiconductor device can be produced in a smaller size and in less steps.

    摘要翻译： 半导体器件包括晶体管，第一二极管和第二二极管。 晶体管的集电极和第一二极管的阴极电连接。 晶体管的集电极和第二二极管的阴极电连接，晶体管的发射极和第二二极管的阳极电连接。 第一二极管和第二二极管形成在相同的衬底中。 由此，半导体器件可以以较小的尺寸和较小的步骤制造。

    Insulated gate semiconductor device
    6.
    发明授权
    Insulated gate semiconductor device 失效
    绝缘栅半导体器件

    公开(公告)号：US07211837B2

    公开(公告)日：2007-05-01

    申请号：US11076889

    申请日：2005-03-11

    申请人： Yoshifumi Tomomatsu ,  Hideki Takahashi ,  Chihiro Tadokoro

    发明人： Yoshifumi Tomomatsu ,  Hideki Takahashi ,  Chihiro Tadokoro

    IPC分类号： H01L29/74 ,  H01L31/111

    CPC分类号： H01L29/66348 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/7397

    摘要： A CSTBT includes a carrier stored layer (113) formed between a P base region (104) and a semiconductor substrate (103) and the carrier stored layer has an impurity concentration higher than that of the semiconductor substrate (103). The P base region (104) in a periphery of a gate electrode (110) functions as a channel. When it is assumed that an impurity concentration of a first carrier stored layer region (113a) just under the channel is ND1 and an impurity concentration of a second carrier stored layer region (113b) other than just under the channel is ND2 in the carrier stored layer (113), the relationship of the impurity concentrations is defined by ND1

    摘要翻译： CSTBT包括形成在P基极区域（104）和半导体衬底（103）之间的载流子存储层（113），并且载流子存储层的杂质浓度高于半导体衬底（103）的杂质浓度。 栅电极（110）周围的P基区（104）用作沟道。 当假定正好在通道下方的第一载流子存储层区域（113a）的杂质浓度为ND 1，并且除了正好在通道下方的第二载体存储层区域（113b）的杂质浓度为ND 2 在载体存储层（113）中，杂质浓度的关系由ND 1

    Insulated gate semiconductor device
    7.
    发明申请
    Insulated gate semiconductor device 失效
    绝缘栅半导体器件

    公开(公告)号：US20050263853A1

    公开(公告)日：2005-12-01

    申请号：US11076889

    申请日：2005-03-11

    申请人： Yoshifumi Tomomatsu ,  Hideki Takahashi ,  Chihiro Tadokoro

    发明人： Yoshifumi Tomomatsu ,  Hideki Takahashi ,  Chihiro Tadokoro

    IPC分类号： H01L29/78 ,  H01L21/331 ,  H01L27/082 ,  H01L27/102 ,  H01L29/08 ,  H01L29/10 ,  H01L29/70 ,  H01L29/739 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/11 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L29/66348 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/7397

    摘要： A CSTBT includes a carrier stored layer (113) formed between a P base region (104) and a semiconductor substrate (103) and the carrier stored layer has an impurity concentration higher than that of the semiconductor substrate (103). The P base region (104) in a periphery of a gate electrode (110) functions as a channel. When it is assumed that an impurity concentration of a first carrier stored layer region (113a) just under the channel is ND1 and an impurity concentration of a second carrier stored layer region (113b) other than just under the channel is ND2 in the carrier stored layer (113), the relationship of the impurity concentrations is defined by ND1

    摘要翻译： CSTBT包括形成在P基极区域（104）和半导体衬底（103）之间的载流子存储层（113），并且载流子存储层的杂质浓度高于半导体衬底（103）的杂质浓度。 栅电极（110）周围的P基区（104）用作沟道。 当假定正好在通道下方的第一载流子存储层区域（113a）的杂质浓度为ND 1，并且除了正好在通道下方的第二载体存储层区域（113b）的杂质浓度为ND 2 在载体存储层（113）中，杂质浓度的关系由ND 1