公开(公告)号：US06394409B1

公开(公告)日：2002-05-28

申请号：US09483216

申请日：2000-01-14

申请人： Chih-Jian Chen ,  Chin-Kai Liu

发明人： Chih-Jian Chen ,  Chin-Kai Liu

IPC分类号： F16M1100

CPC分类号： G02B21/34

摘要： An observable sample mounting fixture for mounting an IC specimen to a protective substrate is provided. In the sample mounting fixture, a base portion and a top portion are provided which are integrally connected together with a cavity therein-between for receiving a specimen. The base portion is further provided with an observation window such that the state of cure of an adhesive layer between a substantially transparent substrate and the IC specimen can be observed in real time. During an early observation, i.e., when the sandwiched structure is only cured for 2-5 minutes, the sandwiched structure can be easily disassembled when bubbles are observed. By utilizing the present invention novel sample mounting fixture, valuable test specimens can be saved for providing valuable quality control and reliability data. The sample mounting fixture is further constructed with a compression means which includes a shaft, a coil spring, a handle and a compression foot for contacting the IC specimen during a curing process of the sandwiched structure.

摘要翻译： 提供了一种用于将IC样本安装到保护基板上的可观察的样品安装夹具。 在样品安装固定件中，设置有基部和顶部，其一体地连接在一起，并具有用于容纳样本的空腔。 基部还设置有观察窗，使得可以实时观察基本上透明的基板和IC试样之间的粘合剂层的固化状态。 在早期观察期间，即当夹层结构仅固化2-5分钟时，当观察到气泡时，夹层结构可以容易地分解。 通过利用本发明的新型样品安装夹具，可以节省宝贵的试样以提供有价值的质量控制和可靠性数据。 样品安装固定件进一步构造有压缩装置，该压缩装置包括在夹层结构的固化过程期间与IC试样接触的轴，螺旋弹簧，手柄和压脚。

公开(公告)号：US6121059A

公开(公告)日：2000-09-19

申请号：US7024

申请日：1998-01-14

申请人： Chin-Kai Liu

发明人： Chin-Kai Liu

IPC分类号： G01R31/311 ,  H01L21/66

CPC分类号： G01R31/311

摘要： The present invention provides a method for identifying failure sites on a defective IC chip by utilizing a glass substrate equipped with a heating device and then coating a liquid crystal material layer on top. The liquid crystal device can be positioned in contact, or immediately adjacent to a surface of an IC device to be detected. After the liquid crystal temperature is raised to just below its transition temperature, a voltage signal can be fed into the IC device to trigger an overheating at a short or leakage to raise the liquid crystal material immediately adjacent to the short or leakage to a temperature above its transition temperature. Hot spots are thus produced to appear as bright spots for easy identification under an optical microscope.

公开(公告)号：US5700735A

公开(公告)日：1997-12-23

申请号：US703918

申请日：1996-08-22

申请人： Ruey-Yun Shiue ,  Wen-Teng Wu ,  Pi-Chen Shieh ,  Chin-Kai Liu

发明人： Ruey-Yun Shiue ,  Wen-Teng Wu ,  Pi-Chen Shieh ,  Chin-Kai Liu

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/14

摘要： A bond pad structure and method of forming the bond pad structure which provides for reliable interconnections between the bond pad structure and the next level of circuit integration. The bond pad structure uses three metal pads separated by layers of dielectric. Via plugs are formed between the first and second metal pads and between the second and third metal pads. The via plugs are formed in a diamond shape with respect to the metal pads. The metal pads are squares with the same orientation. The periphery of the via plugs forms a square rotated 45.degree. with respect to the square metal pads.

摘要翻译： 接合焊盘结构和形成接合焊盘结构的方法，其提供接合焊盘结构和下一级电路集成之间的可靠互连。 接合焊盘结构使用由电介质层隔开的三个金属焊盘。 通过插塞形成在第一和第二金属焊盘之间以及第二和第三金属焊盘之间。 通孔塞相对于金属垫形成为菱形。 金属垫是具有相同取向的正方形。 通孔塞的周边形成相对于方形金属垫片旋转45°的方形。

公开(公告)号：US06403386B1

公开(公告)日：2002-06-11

申请号：US09645080

申请日：2000-08-24

申请人： Chin-Kai Liu

发明人： Chin-Kai Liu

IPC分类号： H01L2166

CPC分类号： G01R31/311

摘要： The present invention provides a method for identifying failure sites on a defective IC chip by utilizing a glass substrate equipped with a heating device and then coating a liquid crystal material layer on top. The liquid crystal device can be positioned in contact, or immediately adjacent to a surface of an IC device to be detected. After the liquid crystal temperature is raised to just below its transition temperature, a voltage signal can be fed into the IC device to trigger an overheating at a short or leakage to raise the liquid crystal material immediately adjacent to the short or leakage to a temperature above its transition temperature. Hot spots are thus produced to appear as bright spots for easy identification under an optical microscope.

摘要翻译： 本发明提供一种通过利用配备有加热装置的玻璃基板，然后在顶部涂覆液晶材料层来识别缺陷IC芯片上的故障部位的方法。 液晶装置可以定位成与要检测的IC装置的表面接触或紧邻。 在液晶温度升高到低于其转变温度之后，可以将电压信号馈送到IC器件中，以短时间或泄漏触发过热，从而将紧邻短路或泄漏的液晶材料升高到高于 其转变温度。 因此产生热点以在光学显微镜下容易识别出现亮点。

公开(公告)号：US06397373B1

公开(公告)日：2002-05-28

申请号：US09351242

申请日：1999-07-12

申请人： Fouriers Tseng ,  Chin-Kai Liu

发明人： Fouriers Tseng ,  Chin-Kai Liu

IPC分类号： G06F1750

CPC分类号： G06F17/5081

摘要： A method/system is provided for performing a design review checking operation and analyzing the resultant data. Perform a DRC operation describing chip features and generating flags for violation sites including patterns and paths. Execute pattern analysis and grade classification steps for the violation sites. Generate a vector array for each chip feature for each of the violation sites. Compare the vector arrays to determine whether degrees of similarity of geometries of chip features of violation sites meet one of a set of criteria. Classify the violation sites into classes with similar criteria. Select representative arrays from each class of violation sites to provide an output. Calculate distance from a violation site from the origin in a two-dimensional array. Give a grade to each vector array to indicate the level of seriousness of the rule violation by the site. Use a layout viewer to view the error flags generated by pattern analysis and grade classification steps.

摘要翻译： 提供了一种用于执行设计审查检查操作并分析所得数据的方法/系统。 执行描述芯片功能的DRC操作，并为违规站点生成标志，包括模式和路径。 对违规网站执行模式分析和等级分类步骤。 为每个违规站点的每个芯片功能生成一个矢量数组。 比较矢量数组以确定违规站点的芯片特征的几何的相似度是否满足一组标准之一。 将违规网站划分为类似标准的类。 从每个类别的违规站点中选择代表性的数组以提供输出。 从二维阵列中计算违规站点与原点的距离。 为每个矢量数组提供一个等级，以指示站点违规规则的严重程度。 使用布局查看器来查看由模式分析和成绩分类步骤生成的错误标志。

公开(公告)号：US06245683B1

公开(公告)日：2001-06-12

申请号：US09473028

申请日：1999-12-28

申请人： Chin-Kai Liu

发明人： Chin-Kai Liu

IPC分类号： H01L21311

CPC分类号： H01L21/3145 ,  H01L21/76801 ,  H01L21/76834 ,  H01L21/76837 ,  Y10S438/958

摘要： A new method is provided for the creation of interfacing and adjacent surfaces when creating damascene interconnects. Under the first embodiment of the invention, the surface area of the Intra Metal Dielectric (IMD) in which the copper metal pattern has been created is partially removed thereby reducing and sub-dividing the surface area of the interfacing surface. Under the second embodiment of the invention, the surface area of the IMD is sub-divided into a multiplicity of squares that now form the interfacing surface area. Under the third embodiment of the invention, the surface area of the Intra Metal Dielectric (IMD) in which the copper metal pattern has been created is essentially removed leaving sidewalls of the IMD material on the formed pattern of copper interconnects.

摘要翻译： 提供了一种新方法，用于在创建镶嵌互连时创建界面和相邻表面。 在本发明的第一实施例中，其中已经形成铜金属图案的金属间电介质（IMD）的表面积被部分地去除，从而减少和分割界面表面的表面积。 在本发明的第二实施例中，IMD的表面积被细分成现在形成接口表面积的多个正方形。 在本发明的第三实施例中，其中已经形成铜金属图案的金属介电体（IMD）的表面积基本上被除去，留下形成的铜互连图案上的IMD材料的侧壁。

公开(公告)号：US06890772B2

公开(公告)日：2005-05-10

申请号：US10043734

申请日：2002-01-09

申请人： Chin-Kai Liu ,  Jun-Yean Chiou ,  Pei-Fen Chou ,  Han-Shun Lui

发明人： Chin-Kai Liu ,  Jun-Yean Chiou ,  Pei-Fen Chou ,  Han-Shun Lui

IPC分类号： G01J1/00 ,  G01Q20/00 ,  G01R31/26 ,  G01T1/24 ,  H01L21/66

CPC分类号： H01L22/34 ,  H01L22/14

摘要： A method of forming a SIMS monitor device for determining a doping profile of a semiconductor device structure including providing a plurality of regularly repeating semiconductor structures including a doping profile to form a monitor device including at least one layer of the regularly repeating semiconductor structures; planarizing the monitor device through a thickness of the regularly repeating semiconductor structures to reveal a target surface overlying the doping profile to form a monitor pattern; and, sputtering the target surface over a sputtering area including the monitor pattern through a thickness thereof while simultaneously detecting and counting over a time interval at least one type of species ejected from the target surface according to a secondary ion mass spectroscopy procedure (SIMS).

摘要翻译： 一种形成用于确定半导体器件结构的掺杂分布的SIMS监视器件的方法，包括提供包括掺杂分布的多个规则重复的半导体结构，以形成包括至少一层规则重复的半导体结构的监测器件; 通过规则重复的半导体结构的厚度来平坦化监视器装置，以显示覆盖掺杂分布的目标表面以形成监视图案; 并且通过其厚度在包括监视器图案的溅射区域上溅射目标表面，同时根据二次离子质谱法（SIMS）从目标表面喷射的至少一种类型的物质同时检测和计数。

公开(公告)号：US5990478A

公开(公告)日：1999-11-23

申请号：US889953

申请日：1997-07-10

申请人： Chin-Kai Liu

发明人： Chin-Kai Liu

IPC分类号： G01N1/28 ,  G01N1/32

CPC分类号： G01N1/32 ,  G01N1/286

摘要： The present invention discloses a method for preparing thin specimens suitable for physical analysis of a semiconductor microstructure by an instrument such as a transmission electron microscope. The method can be practiced by first forming support structures in a low density material medium for shielding a higher density material to be analyzed such that materials having different densities may be removed in a subsequent ion milling process at approximately the same milling rate with the lower density material supporting the higher density material during the ion milling process.

摘要翻译： 本发明公开了一种适用于通过透射电子显微镜等仪器物理分析半导体微结构的薄样品的方法。 该方法可以通过首先在低密度材料介质中形成支撑结构来实现，用于屏蔽要分析的较高密度材料，使得可以在随后的离子研磨过程中以大致相同的研磨速率除去具有不同密度的材料，其中较低密度 在离子铣削过程中支撑较高密度材料的材料。

公开(公告)号：US5963040A

公开(公告)日：1999-10-05

申请号：US936251

申请日：1997-09-24

申请人： Chin-Kai Liu

发明人： Chin-Kai Liu

IPC分类号： G01R31/28 ,  G01R31/311 ,  G01N27/20 ,  G01N27/28 ,  G01R31/12

CPC分类号： G01R31/311 ,  G01R31/2831

摘要： The present invention discloses a novel method and apparatus for de-etching pin-holes in a passivation layer that is deposited over a metal conductor layer on the surface of a semiconductor wafer by utilizing a substantially clear, electrically conductive film as a top electrode immersed in an electrolyte for observing under an optical microscope bubbles generated from a pin-hole on the wafer surface which functions as a bottom electrode when a DC current is flowing through the top electrode, the electrolyte and the bottom electrode such that gases in the form of bubbles are generated at the pin-hole site where metal is exposed to the electrolyte.

摘要翻译： 本发明公开了一种用于对钝化层中的针孔进行去蚀刻的新颖方法和装置，该方法和装置通过利用基本上透明的导电膜沉积在半导体晶片的表面上的金属导体层上，浸入 用于在DC电流流过顶部电极，电解质和底部电极的情况下用作底部电极的晶片表面上的针孔产生的光学显微镜下观察气泡，使得气泡形式为气泡 在金属暴露于电解质的针孔位置产生。

公开(公告)号：US5923088A

公开(公告)日：1999-07-13

申请号：US929953

申请日：1997-09-15

申请人： Ruey-Yun Shiue ,  Wen-Teng Wu ,  Pi-Chen Shieh ,  Chin-Kai Liu

发明人： Ruey-Yun Shiue ,  Wen-Teng Wu ,  Pi-Chen Shieh ,  Chin-Kai Liu

IPC分类号： H01L23/485 ,  H01L23/522

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/14

摘要： A bond pad structure and method of forming the bond pad structure which provides for reliable interconnections between the bond pad structure and the next level of circuit integration. The bond pad structure uses three metal pads separated by layers of dielectric. Via plugs are formed between the first and second metal pads and between the second and third metal pads. The via plugs are formed in a diamond shape with respect to the metal pads. The metal pads are squares with the same orientation. The periphery of the via plugs forms a square rotated 45.degree. with respect to the square metal pads.

摘要翻译： 接合焊盘结构和形成接合焊盘结构的方法，其提供接合焊盘结构和下一级电路集成之间的可靠互连。 接合焊盘结构使用由电介质层隔开的三个金属焊盘。 通过插塞形成在第一和第二金属焊盘之间以及第二和第三金属焊盘之间。 通孔塞相对于金属垫形成为菱形。 金属垫是具有相同取向的正方形。 通孔塞的周边形成相对于方形金属垫片旋转45°的方形。