公开(公告)号：US20160183374A1

公开(公告)日：2016-06-23

申请号：US14575775

申请日：2014-12-18

Applicant: Mani Prakash ,  Thomas T. Holden ,  Jeffory L. Smalley ,  Ram S. Viswanath ,  Bassam N. Coury ,  Dimitrios Ziakas ,  Chong J. Zhao ,  Jonathan W. Thibado ,  Gregorio R. Murtagian ,  Kuang C. Liu ,  Rajasekaran Swaminathan ,  Zhichao Zhang ,  John M. Lynch ,  David J. Llapitan ,  Sanka Ganesan ,  Xiang Li ,  George Vergis

Inventor： Mani Prakash ,  Thomas T. Holden ,  Jeffory L. Smalley ,  Ram S. Viswanath ,  Bassam N. Coury ,  Dimitrios Ziakas ,  Chong J. Zhao ,  Jonathan W. Thibado ,  Gregorio R. Murtagian ,  Kuang C. Liu ,  Rajasekaran Swaminathan ,  Zhichao Zhang ,  John M. Lynch ,  David J. Llapitan ,  Sanka Ganesan ,  Xiang Li ,  George Vergis

IPC: H05K1/18 ,  H01R12/72 ,  H05K1/11 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34

CPC classification number: H05K1/181 ,  H01L23/00 ,  H01L23/498 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/712 ,  H01R12/79 ,  H05K2201/10159 ,  H05K2201/10325 ,  Y02P70/611

Abstract: Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.

Abstract translation: 公开了可配置的中央处理单元（CPU）封装基板。 描述了包括处理设备接口的封装衬底。 封装衬底还包括设置在封装衬底上的存储器件电接口。 封装衬底还包括靠近存储器件电接口设置的可移除存储器机械接口。 可移除存储器机械接口是允许在将存储器件附接到封装衬底之后容易地从封装衬底移除存储器件。

公开(公告)号：US20150171535A1

公开(公告)日：2015-06-18

申请号：US13994023

申请日：2011-12-28

Applicant: Xiang Li ,  Chong J. Zhao ,  Jefferey L. Krieger ,  Dan Willis ,  John M. Lynch ,  Yun Ling

Inventor： Xiang Li ,  Chong J. Zhao ,  Jefferey L. Krieger ,  Dan Willis ,  John M. Lynch ,  Yun Ling

IPC: H01R12/73 ,  H05K1/18

CPC classification number: H01R12/732 ,  H01R12/721 ,  H01R12/83 ,  H05K1/181 ,  H05K2201/10159

Abstract: According to some embodiments, a SODIMM memory connector comprises a first socket to electrically couple a first SODIMM, and a second socket to electrically couple a second SODIMM, where the first socket is disposed vertically adjacent to the second socket.

Abstract translation: 根据一些实施例，SODIMM存储器连接器包括用于电耦合第一SODIMM的第一插座和用于电耦合第二SODIMM的第二插座，其中第一插座垂直地邻近第二插座设置。