-
Patent Agency Ranking
公开(公告)号：US20140187057A1
公开(公告)日：2014-07-03
申请号：US13729261
申请日：2012-12-28
Applicant: Gregorio R. Murtagian , Bhanu Jaiswal , Sriram Srinivasan , Michael J. Hill
Inventor： Gregorio R. Murtagian , Bhanu Jaiswal , Sriram Srinivasan , Michael J. Hill
CPC classification number: H01R43/205 , H01R12/73 , H01R13/6205 , H01R43/26 , Y10T29/4913 , Y10T29/49146 , Y10T29/49149
Abstract: A mechanism is described for facilitating and employing a magnetic grid array according to one embodiment. A method of embodiments may include engaging, via magnetic force of a magnet, magnetic contacts of a magnetic grid array to substrate lands of a package substrate of an integrated circuit package of a computing system, and disengaging, via a removal lever, the magnetic contacts from the substrate lands.
Abstract translation: 描述了根据一个实施例的用于促进和采用磁栅阵列的机构。 实施例的方法可以包括通过磁体的磁力使磁栅阵列的磁触点与计算系统的集成电路封装的封装衬底的衬底焊盘接合，并且经由去除杆将磁触头 从衬底。
-
公开(公告)号：US20160183374A1
公开(公告)日：2016-06-23
申请号：US14575775
申请日：2014-12-18
Applicant: Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
Inventor： Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
CPC classification number: H05K1/181 , H01L23/00 , H01L23/498 , H01L2224/16225 , H01L2924/15311 , H01R12/712 , H01R12/79 , H05K2201/10159 , H05K2201/10325 , Y02P70/611
Abstract: Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.
Abstract translation: 公开了可配置的中央处理单元（CPU）封装基板。 描述了包括处理设备接口的封装衬底。 封装衬底还包括设置在封装衬底上的存储器件电接口。 封装衬底还包括靠近存储器件电接口设置的可移除存储器机械接口。 可移除存储器机械接口是允许在将存储器件附接到封装衬底之后容易地从封装衬底移除存储器件。
-
3.发明申请公开(公告)号：US20190307009A1
公开(公告)日：2019-10-03
申请号：US15938980
申请日：2018-03-28
Applicant: Zhichao ZHANG , Gregorio R. MURTAGIAN , Kuang C. LIU , Kemal AYGUN
Inventor： Zhichao ZHANG , Gregorio R. MURTAGIAN , Kuang C. LIU , Kemal AYGUN
Abstract: Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.
-
公开(公告)号：US09118143B2
公开(公告)日：2015-08-25
申请号：US13729261
申请日：2012-12-28
Applicant: Gregorio R. Murtagian , Bhanu Jaiswal , Sriram Srinivasan , Michael J. Hill
Inventor： Gregorio R. Murtagian , Bhanu Jaiswal , Sriram Srinivasan , Michael J. Hill
CPC classification number: H01R43/205 , H01R12/73 , H01R13/6205 , H01R43/26 , Y10T29/4913 , Y10T29/49146 , Y10T29/49149
Abstract: A mechanism is described for facilitating and employing a magnetic grid array according to one embodiment. A method of embodiments may include engaging, via magnetic force of a magnet, magnetic contacts of a magnetic grid array to substrate lands of a package substrate of an integrated circuit package of a computing system, and disengaging, via a removal lever, the magnetic contacts from the substrate lands.
Abstract translation: 描述了根据一个实施例的用于促进和采用磁栅阵列的机构。 实施例的方法可以包括通过磁体的磁力使磁栅阵列的磁触点与计算系统的集成电路封装的封装衬底的衬底焊盘接合，并且经由去除杆将磁触头 从衬底。
-
5.发明申请SURFACE-MOUNT INDUCTOR STRUCTURES FOR FORMING ONE OR MORE INDUCTORS WITH SUBSTRATE TRACES 审中-公开形成一个或多个电感器的表面安装电感结构与衬底跟踪公开(公告)号：US20140167900A1
公开(公告)日：2014-06-19
申请号：US13715016
申请日：2012-12-14
Applicant: Gregorio R. Murtagian , Robert L. Sankman , Brent S. Stone , Kaladhar Radhakrishnan , Joshua D. Heppner
Inventor： Gregorio R. Murtagian , Robert L. Sankman , Brent S. Stone , Kaladhar Radhakrishnan , Joshua D. Heppner
CPC classification number: H01F27/2852 , H01F17/045 , H01F27/02 , H01F27/027 , H01F27/06 , H01F27/2847 , H01F27/292 , H01F2027/065 , H01F2027/297 , H01L2224/16225 , H01L2924/181 , Y10T29/4902 , H01L2924/00012
Abstract: Embodiments of the present disclosure are directed towards an inductor structure having one or more strips of conductive material disposed around a core. The strips may have contacts at a first end and a second end of the strips, and may be disposed around the core with a gap between the contacts. The inductor structure may be mounted on a surface of a substrate, and one or more traces may be formed in the surface of the substrate to electrically couple two or more of the strips of conductive material to one another to form inductive coils. Other embodiments may be described and/or claimed.
Abstract translation: 本公开的实施例涉及具有围绕芯设置的一个或多个导电材料条的电感器结构。 条带可以在条的第一端和第二端处具有触点，并且可以在接触件之间具有间隙而围绕芯设置。 电感器结构可以安装在衬底的表面上，并且可以在衬底的表面中形成一个或多个迹线，以将两个或更多个导电材料条彼此电耦合以形成感应线圈。 可以描述和/或要求保护其他实施例。
-
-
-
-
Search Results
5
records
(took 0.011 seconds)
