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    Low power display mode
    1.
    发明授权
    Low power display mode 有权
    低功耗显示模式

    公开(公告)号：US08314806B2

    公开(公告)日：2012-11-20

    申请号：US11322880

    申请日：2006-04-13

    Applicant: Eric Samson ,  Aditya Navale ,  Todd Witter

    Inventor： Eric Samson ,  Aditya Navale ,  Todd Witter

    IPC: G09G5/39

    CPC classification number: G06F3/14 ,  G09G5/006 ,  G09G5/008 ,  G09G5/363 ,  G09G5/39 ,  G09G2330/021

    Abstract: A controller is described that includes wiring to transport notification that a FIFO that holds data to be used to display content on a display has reached a threshold. The controller also includes first control circuitry to turn on a phase locked loop (PLL) circuit to cause logic circuitry within the controller downstream from the PLL to begin to receive a first clock in response to the notification. The logic circuitry is to transport data read from a memory toward the FIFO. The controller also includes second control circuitry to cause the memory to use a second clock provided by the controller in response to the notification.

    Abstract translation: 描述了一种控制器，其包括用于传送通知的连接，即在显示器上保存用于显示内容的数据的FIFO已经达到阈值。 该控制器还包括第一控制电路，用于接通锁相环（PLL）电路，以使PLL内的控制器内的逻辑电路响应该通知开始接收第一时钟。 逻辑电路是将从存储器读取的数据传输到FIFO。 控制器还包括第二控制电路，以使存储器响应于该通知使用由控制器提供的第二时钟。

    Efficient Z testing
    4.
    发明申请
    Efficient Z testing 有权
    高效Z测试

    公开(公告)号：US20060139366A1

    公开(公告)日：2006-06-29

    申请号：US11023639

    申请日：2004-12-29

    Applicant: Thomas Piazza ,  Eric Samson ,  Nasseh Akaaboune ,  Dinakar Munagala

    Inventor： Thomas Piazza ,  Eric Samson ,  Nasseh Akaaboune ,  Dinakar Munagala

    IPC: G09G5/02

    CPC classification number: G06T15/405

    Abstract: Z testing during computer graphics rendering is performed in a manner so as to optimize rendering. The status of a pixel as non-promotable may be tracked using a pixel status array (PSA). Each PSA row may contain bits which correspond to the non-promotable status of pixels. Each row may include five pixels, the first four of which represent the pixels in a subspan. If the row corresponds to a valid subspan, a determination may be made as to whether any pixel in the subspan is represented by a one, indicating that the pixel is non-promotable. This row corresponds to a previous subspan that has been sent down rendering pipeline. If a one is present, then the current subspan may be stalled until the pixels of the previous subspan has gone through color calculation. If, in the row that has just been read, no pixels are represented by a one, then a determination may be made as to whether any pixels in the current subspan are non-promotable. If so, then the corresponding bit in the current PSA row may be set to one. Otherwise, the Z test may be performed on each pixel of the current subspan.

    Abstract translation: 在计算机图形渲染期间的Z测试以优化渲染的方式执行。 可以使用像素状态阵列（PSA）跟踪不可升级的像素的状态。 每个PSA行可以包含对应于像素的不可升级状态的位。 每行可以包括五个像素，其中前四个表示子跨距中的像素。 如果该行对应于有效的子跨度，则可以确定子跨越中的任何像素是否由一个表示，表示该像素是不可升级的。 此行对应于已向下渲染管道发送的先前子跨。 如果存在一个，那么当前的子跨越可能会停顿，直到前一个子跨越的像素经过颜色计算。 如果在刚刚读取的行中没有像素由一个像素表示，则可以确定当前子跨距中的任何像素是否不可升级。 如果是，则当前PSA行中的相应位可以被设置为1。 否则，可以对当前子跨的每个像素执行Z测试。

    TECHNIQUES TO CONTROL FRAME DISPLAY RATE
    6.
    发明申请
    TECHNIQUES TO CONTROL FRAME DISPLAY RATE 有权
    控制帧显示速率的技术

    公开(公告)号：US20140160136A1

    公开(公告)日：2014-06-12

    申请号：US13712397

    申请日：2012-12-12

    Applicant: Nikos Kaburlasos ,  Eric Samson

    Inventor： Nikos Kaburlasos ,  Eric Samson

    IPC: G06F3/14

    CPC classification number: G09G5/00 ,  G09G2320/103 ,  G09G2330/022 ,  G09G2340/0435

    Abstract: Techniques to determine when to decrease a frame display rate based in part on the amount or degree of change between sequential frames. The amount or degree of change can be measured based on all or part of similarly located portions of sequential frames. In some cases, power use can be reduced without compromising visual quality by reducing frame display rate when an amount or degree of change between frames is small.

    Abstract translation: 确定何时缩短帧显示速率的技术部分地基于连续帧之间的数量或变化程度。 可以基于连续帧的所有或部分类似位置的部分来测量变化量或变化程度。 在某些情况下，当帧之间的数量或变化程度小时，可以通过降低帧显示速率来降低功耗，而不会影响视觉质量。

    Implementation System for Business Applications
    7.
    发明申请
    Implementation System for Business Applications 审中-公开
    业务应用实施系统

    公开(公告)号：US20120317591A1

    公开(公告)日：2012-12-13

    申请号：US13488236

    申请日：2012-06-04

    Applicant: Eric Samson

    Inventor： Eric Samson

    IPC: G06F9/44

    CPC classification number: G06F9/541 ,  G06Q10/10

    Abstract: A system for addressing incompatibility between services and applications is disclosed. The system comprises an intermediation module, a mapper module and an execution module. The intermediation module is configured to receive a first call from an application and retrieve from a directory a reference to a service associated with the application. The mapper module is configured to retrieve, from the directory, service metadata describing the service and business metadata describing business on the application. The mapper module generates a mapping table that maps the business metadata to the service metadata for providing a response to the application query. The mapper module determines if an incompatibility exists between a business requirement associated with the application and the service. The execution module selects and executes an interface of the service based on the mapping of the business metadata and the service metadata.

    Abstract translation: 公开了一种用于解决服务和应用程序之间的不兼容性的系统。 该系统包括中介模块，映射器模块和执行模块。 中介模块被配置为从应用接收第一呼叫，并从目录中检索对与应用相关联的服务的引用。 映射器模块被配置为从目录中检索描述在应用程序上描述业务的服务和业务元数据的服务元数据。 映射器模块生成映射表，其将业务元数据映射到服务元数据以提供对应用查询的响应。 映射器模块确定与应用程序相关联的业务需求与服务之间是否存在不兼容性。 执行模块基于业务元数据和服务元数据的映射来选择并执行服务的接口。

    Method and apparatus for external processor thermal control
    9.
    发明申请
    Method and apparatus for external processor thermal control 审中-公开
    外部处理器热控制的方法和装置

    公开(公告)号：US20060137377A1

    公开(公告)日：2006-06-29

    申请号：US11027433

    申请日：2004-12-29

    Applicant: Eric Samson ,  John Horigan ,  Robert Jackson ,  Shreekant Thakkar

    Inventor： Eric Samson ,  John Horigan ,  Robert Jackson ,  Shreekant Thakkar

    IPC: F25B41/00 ,  F25D23/12 ,  F15B7/00

    CPC classification number: G06F1/206

    Abstract: A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component or the master component may be a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component would then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy. The selection policy may be received from a user through a graphical user interface. The selection policy may be based on an action being performed by the computing system.

    Abstract translation: 公开了一种用于节流计算机系统的从属组件以在接收到第一信号时降低计算系统的总体温度的系统和方法。 第一信号可以来自主组件，指示主组件的温度已经超过其阈值温度。 从属组件或主组件可以是中央处理单元，图形存储器和控制器集线器，或中央处理单元存储器控制器集线器。 从组件可以发送第二信号以指示从组件的温度已超过其温度。 然后，主组件将启动主组件的节流以降低计算系统的整体温度。 主部件可以被节流到比从属部件小的程度。 可以将第一组件指定为主组件，并且可以基于选择策略将第二组件指定为从组件。 可以通过图形用户界面从用户接收选择策略。 选择策略可以基于由计算系统执行的动作。

    Managing power consumption by requesting an adjustment to an operating point of a processor
    10.
    发明申请
    Managing power consumption by requesting an adjustment to an operating point of a processor 失效
    通过请求调整处理器的工作点来管理功耗

    公开(公告)号：US20050223249A1

    公开(公告)日：2005-10-06

    申请号：US10814425

    申请日：2004-03-30

    Applicant: Eric Samson

    Inventor： Eric Samson

    IPC: G06F1/32 ,  G06F1/26

    CPC classification number: G06F1/324 ,  G06F1/3228 ,  Y02D10/126

    Abstract: A processor is provided with a workload that has a real-time demand. A processor clock frequency requirement is set for the processor, based on a deadline margin for the real-time demand. Other embodiments are also described and claimed.

    Abstract translation: 处理器具有实时需求的工作负载。 基于实时需求的最终期限，为处理器设置处理器时钟频率要求。 还描述和要求保护其他实施例。

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