Abstract:
A multi-chip package is provided that has at least a first, second and third chip, each comprising a top and bottom surface. The multi-chip package also has a package substrate for interfacing with a printed circuit board (PCB). The chips and the package substrate are housed within an encapsulation material. The bottom surface of the first chip is attached to the package substrate. The top surface of the first chip has a first plurality of landing pads, which serve as a mechanical and electrical interface between the first and second chip. The bottom surface of the second chip has a second plurality of landing pads that serve as a mechanical and electrical interface between the second and first chip. Additionally, the top surface of the second chip has a third plurality of landing pads that serve as a mechanical and electrical interface between the second and third chip.
Abstract:
Embodiments of the invention generally provide a system, method and memory device for accessing memory. One embodiment includes synchronization circuitry configured to determine timing skew between a first memory device and a second memory device, and introduce a delta delay to at least one of the first memory device and the second memory device to adjust the timing skew.
Abstract:
Embodiments of the invention generally provide an apparatus and technique for sharing an internally generated voltage between devices of a multi-chip package (MCP). The internally generated voltage may be shared via a conductive structure that electrically couples the devices and carries the internally generated voltage.
Abstract:
A window actuator for a casement window has an actuator housing having a generally channel shaped receptacle portion defined by a rear wall, a front wall generally parallel to the front wall, and two end walls spaced to form therebetween a hollow interior with an open top surrounded by an outwardly extending peripheral flange and a base plate extending from the rear wall beyond the open top for mounting on a window frame. A worm housing is connected to and extends outwardly from the front wall of the housing and holds, by a plastics locking member threaded into the worm housing, a worm which is rotated by a manually actuable crank to drive a rotatable wheel mounted within the hollow interior. The wheel has an outwardly extending portion connected by an arcuate pivotal link to an actuator arm pivoted at its inner end on the base plate and arranged so that in the extended position of the arm, the link goes overcenter against a stop on the housing. The wheel is mounted on a mounting pin by an integral plastics bearing member including an annular sleeve portion projecting through the opening and having an inner surface surrounding the pin and an outer surface engaging the opening in the wheel, a planar plate portion lying between and in contact with one side surface of the wheel and one of the front and rear walls and a locating portion for engaging the wheel to prevent relative rotation between the wheel and the bearing member.
Abstract:
A memory device is placed in a mode that redefines the command set used to control the memory device. This may occur either in anticipation of the memory system falling out of calibration, or after it has already fallen out of calibration. The redefined command set is designed such that it may be reliably received by the memory device at the specified rate even if the memory system has fallen out of calibration. The redefined command set is then used to issue command(s) to recalibrate one or more communication links such that they can exchange data, commands, and/or addresses at a specified rate. After recalibration, the memory device is returned to responding to the original command set.
Abstract:
Embodiments of the present invention generally provide techniques and apparatus for altering the functionality of a multi-chip package (MCP) without requiring entire replacement of the MCP. The MCP may be designed with a top package substrate designed to interface with an add-on package that, when sensed by the MCP, alters the functionality of the MCP.
Abstract:
Embodiments of the invention generally provide a system, method and memory device for accessing memory. One embodiment includes synchronization circuitry configured to determine timing skew between a first memory device and a second memory device, and introduce a delta delay to at least one of the first memory device and the second memory device to adjust the timing skew.
Abstract:
Embodiments of the invention generally provide an apparatus and technique for sharing an internally generated voltage between devices of a multi-chip package (MCP). The internally generated voltage may be shared via a conductive structure that electrically couples the devices and carries the internally generated voltage.
Abstract:
Embodiments of the invention generally provide a system, method, and memory device for accessing memory. In one embodiment, a first memory device includes command decoding logic configured to decode commands issued to the first memory device and a second memory device, while command decoding logic of the second memory device is bypassed.
Abstract:
Embodiments of the present invention generally provide techniques and apparatus for altering the functionality of a multi-chip package (MCP) without requiring entire replacement of the MCP. The MCP may be designed with a top package substrate designed to interface with an add-on package that, when sensed by the MCP, alters the functionality of the MCP.