Method for molding semiconductor packages
    1.
    发明授权
    Method for molding semiconductor packages 失效
    半导体封装的成型方法

    公开(公告)号:US5744083A

    公开(公告)日:1998-04-28

    申请号:US744669

    申请日:1996-11-06

    IPC分类号: B29C45/27 B29C45/14 B29C45/02

    CPC分类号: B29C45/2701

    摘要: The invention is to a transfer mold design utilized with conventional transfer encapsulation. The design utilizes a varying runner cross section with an intermediate varying depth well or reservoir from which a constant gate depth and gate entry angled to the mold cavities is employed. The method and apparatus of the invention is applicable to single and multi-plunger molding utilizing thermoset and thermoplastic encapsulants for semiconductors.

    摘要翻译: 本发明涉及一种传统模具设计,与传统的传输封装相结合。 该设计利用具有中间变化的深度井或储层的变化的流道横截面,其中采用与模腔成角度的恒定浇口深度和浇口入口。 本发明的方法和装置可应用于使用半导体热固性和热塑性密封剂的单柱和多柱塞模塑。

    Molded package for micromechanical devices and method of fabrication
    2.
    发明授权
    Molded package for micromechanical devices and method of fabrication 有权
    用于微机械装置的模制包装和制造方法

    公开(公告)号:US07026710B2

    公开(公告)日:2006-04-11

    申请号:US09760517

    申请日:2001-01-10

    IPC分类号: H01L23/12

    摘要: According to the present invention, a plastic land-grid array package, a plastic ball-grid package, and a plastic leaded package for micromechanical components are fabricated by a molding process characterized by placing a sheet-like protector on the surface of the components during the molding phase, selectively encapsulating the bonding pads and coupling members of the chip while leaving empty space above the components, removing the protector and attaching a lid over the components. A molding method as well as a molding apparatus are provided compatible with the sensitivity of the micromechanical devices, yet flexible with regard to the technique used to assemble the chip and the substrate. Furthermore, the method disclosed is flexible with regard to the material and the properties of the substrate. The invention is applicable to a variety of different semiconductor micromechanical devices, for instance actuators, motors, sensors, spatial light modulators, and deformable mirror devices. In a key embodiment of the invention, the micromechanical components are micromirrors for a digital mirror device.

    摘要翻译: 根据本发明,通过成型工艺制造用于微机械部件的塑料格栅阵列封装,塑料球栅格封装和塑料引线封装,其特征在于将片状保护器放置在元件表面上 模制阶段,在组件上方留下空白空间的同时选择性地封装焊盘和连接件,同时移除保护器并将盖子连接在部件上。 提供了与微机械装置的灵敏度兼容的成型方法以及模制装置,但是对于用于组装芯片和基板的技术而言,它是灵活的。 此外,所公开的方法对于基材的材料和性质是柔性的。 本发明可应用于各种不同的半导体微机械装置,例如致动器,马达,传感器,空间光调制器和可变形反射镜装置。 在本发明的关键实施例中,微机械组件是用于数字镜装置的微镜。

    Pre-packaged liquid molding for component encapsulation
    4.
    发明授权
    Pre-packaged liquid molding for component encapsulation 失效
    用于组件封装的预包装液体模塑

    公开(公告)号:US5955115A

    公开(公告)日:1999-09-21

    申请号:US646738

    申请日:1996-05-03

    摘要: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly using liquid mold compound. A prepackaged liquid mold compound insert 11 is placed in a rectangular receptacle 43 in a bottom mold chase 31. The receptacle 43 is coupled to a plurality of die cavities 37 by runners 39. Leadframe strip assemblies containing leadframes, integrated circuit dies, and bond wires coupling the leadframes and dies are placed over the bottom mold chase 31 such that the integrated circuit dies are each centered over a bottom mold die cavity 35. A top mold chase 53 is placed over the bottom mold chase 31 and the mold compound package 11. The top mold chase 53 has die cavities 57 corresponding to those in the bottom mold chase 31. The prepackaged liquid mold compound is packaged in a plastic film which has heat sealed edges 15. The mold compound is forced through the heat seals 15 during the molding process by the pressure applied by a rectangular plunger 61. The plunger is applied using variable speed and pressure to control the rate the mold compound fills the cavities in the top and bottom mold chases, thereby avoiding voids in the completed packages and minimizing wire sweep of the bond wires of the integrated circuit assemblies.

    摘要翻译: 一种使用液体模具化合物封装集成电路管芯和引线框架组件的方法和装置。 预包装的液体模具化合物插入件11放置在底部模具走廊31中的矩形容器43中。容器43通过流道39连接到多个模具空腔37.包含引线框架,集成电路管芯和接合线的引线框架组件 将引线框架和模具连接放置在底部模具走廊31上,使得集成电路模具均位于底部模具模腔35的上方。顶部模具走廊53放置在底部模具追逐31和模具复合材料封装11的上方。 顶模53具有与底模31中的模腔相对应的模腔57.预先包装的液模模具化合物被封装在具有热密封边缘15的塑料薄膜中。模塑料在成型期间被迫通过热密封件15 通过矩形柱塞61施加的压力进行处理。使用可变速度和压力施加柱塞以控制模具化合物填充顶部和机器人的空腔的速率 从而避免完成的包装中的空隙并且最小化集成电路组件的接合线的电线扫掠。

    Sproutless pre-packaged molding for component encapsulation
    5.
    发明授权
    Sproutless pre-packaged molding for component encapsulation 失效
    用于组件封装的无孢子预包装成型

    公开(公告)号:US06531083B1

    公开(公告)日:2003-03-11

    申请号:US08434336

    申请日:1995-05-02

    IPC分类号: B29C4502

    摘要: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly. A prepackaged sproutless mold compound insert 71 is placed in a rectangular receptacle 91 in a bottom mold chase 81. The receptacle is coupled to a plurality of die cavities 85 by runners 87. Leadframe strip assemblies containing leadframes, integrated circuit dies, and bond wires coupling the leadframes and dies are placed over the bottom mold chase 81 such that the integrated circuit dies are each centered over a bottom mold die cavity 85. A top mold chase 90 is placed over the bottom mold chase 81 and the mold compound package 71. The top mold chase 90 has die cavities 95 corresponding to those in the bottom mold chase 81. The mold compound insert 71 is preferably packaged in a plastic film 75 which has heat sealed edges 77. The mold compound is forced through the package 75 and heat seals 77 during the molding process by the pressure applied by a rectangular plunger 101. The sproutless mold compound insert is packaged so that the mold compound will exit the packaging only where runners intersect the receptacle. The sproutless mold compound insert requires no alignment or cutting tools within the mold station. The plunger is applied using variable speed and pressure to control the rate the mold compound fills the cavities in the top and bottom mold chases, thereby avoiding voids in the completed packages and mining wire sweep of the bond wires of the integrated circuit assemblies.

    摘要翻译: 一种用于封装集成电路管芯和引线框架组件的方法和装置。 将预先包装的无芽模具复合插入件71放置在底部模具追逐器81中的矩形插座91中。插座通过流道87连接到多个模具空腔85.引线框架组件包含引线框架,集成电路管芯和接合线 引线框架和模具放置在底部模具走沿81上方,使得集成电路模具均位于底部模具模腔85的上方。顶部模具追逐90放置在底部模具追逐器81和模具复合封装件71上。 顶模90具有对应于底模追逐81中的那些的模腔95.模具化合物插入件71优选地包装在具有热封边缘77的塑料膜75中。模具化合物被迫通过包装75并且热封 在模制过程中,通过由矩形柱塞101施加的压力来形成。77将无芽模具复合物插入物包装,使得模具化合物仅在运行时才离开包装 内部与插座相交。 无模具复合插入件不需要在模具台内对准或切割工具。 使用可变速度和压力施加柱塞以控制模具化合物填充顶部和底部模具中的空腔的速率,从而避免完成的包装中的空隙和集成电路组件的接合线的采矿线扫描。

    Bellows container packaging system and method
    6.
    发明授权
    Bellows container packaging system and method 有权
    波纹管容器包装系统及方法

    公开(公告)号:US6071457A

    公开(公告)日:2000-06-06

    申请号:US159420

    申请日:1998-09-24

    摘要: An improved mold system (20) is provided. The mold system (20) includes a mold (30) having at least one mold cavity (28). A pot (22) is connected to each of the mold cavities (28) through a runner system (24). A bellows container (50) containing a molding material (60) is disposed with the pot (22). A plunger (31) applies a compressive load to the molding material (60) contained with the bellows container (50) to force the molding material (60) through the runner system (24) into the mold cavities (28).

    摘要翻译: 提供改进的模具系统(20)。 模具系统(20)包括具有至少一个模腔(28)的模具(30)。 罐(22)通过流道系统(24)连接到每个模腔(28)。 容纳模塑材料(60)的波纹管容器(50)与锅(22)一起设置。 柱塞(31)对包含在波纹管容器(50)的成型材料(60)施加压缩载荷,以迫使成型材料(60)穿过浇道系统(24)进入模腔(28)。

    Transfer mold design
    7.
    发明授权
    Transfer mold design 失效
    转移模具设计

    公开(公告)号:US5624691A

    公开(公告)日:1997-04-29

    申请号:US262814

    申请日:1994-06-21

    IPC分类号: B29C45/27 B29C45/02

    CPC分类号: B29C45/2701

    摘要: The invention is to a transfer mold design utilized with conventional transfer encapsulation. The design utilizes a varying runner cross section with an intermediate varying depth well or reservoir from which a constant gate depth and gate entry angled to the mold cavities is employed. The method and apparatus of the invention is applicable to single and multiplunger molding utilizing thermoset and thermoplastic encapsulants for semiconductors.

    摘要翻译: 本发明涉及一种传统模具设计,与传统的传输封装相结合。 该设计利用具有中间变化的深度井或储层的变化的流道横截面,其中采用与模腔成角度的恒定浇口深度和浇口入口。 本发明的方法和装置适用于利用半导体热固性和热塑性密封剂的单模和多模。

    Method of making a post molded cavity package with internal dam bar for
integrated circuit
    8.
    发明授权
    Method of making a post molded cavity package with internal dam bar for integrated circuit 失效
    制造具有用于集成电路的内部阻挡条的后模制腔体封装的方法

    公开(公告)号:US5106784A

    公开(公告)日:1992-04-21

    申请号:US511877

    申请日:1990-04-20

    申请人: George A. Bednarz

    发明人: George A. Bednarz

    摘要: A method of producing a cavity package around an assembled semiconductor device is disclosed. The method includes providing a chip attach pad having a plurality of chip attach pad straps, each strap extending outwardly from the outer edge of the chip attach pad and spaced about the edge of the bar pad; mounting integrated circuits having bond pads on the chip attach pad; molding a package material onto a central portion of lead fingers and the chip attach pad straps to grip and surround each lead finger with package material, with a portion of each lead finger extending externally from the ring at both the exterior and interior thereof and to secure the bar pad straps therein; electrically coupling the bond pads to the portion of desired ones of the lead fingers extending toward the interior of the ring; and enclosing both ends of the ring to provide a cavity in the ring to suspend a chip attach pad with the integrated circuit thereon within the cavity with the chip attach straps. Heat sinks can also be used to promote high levels of thermal dissipation.

    摘要翻译: 公开了一种在组装的半导体器件周围制造空腔封装的方法。 该方法包括提供具有多个芯片连接垫带的芯片连接焊盘,每个带从芯片连接焊盘的外边缘向外延伸并围绕焊盘的边缘间隔开; 在芯片附接垫上安装具有接合焊盘的集成电路; 将包装材料模制到引线指的中心部分上,并且利用封装材料将芯片附接垫带夹紧并围绕每个引线指,每个引线指的一部分在外部和内部均从环向外延伸并固定 酒吧垫带在其中; 将接合焊盘电耦合到朝向环的内部延伸的所述引线指的所需引线部分; 并且封闭环的两端以在环中提供空腔,以使芯片附接带悬挂在腔内的集成电路的芯片附接垫。 散热片也可用于促进高水平散热。

    Process of packaging a semiconductor device with reduced stress forces
    9.
    发明授权
    Process of packaging a semiconductor device with reduced stress forces 失效
    以减小应力的方式包装半导体器件的工艺

    公开(公告)号:US4874722A

    公开(公告)日:1989-10-17

    申请号:US188185

    申请日:1988-04-28

    IPC分类号: H01L21/50 H01L23/495

    摘要: A method of producing a cavity package semiconductor device is disclosed. The method includes providing a bar pad having a plurality of bar pad straps, each strap extending outwardly from the outer edge of the bar pad and spaced about the edge of the bar pad; mounting integrated circuits having bond pads on the bar pad; molding a packing material onto a central portion of lead fingers and the bar straps to grip and surround each lead finger with package material, with a portion of each lead finger extending externally from the ring at both the exterior and interior thereof and to secure the bar pad straps therein; electrically coupling the bond pads to the portion of desired ones of the lead fingers extending toward the interior of the ring; and enclosing both ends of the ring to provide a cavity in the ring to suspend a bar pad with the integrated circuit thereon within the cavity with the bar pad straps.

    摘要翻译: 公开了一种制造空腔封装半导体器件的方法。 该方法包括提供具有多个条形垫带的条形垫,每条带从条形垫的外边缘向外延伸并且围绕条形垫的边缘间隔开; 安装集成电路在接线板上具有接合焊盘; 将包装材料成型到引线指的中心部分上,并且条带以包裹材料夹持和围绕每个引线指,每个引线指的一部分在外部和内部都从环向外延伸,并固定条 垫带; 将接合焊盘电耦合到朝向环的内部延伸的所述引线指的所需引线部分; 并且封闭环的两端以在环中提供空腔,以使具有集成电路的条形垫在带有条形垫带的空腔内悬挂在其上。