Electronic device including a fin-type transistor structure and a process for forming the electronic device
    1.
    发明申请
    Electronic device including a fin-type transistor structure and a process for forming the electronic device 有权
    包括鳍型晶体管结构的电子器件和用于形成电子器件的工艺

    公开(公告)号:US20070158764A1

    公开(公告)日:2007-07-12

    申请号:US11328594

    申请日:2006-01-10

    IPC分类号: H01L29/76 H01L21/336

    摘要: An electronic device can include an insulating layer and a fin-type transistor structure. The fin-type structure can have a semiconductor fin and a gate electrode spaced apart from each other. A dielectric layer and a spacer structure can lie between the semiconductor fin and the gate electrode. The semiconductor fin can include channel region including a portion associated with a relatively higher VT lying between a portion associated with a relatively lower VT and the insulating layer. In one embodiment, the supply voltage is lower than the relatively higher VT of the channel region. A process for forming the electronic device is also disclosed.

    摘要翻译: 电子器件可以包括绝缘层和鳍型晶体管结构。 翅片型结构可以具有彼此间隔开的半导体翅片和栅电极。 电介质层和间隔结构可以位于半导体鳍片和栅电极之间。 半导体鳍片可以包括沟道区域,该沟道区域包括与相对较低V T T T相关的部分与绝缘层之间相对较高的V SUB相关联的部分。 在一个实施例中,电源电压低于沟道区的相对较高的V SUB。 还公开了一种用于形成电子器件的工艺。

    Small molecules and a pharmacophore model for inhibition of botulinum toxin and methods of making and using thereof
    4.
    发明申请
    Small molecules and a pharmacophore model for inhibition of botulinum toxin and methods of making and using thereof 失效
    用于抑制肉毒杆菌毒素的小分子和药效团模型及其制备和使用方法

    公开(公告)号:US20050153945A1

    公开(公告)日:2005-07-14

    申请号:US10935622

    申请日:2004-09-08

    摘要: Disclosed herein is a pharmacophore model for inhibiting Botulinum neurotoxin A metalloprotease activity which comprises a first plane A, a second plane B, a first hydrophobic moiety C, a second hydrophobic moiety D and a positive ionizable substituent E. The pharmacophore model may further comprise a heteroatom in the first plane A. In some embodiments, the distance between the center of the first plane A and the center of the second plane B is about 6.5 to about 9.5 Å. In some embodiments, the distance between the center of the first hydrophobic moiety C and the center of the second hydrophobic moiety D is about 8.0 to about 16.0 Å. In some embodiments, the distance between the center of the first plane to the center of the first hydrophobic moiety C is about 3.0 to about 5.0 Å. In some embodiments, the distance between the center of the second plane to the center of the second hydrophobic moiety C is about 3.0 to about 5.0 Å. In some embodiments, the distance between the center of the first plane to the center of the positive ionizable substituent is about 6.5 to about 9.5 Å.

    摘要翻译: 本文公开了用于抑制肉毒杆菌神经毒素A金属蛋白酶活性的药效团模型,其包含第一平面A,第二平面B,第一疏水部分C,第二疏水部分D和可阳离子化取代基E.药效基团模型还可包含 在一些实施例中,第一平面A的中心与第二平面B的中心之间的距离为约6.5至约9.5。 在一些实施方案中,第一疏水部分C的中心与第二疏水部分D的中心之间的距离为约8.0至约16.0。 在一些实施方案中,第一平面的中心与第一疏水部分C的中心之间的距离为约3.0至约5.0。 在一些实施方案中,第二平面的中心与第二疏水部分C的中心之间的距离为约3.0至约5.0。 在一些实施方案中,第一平面的中心与正电离取代基的中心之间的距离为约6.5至约9.5。

    Systems, Methods, and Computer Program Products for Providing Service Credit to Customer Accounts in a Wireless Communications Service Network
    6.
    发明申请
    Systems, Methods, and Computer Program Products for Providing Service Credit to Customer Accounts in a Wireless Communications Service Network 有权
    系统,方法和计算机程序产品,用于向无线通信服务网络中的客户帐户提供服务信用

    公开(公告)号:US20110281551A1

    公开(公告)日:2011-11-17

    申请号:US12777708

    申请日:2010-05-11

    IPC分类号: H04M11/00

    摘要: Systems, methods, and computer program products use combinations of international mobile equipment identity (IMEI), international mobile subscriber identity (IMSI), and account information to determine if a customer is eligible for service credit in near real-time. The customer needs an active account prior to inserting a subscriber identity module (SIM) into a device and powering on the device for the system to determine credit eligibility. No further customer action is required. The credit application process determines credit eligibility based upon device credit eligibility, account tenure, and/or credit rules, and applies the credit to the customer's account. The customer may be proactively notified when the credit is applied. The credit and tenure rules may be changed as the industry and business needs change to remain competitive in the industry. The SIM used is configured with software to lock the SIM to the device upon first power-on.

    摘要翻译: 系统,方法和计算机程序产品使用国际移动设备身份(IMEI),国际移动用户身份(IMSI)和帐户信息的组合来确定客户是否有资格接近实时的服务信用。 在将用户身份模块(SIM)插入到设备中并为系统启动设备以确定信用资格之前,客户需要一个活动帐户。 不需要进一步的客户行动。 信用申请程序根据设备信用资格,账户使用权和/或信用规则确定信用资格,并将信用额度应用于客户的账户。 信用证申请时可以主动通知客户。 随着行业和业务需求的变化,信贷和使用权制度可能会发生变化,以保持行业的竞争力。 所使用的SIM卡配置有软件,以便在首次上电时将SIM卡锁定到设备上。

    Switch device and method
    7.
    发明申请
    Switch device and method 有权
    开关装置及方法

    公开(公告)号:US20070211526A1

    公开(公告)日:2007-09-13

    申请号:US11373532

    申请日:2006-03-10

    申请人: James Burnett

    发明人: James Burnett

    IPC分类号: G11C11/34 G11C11/00

    摘要: A device is disclosed having a first Field Effect Transistor having a channel region controlled by a gate, a second Field Effect Transistor having a first channel region substantially controlled by a first gate, and a second channel region substantially controlled by a second gate. The gate of the first Field Effect Transistor and the first gate of the second Field Effect Transistor are coupled to a memory write line. The second gate of the second Field Effect Transistor receives a control signal from a memory bit cell.

    摘要翻译: 公开了一种具有第一场效应晶体管的器件,其具有由栅极控制的沟道区域,第二场效应晶体管具有基本由第一栅极控制的第一沟道区域和由第二栅极基本控制的第二沟道区域。 第一场效应晶体管的栅极和第二场效应晶体管的第一栅极耦合到存储器写入线。 第二场效应晶体管的第二栅极从存储器位单元接收控制信号。

    Multiple device types including an inverted-T channel transistor and method therefor
    8.
    发明申请
    Multiple device types including an inverted-T channel transistor and method therefor 有权
    多种器件类型,包括反向T沟道晶体管及其方法

    公开(公告)号:US20070093054A1

    公开(公告)日:2007-04-26

    申请号:US11257972

    申请日:2005-10-25

    摘要: A method for making a semiconductor device is provided. The method includes forming a first transistor with a vertical active region and a horizontal active region extending on both sides of the vertical active region. The method further includes forming a second transistor with a vertical active region. The method further includes forming a third transistor with a vertical active region and a horizontal active region extending on only one side of the vertical active region.

    摘要翻译: 提供一种制造半导体器件的方法。 该方法包括形成具有在垂直有源区两侧延伸的垂直有源区和水平有源区的第一晶体管。 该方法还包括形成具有垂直有源区的第二晶体管。 该方法还包括形成具有垂直有源区和仅在垂直有源区的一侧上延伸的水平有源区的第三晶体管。

    STAINLESS STEEL-PLATED BOAT HULL SYSTEM AND METHOD
    9.
    发明申请
    STAINLESS STEEL-PLATED BOAT HULL SYSTEM AND METHOD 审中-公开
    不锈钢船体系统及方法

    公开(公告)号:US20070089662A1

    公开(公告)日:2007-04-26

    申请号:US11538288

    申请日:2006-10-03

    申请人: James Burnett

    发明人: James Burnett

    IPC分类号: B63B3/00

    CPC分类号: B63B3/16 B63B9/04

    摘要: A stainless-steel boat hull system and method. Exemplary embodiments include a method of maintaining steel-hulled boats, including accessing a steel boat hull, removing surface layers of the boat hull, identifying structurally supportive layers of the boat hull, priming the boat hull, attaching pre-selected stainless steel plates to the boat hull in an overlapped arrangement and connecting adjacent stainless steel plates.

    摘要翻译: 不锈钢船体系统及方法。 示例性实施例包括维持钢船的方法,包括进入钢船体,移除船体的表面层,识别船体的结构上支撑层,起动船体,将预先选定的不锈钢板连接到 船体重叠布置并连接相邻的不锈钢板。

    Semiconductor device having a p-MOS transistor with source-drain extension counter-doping
    10.
    发明申请
    Semiconductor device having a p-MOS transistor with source-drain extension counter-doping 审中-公开
    具有源极 - 漏极延伸反掺杂的p-MOS晶体管的半导体器件

    公开(公告)号:US20070057329A1

    公开(公告)日:2007-03-15

    申请号:US11222544

    申请日:2005-09-09

    IPC分类号: H01L21/8238 H01L29/76

    CPC分类号: H01L21/823814

    摘要: A method for forming a semiconductor device is provided. The method includes forming a n-type well region. The method further includes forming a gate corresponding to the semiconductor device on top of the n-type well region. The method further includes forming a source-drain extension region on each side of the gate in the n-type well region using a p-type dopant. The method further includes doping the source-drain extension region on each side of the gate in the n-type well region using a n-type dopant such that the n-type dopant is substantially encompassed within the source-drain extension region. The method further includes forming a source and a drain corresponding to the semiconductor device.

    摘要翻译: 提供一种形成半导体器件的方法。 该方法包括形成n型阱区域。 该方法还包括在n型阱区域的顶部上形成与半导体器件对应的栅极。 该方法还包括使用p型掺杂剂在n型阱区域中的栅极的每一侧上形成源极 - 漏极延伸区域。 该方法还包括使用n型掺杂剂在n型阱区域中的栅极的每侧上掺杂源极 - 漏极延伸区域,使得n型掺杂剂基本上包围在源极 - 漏极延伸区域内。 该方法还包括形成对应于半导体器件的源极和漏极。