公开(公告)号：US09282626B2

公开(公告)日：2016-03-08

申请号：US13880896

申请日：2011-07-01

申请人： Jae Hyoun Yoo ,  Hyung Jong Kim ,  Jun Soo Park ,  Ki Yong Lee ,  Jin Goo Jeon

发明人： Jae Hyoun Yoo ,  Hyung Jong Kim ,  Jun Soo Park ,  Ki Yong Lee ,  Jin Goo Jeon

IPC分类号： H05K3/02 ,  H05K3/04 ,  H05K3/46 ,  H05K1/02 ,  H05K3/00

CPC分类号： H05K1/02 ,  H05K3/0035 ,  H05K3/4697 ,  H05K2201/09127

摘要： Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated. Accordingly, the insulating layer in the cavity is easily removed.

摘要翻译： 公开了一种印刷电路板及其制造方法。 制造印刷电路板的方法包括在基板的上部和下部的空腔区域中形成包括空腔电路图案的基底电路板和在腔区域外部的内部电路层，在空腔电路图案上形成空腔分离层 在所述基底电路板上形成至少一对绝缘层和电路层，通过控制所述激光束的焦距来切割设置在所述蚀刻停止图案上的所述绝缘层和所述腔分离层，使得所述激光束到达 基底电路板的表面，并且通过分离空腔分离层以形成空腔来去除绝缘层。 空腔分离层形成在空腔电路图案上，并且通过使用激光将所得结构切割到空腔分离层，使得绝缘层被分离。 因此，容易去除空腔中的绝缘层。

公开(公告)号：US20130299223A1

公开(公告)日：2013-11-14

申请号：US13880896

申请日：2011-07-01

申请人： Jae Hyoun Yoo ,  Hyung Jong Kim ,  Jun Soo Park ,  Ki Yong Lee ,  Jin Goo Jeon

发明人： Jae Hyoun Yoo ,  Hyung Jong Kim ,  Jun Soo Park ,  Ki Yong Lee ,  Jin Goo Jeon

IPC分类号： H05K1/02 ,  H05K3/46

CPC分类号： H05K1/02 ,  H05K3/0035 ,  H05K3/4697 ,  H05K2201/09127

摘要： Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated. Accordingly, the insulating layer in the cavity is easily removed.

摘要翻译： 公开了一种印刷电路板及其制造方法。 制造印刷电路板的方法包括在基板的上部和下部的空腔区域中形成包括空腔电路图案的基底电路板和在腔区域外部的内部电路层，在空腔电路图案上形成空腔分离层 在所述基底电路板上形成至少一对绝缘层和电路层，通过控制所述激光束的焦距来切割设置在所述蚀刻停止图案上的所述绝缘层和所述腔分离层，使得所述激光束到达 基底电路板的表面，并且通过分离空腔分离层以形成空腔来去除绝缘层。 空腔分离层形成在空腔电路图案上，并且通过使用激光将所得结构切割到空腔分离层，使得绝缘层被分离。 因此，容易去除空腔中的绝缘层。

公开(公告)号：US20130288842A1

公开(公告)日：2013-10-31

申请号：US13989788

申请日：2011-11-24

申请人： David Hyung Kim ,  Ki Yong Lee ,  Kwang Yong Shin

发明人： David Hyung Kim ,  Ki Yong Lee ,  Kwang Yong Shin

IPC分类号： F16H3/72

CPC分类号： F16H3/725 ,  F16H3/724 ,  F16H2200/2005

摘要： There is disclosed a continuously variable speed gear set including a driving input shaft, a carrier extended from one end of the driving input shaft to rotate integrally with the driving input shaft, a spindle gear provided in a predetermined portion of the carrier to relatively rotate with respect to the driving input shaft, the spindle gear comprising a shaft identical to the driving input shaft, a planetary gear arranged in the carrier, a driving output gear comprising a shaft arranged on the same line with the axis of the driving input shaft to relatively rotate, the driving output gear engaging with the planetary gear rotating and revolving along the rotation of the carrier to receive a rotation force from the planetary force, and a transmission input unit configured to control a rotation speed of the driving output gear by controlling a rotation speed of the spindle gear.

摘要翻译： 公开了一种无级变速齿轮组，包括驱动输入轴，从驱动输入轴的一端延伸以与驱动输入轴一体旋转的载体，设置在载体的预定部分中以相对旋转的主轴齿轮， 相对于驱动输入轴，主轴齿轮包括与驱动输入轴相同的轴，布置在载体中的行星齿轮，驱动输出齿轮，其包括与驱动输入轴的轴线布置在同一直线上的相对 所述驱动输出齿轮与所述行星齿轮接合，所述行星齿轮沿着所述载体的旋转而旋转并旋转，以接收来自所述行星力的旋转力;以及变速器输入单元，被配置为通过控制所述驱动输出齿轮的旋转来控制所述驱动输出齿轮的转速 主轴齿轮转速。

公开(公告)号：US20130199570A1

公开(公告)日：2013-08-08

申请号：US13825150

申请日：2011-04-27

申请人： Man-Hee Lee ,  Ki-Yong Lee ,  Chang-Nam Song

发明人： Man-Hee Lee ,  Ki-Yong Lee ,  Chang-Nam Song

IPC分类号： A47L9/00

CPC分类号： A47L9/009 ,  A47L2201/022 ,  A47L2201/04 ,  G05D1/0234 ,  G05D2201/0203

摘要： Disclosed are a cleaning robot system and its method for controlling which make it possible to reliably and quickly clean with the aid of the cleaning robot. The cleaning robot system comprises at least one external device each formed of an indicator and a virtual wall setting function, with the aid of which cleaning work can be performed by the unit of blocks about a cleaning area reference point, not leaving non-cleaned area behind. Since the access of the cleaning robot can be restricted by means of a virtual wall set by an external device, any damages of furniture due to a collision of the cleaning robot can be prevented, and the cleaning robot can be barred from escaping from the set cleaning area.

摘要翻译： 公开了一种清洁机器人系统及其控制方法，其使得可以借助于清洁机器人可靠且快速地清洁。 清洁机器人系统包括至少一个外部设备，每个外部设备由指示器和虚拟墙壁设置功能构成，借助于这些单元可以通过清洁区域参考点执行清洁工作，而不会留下未清洁区域 背后。 由于可以通过外部设备设置的虚拟壁来限制清洁机器人的通路，所以可以防止由于清洁机器人的碰撞而导致的家具的任何损坏，并且可以禁止清洁机器人从集合中逸出 清洁区域。

公开(公告)号：US08409887B2

公开(公告)日：2013-04-02

申请号：US12713846

申请日：2010-02-26

申请人： Byoung-Keon Park ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Soo-Beom Jo ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Maxim Lisachenko ,  Yun-Mo Chung ,  Bo-Kyung Choi ,  Jong-Ryuk Park ,  Ki-Yong Lee

发明人： Byoung-Keon Park ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Soo-Beom Jo ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Maxim Lisachenko ,  Yun-Mo Chung ,  Bo-Kyung Choi ,  Jong-Ryuk Park ,  Ki-Yong Lee

IPC分类号： H01L21/00

CPC分类号： H01L51/52 ,  H01L27/3265 ,  H01L2227/323

摘要： An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.

公开(公告)号：US08384087B2

公开(公告)日：2013-02-26

申请号：US12805995

申请日：2010-08-27

申请人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

发明人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

IPC分类号： H01L27/14

CPC分类号： H01L29/66757 ,  H01L27/1277 ,  H01L27/3262

摘要： A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.

摘要翻译： 薄膜晶体管包括衬底，衬底上的缓冲层，包括源极/漏极区域和缓冲层上的沟道区域的半导体层，对应于沟道区域的栅极绝缘层，对应于沟道区域的栅电极 以及与半导体层电连接的源极/漏极。 沟道区域的多晶硅层可以仅包括低角度晶界，并且可以在离开沟道区域的半导体层的区域中设置高角度晶界。

公开(公告)号：US08383461B2

公开(公告)日：2013-02-26

申请号：US12260231

申请日：2008-10-29

申请人： Ki Yong Lee ,  Seung Kweon Ha

发明人： Ki Yong Lee ,  Seung Kweon Ha

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/4846 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H01L2224/05599

摘要： A method for manufacturing a semiconductor package includes the steps of forming first circuit patterns on an upper surface of a carrier substrate. Bumps are formed in recesses defined on the upper surface of the carrier substrate. An insulation layer is formed on the upper surface of the carrier substrate to cover the first circuit patterns. Second circuit patterns are formed on an upper surface of the insulation layer so as to be electrically connected with the first circuit patterns. The carrier substrate is then separated from the insulation layer.

摘要翻译： 一种制造半导体封装件的方法包括以下步骤：在载体衬底的上表面上形成第一电路图案。 凸起形成在限定在载体基板的上表面上的凹部中。 在载体基板的上表面上形成绝缘层以覆盖第一电路图案。 第二电路图案形成在绝缘层的上表面上，以便与第一电路图案电连接。 然后将载体衬底与绝缘层分离。

公开(公告)号：US08350267B2

公开(公告)日：2013-01-08

申请号：US12104749

申请日：2008-04-17

申请人： Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

发明人： Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

IPC分类号： H01L27/14

CPC分类号： G09G3/3275 ,  H01L27/1214 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78645 ,  H01L29/78672 ,  H01L29/78696

摘要： A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.

摘要翻译： 高速平板显示器在其中排列有多个像素的像素阵列部分中具有薄膜晶体管，以及用于驱动像素阵列部分的像素的驱动电路部分，其具有彼此不同的电阻值或具有不同的像素阵列部分 几何结构比彼此。 平板显示器包括其中布置有多个像素的像素阵列部分和用于驱动像素阵列部分的像素的驱动电路部分。 像素阵列部分和驱动电路部分中的薄膜晶体管在其栅极区域或漏极区域中具有彼此不同的电阻值，或者具有彼此不同的几何结构。 一个薄膜晶体管在其栅极区域或漏极区域中具有锯齿形状或具有偏移区域。

公开(公告)号：US20120326157A1

公开(公告)日：2012-12-27

申请号：US13313555

申请日：2011-12-07

申请人： Byoung-Keon Park ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Jin-Wook Seo ,  Ki-Yong Lee

发明人： Byoung-Keon Park ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Jin-Wook Seo ,  Ki-Yong Lee

IPC分类号： H01L29/786 ,  H01L33/08 ,  H01L33/16 ,  H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/3262 ,  H01L29/66757

摘要： A method of manufacturing a TFT, including forming a buffer layer, an amorphous silicon layer, an insulating layer, and a first conductive layer on a substrate, forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer, forming a semiconductor layer, a gate insulating layer, and a gate electrode that have a predetermined shape by simultaneously patterning the polycrystalline silicon layer, the insulating layer, and the first conductive layer, wherein the polycrystalline silicon layer is further etched to produce an undercut recessed a distance compared to sidewalls of the insulating layer and the first conductive layer, forming source and drain regions within the semiconductor layer by doping corresponding portions of the semiconductor layer, forming an interlayer insulating layer on the gate electrode, the interlayer insulating layer covering the gate insulating layer and forming source and drain electrodes that are electrically connected to source and drain regions respectively.

摘要翻译： 一种制造TFT的方法，包括在衬底上形成缓冲层，非晶硅层，绝缘层和第一导电层，通过使非晶硅层结晶形成多晶硅层，形成半导体层，栅极 绝缘层和通过同时构图多晶硅层，绝缘层和第一导电层而具有预定形状的栅电极，其中进一步蚀刻多晶硅层以产生凹陷距离相比于 绝缘层和第一导电层，通过掺杂半导体层的相应部分在半导体层内形成源极和漏极区域，在栅电极上形成层间绝缘层，覆盖栅极绝缘层的层间绝缘层和形成源极和漏极 与源极和漏极电连接的电极 地区。

公开(公告)号：US08314428B2

公开(公告)日：2012-11-20

申请号：US10734162

申请日：2003-12-15

申请人： Ji Yong Park ,  Ki Yong Lee ,  Hye Hyang Park

发明人： Ji Yong Park ,  Ki Yong Lee ,  Hye Hyang Park

IPC分类号： H01L27/14

CPC分类号： H01L29/78696 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： A thin film transistor including a lightly doped drain (LDD) region or offset region, wherein the thin film transistor is formed so that primary crystal grain boundaries of a polysilicon substrate are not positioned in the LDD or offset region.

摘要翻译： 一种薄膜晶体管，包括轻掺杂漏极（LDD）区域或偏移区域，其中所述薄膜晶体管形成为使得多晶硅衬底的初晶晶界不位于LDD或偏移区域中。